Series Detail

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{
    "id": 500305,
    "url": "http://patchwork.ozlabs.org/api/1.2/series/500305/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500305",
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        "name": "QEMU Development",
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    "name": "target/riscv: add support for RISC-V P extension (v0.20 draft)",
    "date": "2026-04-17T10:42:47",
    "submitter": {
        "id": 89843,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/89843/?format=api",
        "name": "Molly Chen",
        "email": "xiaoou@iscas.ac.cn"
    },
    "version": 1,
    "total": 14,
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    "mbox": "http://patchwork.ozlabs.org/series/500305/mbox/",
    "cover_letter": {
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        "url": "http://patchwork.ozlabs.org/api/1.2/covers/2224355/?format=api",
        "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20260417104302.17800-1-xiaoou@iscas.ac.cn/",
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        "list_archive_url": null,
        "date": "2026-04-17T10:42:47",
        "name": "[00/14] target/riscv: add support for RISC-V P extension (v0.20 draft)",
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    },
    "patches": [
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            "msgid": "<20260417104652.17857-6-xiaoou@iscas.ac.cn>",
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            "date": "2026-04-17T10:46:42",
            "name": "[05/14] target/riscv: rvp: add shift operations",
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}