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GET /api/1.2/patches/833279/?format=api
{ "id": 833279, "url": "http://patchwork.ozlabs.org/api/1.2/patches/833279/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20171102103559.7382-2-luc.michel@git.antfield.fr/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20171102103559.7382-2-luc.michel@git.antfield.fr>", "list_archive_url": null, "date": "2017-11-02T10:35:59", "name": "[1/1] target-ppc: Fix booke206 tlbwe TLB instruction", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "315cb295a035aeaee0bf294870faec56ba151170", "submitter": { "id": 71520, "url": "http://patchwork.ozlabs.org/api/1.2/people/71520/?format=api", "name": "Luc MICHEL", "email": "luc.michel@git.antfield.fr" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20171102103559.7382-2-luc.michel@git.antfield.fr/mbox/", "series": [ { "id": 11470, "url": "http://patchwork.ozlabs.org/api/1.2/series/11470/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=11470", "date": "2017-11-02T10:35:59", "name": "[1/1] target-ppc: Fix booke206 tlbwe TLB instruction", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/11470/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/833279/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/833279/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3ySM14548Dz9t34\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 2 Nov 2017 21:35:20 +1100 (AEDT)", "from localhost ([::1]:59553 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1eACqE-0007RU-Pn\n\tfor incoming@patchwork.ozlabs.org; Thu, 02 Nov 2017 06:35:18 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:50892)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <luc.michel@git.antfield.fr>) id 1eACph-0007PX-HH\n\tfor qemu-devel@nongnu.org; Thu, 02 Nov 2017 06:34:46 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <luc.michel@git.antfield.fr>) id 1eACpe-0005Y0-DM\n\tfor qemu-devel@nongnu.org; Thu, 02 Nov 2017 06:34:45 -0400", "from bee.antfield.fr ([188.165.75.195]:36564)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <luc.michel@git.antfield.fr>)\n\tid 1eACpe-0005WP-7H; Thu, 02 Nov 2017 06:34:42 -0400" ], "From": "Luc MICHEL <luc.michel@git.antfield.fr>", "To": "qemu-devel@nongnu.org", "Date": "Thu, 2 Nov 2017 11:35:59 +0100", "Message-Id": "<20171102103559.7382-2-luc.michel@git.antfield.fr>", "X-Mailer": "git-send-email 2.14.3", "In-Reply-To": "<20171102103559.7382-1-luc.michel@git.antfield.fr>", "References": "<20171102103559.7382-1-luc.michel@git.antfield.fr>", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "188.165.75.195", "Subject": "[Qemu-devel] [PATCH 1/1] target-ppc: Fix booke206 tlbwe TLB\n\tinstruction", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "David Gibson <david@gibson.dropbear.id.au>, qemu-ppc@nongnu.org,\n\tAlexander Graf <agraf@suse.de>, Luc MICHEL <luc.michel@git.antfield.fr>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "When overwritting a valid TLB entry with a new one, the previous page\nwere not flushed in QEMU TLB, leading to incoherent mapping. This commit\nfixes this.\n\nSigned-off-by: Luc MICHEL <luc.michel@git.antfield.fr>\n---\n target/ppc/mmu_helper.c | 23 ++++++++++++++++++-----\n 1 file changed, 18 insertions(+), 5 deletions(-)", "diff": "diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c\nindex 2a1f9902c9..c2c89239b4 100644\n--- a/target/ppc/mmu_helper.c\n+++ b/target/ppc/mmu_helper.c\n@@ -2570,6 +2570,17 @@ void helper_booke_setpid(CPUPPCState *env, uint32_t pidn, target_ulong pid)\n tlb_flush(CPU(cpu));\n }\n \n+static inline void flush_page(CPUPPCState *env, ppcmas_tlb_t *tlb)\n+{\n+ PowerPCCPU *cpu = ppc_env_get_cpu(env);\n+\n+ if (booke206_tlb_to_page_size(env, tlb) == TARGET_PAGE_SIZE) {\n+ tlb_flush_page(CPU(cpu), tlb->mas2 & MAS2_EPN_MASK);\n+ } else {\n+ tlb_flush(CPU(cpu));\n+ }\n+}\n+\n void helper_booke206_tlbwe(CPUPPCState *env)\n {\n PowerPCCPU *cpu = ppc_env_get_cpu(env);\n@@ -2628,6 +2639,12 @@ void helper_booke206_tlbwe(CPUPPCState *env)\n if (msr_gs) {\n cpu_abort(CPU(cpu), \"missing HV implementation\\n\");\n }\n+\n+ if (tlb->mas1 & MAS1_VALID) {\n+ /* Invalidate the page in QEMU TLB if it was a valid entry */\n+ flush_page(env, tlb);\n+ }\n+\n tlb->mas7_3 = ((uint64_t)env->spr[SPR_BOOKE_MAS7] << 32) |\n env->spr[SPR_BOOKE_MAS3];\n tlb->mas1 = env->spr[SPR_BOOKE_MAS1];\n@@ -2663,11 +2680,7 @@ void helper_booke206_tlbwe(CPUPPCState *env)\n tlb->mas1 &= ~MAS1_IPROT;\n }\n \n- if (booke206_tlb_to_page_size(env, tlb) == TARGET_PAGE_SIZE) {\n- tlb_flush_page(CPU(cpu), tlb->mas2 & MAS2_EPN_MASK);\n- } else {\n- tlb_flush(CPU(cpu));\n- }\n+ flush_page(env, tlb);\n }\n \n static inline void booke206_tlb_to_mas(CPUPPCState *env, ppcmas_tlb_t *tlb)\n", "prefixes": [ "1/1" ] }