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GET /api/1.2/patches/831256/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 831256,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/831256/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1509101470-7881-13-git-send-email-Dave.Martin@arm.com/",
    "project": {
        "id": 19,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/19/?format=api",
        "name": "Linux IMX development",
        "link_name": "linux-imx",
        "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org",
        "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1509101470-7881-13-git-send-email-Dave.Martin@arm.com>",
    "list_archive_url": null,
    "date": "2017-10-27T10:50:54",
    "name": "[v4,12/28] arm64/sve: Support vector length resetting for new processes",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "e147500ea79a0cda57e50b261586dcfd9ca04027",
    "submitter": {
        "id": 26612,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/26612/?format=api",
        "name": "Dave Martin",
        "email": "Dave.Martin@arm.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1509101470-7881-13-git-send-email-Dave.Martin@arm.com/mbox/",
    "series": [
        {
            "id": 10556,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/10556/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=10556",
            "date": "2017-10-27T10:50:43",
            "name": "ARM Scalable Vector Extension (SVE)",
            "version": 4,
            "mbox": "http://patchwork.ozlabs.org/series/10556/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/831256/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/831256/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>",
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        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=h2WmaV2HxZB8FyTZ88Lzk5ELEuh59Ey4My6aHEZKX0E=;\n\tb=h5lSs8vCb0/4nf\n\tBgu+l+z2Lc59v6cPR7XNas4oLAGdgsb9K5tD5bX9op99DliFJVJ6jg8UhN6oqej4lcnUSsoJ0nlEC\n\tvwyB/E7d6KkWNSplc2exYJIXwdevQFuhY0WvPXNkQBk0ZE/qXq/x0Rgl7mAKvJypUD9Vk2NF+6Q8A\n\tOLh+YIzDCluLVMKhfx2DOcWDSsKd5jHGOJnjHEfnQ40e9piKfI3touJKKTEmwp/3ZuJu6rC3OTiXB\n\tr/eRYkmLryHM+yjD4Amd57nmQqv0P5Kwb4y+oSQEW44mdlbvxE9Uowfpurk+xCpP5SOjKAzx2qg20\n\t8a90YLuP51t/EDhwZiMA==;",
        "From": "Dave Martin <Dave.Martin@arm.com>",
        "To": "linux-arm-kernel@lists.infradead.org",
        "Subject": "[PATCH v4 12/28] arm64/sve: Support vector length resetting for new\n\tprocesses",
        "Date": "Fri, 27 Oct 2017 11:50:54 +0100",
        "Message-Id": "<1509101470-7881-13-git-send-email-Dave.Martin@arm.com>",
        "X-Mailer": "git-send-email 2.1.4",
        "In-Reply-To": "<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>",
        "References": "<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>",
        "MIME-Version": "1.0",
        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20171027_035205_456309_1975F265 ",
        "X-CRM114-Status": "GOOD (  14.12  )",
        "X-Spam-Score": "-6.9 (------)",
        "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details:   (-6.9 points)\n\tpts rule name              description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS               SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]",
        "X-BeenThere": "linux-arm-kernel@lists.infradead.org",
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        "Precedence": "list",
        "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>",
        "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>",
        "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>",
        "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>",
        "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>",
        "Cc": "linux-arch@vger.kernel.org, Okamoto Takayuki <tokamoto@jp.fujitsu.com>,\n\tlibc-alpha@sourceware.org, Ard Biesheuvel <ard.biesheuvel@linaro.org>, \n\tSzabolcs Nagy <szabolcs.nagy@arm.com>, \n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>, =?utf-8?q?Alex_Benn=C3=A9e?=\n\t<alex.bennee@linaro.org>,  kvmarm@lists.cs.columbia.edu",
        "Content-Type": "text/plain; charset=\"utf-8\"",
        "Content-Transfer-Encoding": "base64",
        "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>",
        "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org",
        "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org"
    },
    "content": "It's desirable to be able to reset the vector length to some sane\ndefault for new processes, since the new binary and its libraries\nmay or may not be SVE-aware.\n\nThis patch tracks the desired post-exec vector length (if any) in a\nnew thread member sve_vl_onexec, and adds a new thread flag\nTIF_SVE_VL_INHERIT to control whether to inherit or reset the\nvector length.  Currently these are inactive.  Subsequent patches\nwill provide the capability to configure them.\n\nSigned-off-by: Dave Martin <Dave.Martin@arm.com>\nReviewed-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Catalin Marinas <catalin.marinas@arm.com>\n---\n arch/arm64/include/asm/processor.h   |  1 +\n arch/arm64/include/asm/thread_info.h |  1 +\n arch/arm64/kernel/fpsimd.c           | 16 ++++++++++++----\n 3 files changed, 14 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h\nindex e2f575d..c6fddb0 100644\n--- a/arch/arm64/include/asm/processor.h\n+++ b/arch/arm64/include/asm/processor.h\n@@ -107,6 +107,7 @@ struct thread_struct {\n \tstruct fpsimd_state\tfpsimd_state;\n \tvoid\t\t\t*sve_state;\t/* SVE registers, if any */\n \tunsigned int\t\tsve_vl;\t\t/* SVE vector length */\n+\tunsigned int\t\tsve_vl_onexec;\t/* SVE vl after next exec */\n \tunsigned long\t\tfault_address;\t/* fault info */\n \tunsigned long\t\tfault_code;\t/* ESR_EL1 value */\n \tstruct debug_info\tdebug;\t\t/* debugging */\ndiff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h\nindex 92b7b48..eb43128 100644\n--- a/arch/arm64/include/asm/thread_info.h\n+++ b/arch/arm64/include/asm/thread_info.h\n@@ -95,6 +95,7 @@ void arch_release_task_struct(struct task_struct *tsk);\n #define TIF_SINGLESTEP\t\t21\n #define TIF_32BIT\t\t22\t/* 32bit process */\n #define TIF_SVE\t\t\t23\t/* Scalable Vector Extension in use */\n+#define TIF_SVE_VL_INHERIT\t24\t/* Inherit sve_vl_onexec across exec */\n \n #define _TIF_SIGPENDING\t\t(1 << TIF_SIGPENDING)\n #define _TIF_NEED_RESCHED\t(1 << TIF_NEED_RESCHED)\ndiff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c\nindex 0b15a594..2b691d1 100644\n--- a/arch/arm64/kernel/fpsimd.c\n+++ b/arch/arm64/kernel/fpsimd.c\n@@ -109,6 +109,9 @@\n  */\n static DEFINE_PER_CPU(struct fpsimd_state *, fpsimd_last_state);\n \n+/* Default VL for tasks that don't set it explicitly: */\n+static int sve_default_vl = SVE_VL_MIN;\n+\n /*\n  * Call __sve_free() directly only if you know task can't be scheduled\n  * or preempted.\n@@ -472,15 +475,20 @@ void fpsimd_flush_thread(void)\n \t\t * If a bug causes this to go wrong, we make some noise and\n \t\t * try to fudge thread.sve_vl to a safe value here.\n \t\t */\n-\t\tvl = current->thread.sve_vl;\n-\n-\t\tif (vl == 0)\n-\t\t\tvl = SVE_VL_MIN;\n+\t\tvl = current->thread.sve_vl_onexec ?\n+\t\t\tcurrent->thread.sve_vl_onexec : sve_default_vl;\n \n \t\tif (WARN_ON(!sve_vl_valid(vl)))\n \t\t\tvl = SVE_VL_MIN;\n \n \t\tcurrent->thread.sve_vl = vl;\n+\n+\t\t/*\n+\t\t * If the task is not set to inherit, ensure that the vector\n+\t\t * length will be reset by a subsequent exec:\n+\t\t */\n+\t\tif (!test_thread_flag(TIF_SVE_VL_INHERIT))\n+\t\t\tcurrent->thread.sve_vl_onexec = 0;\n \t}\n \n \tset_thread_flag(TIF_FOREIGN_FPSTATE);\n",
    "prefixes": [
        "v4",
        "12/28"
    ]
}