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GET /api/1.2/patches/831052/?format=api
{ "id": 831052, "url": "http://patchwork.ozlabs.org/api/1.2/patches/831052/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20171027040833.3644-11-aneesh.kumar@linux.vnet.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/1.2/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20171027040833.3644-11-aneesh.kumar@linux.vnet.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20171027040833.3644-11-aneesh.kumar@linux.vnet.ibm.com/", "date": "2017-10-27T04:08:27", "name": "[10/16] powerpc/kvm/hash: Implement HASH_REMOVE hcall", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "02ddefcf4d12fece5f05c0e83266baf85e946b9a", "submitter": { "id": 664, "url": "http://patchwork.ozlabs.org/api/1.2/people/664/?format=api", "name": "Aneesh Kumar K.V", "email": "aneesh.kumar@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20171027040833.3644-11-aneesh.kumar@linux.vnet.ibm.com/mbox/", "series": [ { "id": 10486, "url": "http://patchwork.ozlabs.org/api/1.2/series/10486/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=10486", "date": "2017-10-27T04:08:17", "name": "Remove hash page table slot tracking from linux PTE", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/10486/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/831052/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/831052/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yNW2c4jd2z9t2d\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 27 Oct 2017 15:23:20 +1100 (AEDT)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3yNW2c3kxVzDscN\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 27 Oct 2017 15:23:20 +1100 (AEDT)", "from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com\n\t[148.163.158.5])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3yNVky4dx3zDrcY\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 27 Oct 2017 15:09:46 +1100 (AEDT)", "from pps.filterd (m0098413.ppops.net [127.0.0.1])\n\tby mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv9R492cI036383\n\tfor <linuxppc-dev@lists.ozlabs.org>; Fri, 27 Oct 2017 00:09:43 -0400", "from e34.co.us.ibm.com (e34.co.us.ibm.com [32.97.110.152])\n\tby mx0b-001b2d01.pphosted.com with ESMTP id 2duuqmvk5f-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <linuxppc-dev@lists.ozlabs.org>; Fri, 27 Oct 2017 00:09:42 -0400", "from localhost\n\tby e34.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <linuxppc-dev@lists.ozlabs.org> from\n\t<aneesh.kumar@linux.vnet.ibm.com>; Thu, 26 Oct 2017 22:09:42 -0600", "from b03cxnp08026.gho.boulder.ibm.com (9.17.130.18)\n\tby e34.co.us.ibm.com (192.168.1.134) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tThu, 26 Oct 2017 22:09:40 -0600", "from b03ledav001.gho.boulder.ibm.com\n\t(b03ledav001.gho.boulder.ibm.com [9.17.130.232])\n\tby b03cxnp08026.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v9R49d1e63766716; Thu, 26 Oct 2017 21:09:39 -0700", "from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id A75FF6E121;\n\tThu, 26 Oct 2017 22:09:39 -0600 (MDT)", "from skywalker.ibmmodules.com (unknown [9.85.199.61])\n\tby b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP id B76496E175;\n\tThu, 26 Oct 2017 22:09:35 -0600 (MDT)" ], "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=aneesh.kumar@linux.vnet.ibm.com; receiver=<UNKNOWN>)", "From": "\"Aneesh Kumar K.V\" <aneesh.kumar@linux.vnet.ibm.com>", "To": "benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au", "Subject": "[PATCH 10/16] powerpc/kvm/hash: Implement HASH_REMOVE hcall", "Date": "Fri, 27 Oct 2017 09:38:27 +0530", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20171027040833.3644-1-aneesh.kumar@linux.vnet.ibm.com>", "References": "<20171027040833.3644-1-aneesh.kumar@linux.vnet.ibm.com>", "X-TM-AS-GCONF": "00", "x-cbid": "17102704-0016-0000-0000-000007B76F8C", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00007958; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000239; SDB=6.00937035; UDB=6.00472245;\n\tIPR=6.00717297; \n\tBA=6.00005660; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017735;\n\tXFM=3.00000015; UTC=2017-10-27 04:09:41", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17102704-0017-0000-0000-00003C048AFC", "Message-Id": "<20171027040833.3644-11-aneesh.kumar@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-10-27_02:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tpriorityscore=1501\n\tmalwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0\n\tclxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0\n\tclassifier=spam adjust=0 reason=mlx scancount=1\n\tengine=8.0.1-1707230000\n\tdefinitions=main-1710270053", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "linuxppc-dev@lists.ozlabs.org,\n\t\"Aneesh Kumar K.V\" <aneesh.kumar@linux.vnet.ibm.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "This is equivalent to H_REMOVE hcall, but then takes hash value as the arg\ninstead of hashpte slot number. We will use this later to speed up invalidate\noperation in guest. Instead of finding slot number using H_READ4 hcall, we can\nuse hash value directly using this hcall.\n\nOnly support flag value for the operation is H_AVPN.\n\nSigned-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>\n---\n arch/powerpc/include/asm/hvcall.h | 3 +-\n arch/powerpc/include/asm/plpar_wrappers.h | 16 ++++\n arch/powerpc/kvm/book3s_hv.c | 1 +\n arch/powerpc/kvm/book3s_hv_rm_mmu.c | 134 ++++++++++++++++++++++++++----\n arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +\n 5 files changed, 138 insertions(+), 18 deletions(-)", "diff": "diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h\nindex 3d34dc0869f6..92980217a076 100644\n--- a/arch/powerpc/include/asm/hvcall.h\n+++ b/arch/powerpc/include/asm/hvcall.h\n@@ -291,7 +291,8 @@\n #define H_INT_ESB 0x3C8\n #define H_INT_SYNC 0x3CC\n #define H_INT_RESET 0x3D0\n-#define MAX_HCALL_OPCODE\tH_INT_RESET\n+#define H_HASH_REMOVE\t\t0x3D4\n+#define MAX_HCALL_OPCODE\tH_HASH_REMOVE\n \n /* H_VIOCTL functions */\n #define H_GET_VIOA_DUMP_SIZE\t0x01\ndiff --git a/arch/powerpc/include/asm/plpar_wrappers.h b/arch/powerpc/include/asm/plpar_wrappers.h\nindex c7b164836bc3..8160fea9b5bc 100644\n--- a/arch/powerpc/include/asm/plpar_wrappers.h\n+++ b/arch/powerpc/include/asm/plpar_wrappers.h\n@@ -124,6 +124,22 @@ static inline long plpar_pte_remove(unsigned long flags, unsigned long ptex,\n \treturn rc;\n }\n \n+static inline long plpar_pte_hash_remove(unsigned long flags, unsigned long hash,\n+\t\t\t\t unsigned long avpn, unsigned long *old_pteh_ret,\n+\t\t\t\t unsigned long *old_ptel_ret)\n+{\n+\tlong rc;\n+\tunsigned long retbuf[PLPAR_HCALL_BUFSIZE];\n+\n+\trc = plpar_hcall(H_HASH_REMOVE, retbuf, flags, hash, avpn);\n+\n+\t*old_pteh_ret = retbuf[0];\n+\t*old_ptel_ret = retbuf[1];\n+\n+\treturn rc;\n+}\n+\n+\n /* plpar_pte_remove_raw can be called in real mode. It calls plpar_hcall_raw */\n static inline long plpar_pte_remove_raw(unsigned long flags, unsigned long ptex,\n \t\tunsigned long avpn, unsigned long *old_pteh_ret,\ndiff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c\nindex 73bf1ebfa78f..56e7f52ed324 100644\n--- a/arch/powerpc/kvm/book3s_hv.c\n+++ b/arch/powerpc/kvm/book3s_hv.c\n@@ -4171,6 +4171,7 @@ static unsigned int default_hcall_list[] = {\n \tH_XIRR,\n \tH_XIRR_X,\n #endif\n+\tH_HASH_REMOVE,\n \t0\n };\n \ndiff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c\nindex d80240ba6de4..7ebeb1be8380 100644\n--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c\n+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c\n@@ -465,34 +465,21 @@ static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues,\n \t}\n }\n \n-long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags,\n-\t\t\tunsigned long pte_index, unsigned long avpn,\n-\t\t\tunsigned long *hpret)\n+static long __kvmppc_do_hash_remove(struct kvm *kvm, __be64 *hpte,\n+\t\t\t\t unsigned long pte_index,\n+\t\t\t\t unsigned long *hpret)\n {\n-\t__be64 *hpte;\n+\n \tunsigned long v, r, rb;\n \tstruct revmap_entry *rev;\n \tu64 pte, orig_pte, pte_r;\n \n-\tif (kvm_is_radix(kvm))\n-\t\treturn H_FUNCTION;\n-\tif (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt))\n-\t\treturn H_PARAMETER;\n-\thpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4));\n-\twhile (!try_lock_hpte(hpte, HPTE_V_HVLOCK))\n-\t\tcpu_relax();\n \tpte = orig_pte = be64_to_cpu(hpte[0]);\n \tpte_r = be64_to_cpu(hpte[1]);\n \tif (cpu_has_feature(CPU_FTR_ARCH_300)) {\n \t\tpte = hpte_new_to_old_v(pte, pte_r);\n \t\tpte_r = hpte_new_to_old_r(pte_r);\n \t}\n-\tif ((pte & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 ||\n-\t ((flags & H_AVPN) && (pte & ~0x7fUL) != avpn) ||\n-\t ((flags & H_ANDCOND) && (pte & avpn) != 0)) {\n-\t\t__unlock_hpte(hpte, orig_pte);\n-\t\treturn H_NOT_FOUND;\n-\t}\n \n \trev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]);\n \tv = pte & ~HPTE_V_HVLOCK;\n@@ -525,6 +512,35 @@ long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags,\n \thpret[1] = r;\n \treturn H_SUCCESS;\n }\n+\n+long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags,\n+\t\t\tunsigned long pte_index, unsigned long avpn,\n+\t\t\tunsigned long *hpret)\n+{\n+\t__be64 *hpte;\n+\tu64 pte, orig_pte, pte_r;\n+\n+\tif (kvm_is_radix(kvm))\n+\t\treturn H_FUNCTION;\n+\tif (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt))\n+\t\treturn H_PARAMETER;\n+\thpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4));\n+\twhile (!try_lock_hpte(hpte, HPTE_V_HVLOCK))\n+\t\tcpu_relax();\n+\tpte = orig_pte = be64_to_cpu(hpte[0]);\n+\tpte_r = be64_to_cpu(hpte[1]);\n+\tif (cpu_has_feature(CPU_FTR_ARCH_300)) {\n+\t\tpte = hpte_new_to_old_v(pte, pte_r);\n+\t\tpte_r = hpte_new_to_old_r(pte_r);\n+\t}\n+\tif ((pte & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 ||\n+\t ((flags & H_AVPN) && (pte & ~0x7fUL) != avpn) ||\n+\t ((flags & H_ANDCOND) && (pte & avpn) != 0)) {\n+\t\t__unlock_hpte(hpte, orig_pte);\n+\t\treturn H_NOT_FOUND;\n+\t}\n+\treturn __kvmppc_do_hash_remove(kvm, hpte, pte_index, hpret);\n+}\n EXPORT_SYMBOL_GPL(kvmppc_do_h_remove);\n \n long kvmppc_h_remove(struct kvm_vcpu *vcpu, unsigned long flags,\n@@ -534,6 +550,90 @@ long kvmppc_h_remove(struct kvm_vcpu *vcpu, unsigned long flags,\n \t\t\t\t &vcpu->arch.gpr[4]);\n }\n \n+/* return locked hpte */\n+static __be64 *kvmppc_find_hpte_slot(struct kvm *kvm, unsigned long hash,\n+\t\t\t\t unsigned long avpn, unsigned long *pte_index)\n+{\n+\tint i;\n+\t__be64 *hpte;\n+\tunsigned long slot;\n+\tu64 pte_v, orig_pte, pte_r;\n+\tbool secondary_search = false;\n+\n+\t/*\n+\t * search for the hpte in primary group\n+\t */\n+\tslot = (hash & kvmppc_hpt_mask(&kvm->arch.hpt)) * HPTES_PER_GROUP;\n+\n+search_again:\n+\thpte = (__be64 *)(kvm->arch.hpt.virt + (slot << 4));\n+\tfor (i = 0; i < HPTES_PER_GROUP; i++ , hpte += 2) {\n+\t\t/* lockless search */\n+\t\tpte_v = orig_pte = be64_to_cpu(hpte[0]);\n+\t\tpte_r = be64_to_cpu(hpte[1]);\n+\t\tif (cpu_has_feature(CPU_FTR_ARCH_300)) {\n+\t\t\tpte_v = hpte_new_to_old_v(pte_v, pte_r);\n+\t\t\tpte_r = hpte_new_to_old_r(pte_r);\n+\t\t}\n+\t\tif ((pte_v & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0)\n+\t\t\tcontinue;\n+\n+\t\tif ((pte_v & ~0x7FUL) == avpn) {\n+\t\t\twhile (!try_lock_hpte(hpte, HPTE_V_HVLOCK))\n+\t\t\t\tcpu_relax();\n+\t\t\tpte_v = orig_pte = be64_to_cpu(hpte[0]);\n+\t\t\tpte_r = be64_to_cpu(hpte[1]);\n+\t\t\tif (cpu_has_feature(CPU_FTR_ARCH_300)) {\n+\t\t\t\tpte_v = hpte_new_to_old_v(pte_v, pte_r);\n+\t\t\t\tpte_r = hpte_new_to_old_r(pte_r);\n+\t\t\t}\n+\t\t\tif ((pte_v & ~0x7FUL) != avpn) {\n+\t\t\t\t/* unlock and continue */\n+\t\t\t\t__unlock_hpte(hpte, orig_pte);\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t\t*pte_index = slot + i;\n+\t\t\treturn hpte;\n+\t\t}\n+\t}\n+\tif (!secondary_search) {\n+\t\tsecondary_search = true;\n+\t\tslot = (~hash & kvmppc_hpt_mask(&kvm->arch.hpt)) * HPTES_PER_GROUP;\n+\t\tgoto search_again;\n+\t}\n+\treturn NULL;\n+}\n+\n+/* Only support H_AVPN flag, which is must */\n+long kvmppc_do_h_hash_remove(struct kvm *kvm, unsigned long flags,\n+\t\t\t unsigned long hash, unsigned long avpn,\n+\t\t\t unsigned long *hpret)\n+{\n+\t__be64 *hpte;\n+\tunsigned long pte_index;\n+\n+\n+\tif (kvm_is_radix(kvm))\n+\t\treturn H_FUNCTION;\n+\n+\tif ((flags & H_AVPN) != H_AVPN)\n+\t\treturn H_PARAMETER;\n+\n+\thpte = kvmppc_find_hpte_slot(kvm, hash, avpn, &pte_index);\n+\tif (!hpte)\n+\t\treturn H_NOT_FOUND;\n+\n+\treturn __kvmppc_do_hash_remove(kvm, hpte, pte_index, hpret);\n+}\n+EXPORT_SYMBOL_GPL(kvmppc_do_h_hash_remove);\n+\n+long kvmppc_h_hash_remove(struct kvm_vcpu *vcpu, unsigned long flags,\n+\t\t\t unsigned long hash, unsigned long avpn)\n+{\n+\treturn kvmppc_do_h_hash_remove(vcpu->kvm, flags, hash, avpn,\n+\t\t\t\t &vcpu->arch.gpr[4]);\n+}\n+\n long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu)\n {\n \tstruct kvm *kvm = vcpu->kvm;\ndiff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S\nindex ec69fa45d5a2..238ecf5d0ed8 100644\n--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S\n+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S\n@@ -2375,6 +2375,8 @@ hcall_real_table:\n \t.long\t0\t\t/* 0x2fc - H_XIRR_X*/\n #endif\n \t.long\tDOTSYM(kvmppc_h_random) - hcall_real_table\n+\t.space\t((H_HASH_REMOVE - 4) - H_RANDOM), 0\n+\t.long\tDOTSYM(kvmppc_h_hash_remove) - hcall_real_table\n \t.globl\thcall_real_table_end\n hcall_real_table_end:\n \n", "prefixes": [ "10/16" ] }