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GET /api/1.2/patches/831048/?format=api
{ "id": 831048, "url": "http://patchwork.ozlabs.org/api/1.2/patches/831048/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20171027040833.3644-7-aneesh.kumar@linux.vnet.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/1.2/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20171027040833.3644-7-aneesh.kumar@linux.vnet.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20171027040833.3644-7-aneesh.kumar@linux.vnet.ibm.com/", "date": "2017-10-27T04:08:23", "name": "[06/16] powerpc/mm: Switch flush_hash_range to not use slot", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "a480399aa96e403004f81b38eb740309da3c1013", "submitter": { "id": 664, "url": "http://patchwork.ozlabs.org/api/1.2/people/664/?format=api", "name": "Aneesh Kumar K.V", "email": "aneesh.kumar@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20171027040833.3644-7-aneesh.kumar@linux.vnet.ibm.com/mbox/", "series": [ { "id": 10486, "url": "http://patchwork.ozlabs.org/api/1.2/series/10486/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=10486", "date": "2017-10-27T04:08:17", "name": "Remove hash page table slot tracking from linux PTE", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/10486/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/831048/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/831048/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yNVxq28dDz9t2S\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 27 Oct 2017 15:19:11 +1100 (AEDT)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3yNVxq19KgzDsVt\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 27 Oct 2017 15:19:11 +1100 (AEDT)", "from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com\n\t[148.163.158.5])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3yNVkY5YvLzDrcQ\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 27 Oct 2017 15:09:25 +1100 (AEDT)", "from pps.filterd (m0098416.ppops.net [127.0.0.1])\n\tby mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv9R499r6092047\n\tfor <linuxppc-dev@lists.ozlabs.org>; Fri, 27 Oct 2017 00:09:23 -0400", "from e32.co.us.ibm.com (e32.co.us.ibm.com [32.97.110.150])\n\tby mx0b-001b2d01.pphosted.com with ESMTP id 2duwge02xe-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <linuxppc-dev@lists.ozlabs.org>; Fri, 27 Oct 2017 00:09:22 -0400", "from localhost\n\tby e32.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <linuxppc-dev@lists.ozlabs.org> from\n\t<aneesh.kumar@linux.vnet.ibm.com>; Thu, 26 Oct 2017 22:09:21 -0600", "from b03cxnp07028.gho.boulder.ibm.com (9.17.130.15)\n\tby e32.co.us.ibm.com (192.168.1.132) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tThu, 26 Oct 2017 22:09:18 -0600", "from b03ledav001.gho.boulder.ibm.com\n\t(b03ledav001.gho.boulder.ibm.com [9.17.130.232])\n\tby b03cxnp07028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v9R49IsF5439970; Thu, 26 Oct 2017 21:09:18 -0700", "from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 2BEA36E179;\n\tThu, 26 Oct 2017 22:09:18 -0600 (MDT)", "from skywalker.ibmmodules.com (unknown [9.85.199.61])\n\tby b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP id 24EB06E121;\n\tThu, 26 Oct 2017 22:09:13 -0600 (MDT)" ], "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=aneesh.kumar@linux.vnet.ibm.com; receiver=<UNKNOWN>)", "From": "\"Aneesh Kumar K.V\" <aneesh.kumar@linux.vnet.ibm.com>", "To": "benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au", "Subject": "[PATCH 06/16] powerpc/mm: Switch flush_hash_range to not use slot", "Date": "Fri, 27 Oct 2017 09:38:23 +0530", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20171027040833.3644-1-aneesh.kumar@linux.vnet.ibm.com>", "References": "<20171027040833.3644-1-aneesh.kumar@linux.vnet.ibm.com>", "X-TM-AS-GCONF": "00", "x-cbid": "17102704-0004-0000-0000-0000131F7212", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00007958; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000239; SDB=6.00937034; UDB=6.00472245;\n\tIPR=6.00717296; \n\tBA=6.00005660; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017735;\n\tXFM=3.00000015; UTC=2017-10-27 04:09:19", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17102704-0005-0000-0000-000084A29F44", "Message-Id": "<20171027040833.3644-7-aneesh.kumar@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-10-27_02:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tpriorityscore=1501\n\tmalwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0\n\tclxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0\n\tclassifier=spam adjust=0 reason=mlx scancount=1\n\tengine=8.0.1-1707230000\n\tdefinitions=main-1710270053", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "linuxppc-dev@lists.ozlabs.org,\n\t\"Aneesh Kumar K.V\" <aneesh.kumar@linux.vnet.ibm.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>\n---\n arch/powerpc/mm/hash_native_64.c | 28 ++++++++--------------------\n arch/powerpc/platforms/pseries/lpar.c | 17 ++++++++---------\n 2 files changed, 16 insertions(+), 29 deletions(-)", "diff": "diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c\nindex f473a78baab7..8e2e6b92aa27 100644\n--- a/arch/powerpc/mm/hash_native_64.c\n+++ b/arch/powerpc/mm/hash_native_64.c\n@@ -707,10 +707,8 @@ static void native_hpte_clear(void)\n static void native_flush_hash_range(unsigned long number, int local)\n {\n \tunsigned long vpn;\n-\tunsigned long hash, index, hidx, shift, slot;\n+\tunsigned long hash, index, shift;\n \tstruct hash_pte *hptep;\n-\tunsigned long hpte_v;\n-\tunsigned long want_v;\n \tunsigned long flags;\n \treal_pte_t pte;\n \tstruct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);\n@@ -730,23 +728,13 @@ static void native_flush_hash_range(unsigned long number, int local)\n \n \t\tpte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {\n \t\t\thash = hpt_hash(vpn, shift, ssize);\n-\t\t\thidx = __rpte_to_hidx(pte, index);\n-\t\t\tif (hidx & _PTEIDX_SECONDARY)\n-\t\t\t\thash = ~hash;\n-\t\t\tslot = (hash & htab_hash_mask) * HPTES_PER_GROUP;\n-\t\t\tslot += hidx & _PTEIDX_GROUP_IX;\n-\t\t\thptep = htab_address + slot;\n-\t\t\twant_v = hpte_encode_avpn(vpn, psize, ssize);\n-\t\t\tnative_lock_hpte(hptep);\n-\t\t\thpte_v = be64_to_cpu(hptep->v);\n-\t\t\tif (cpu_has_feature(CPU_FTR_ARCH_300))\n-\t\t\t\thpte_v = hpte_new_to_old_v(hpte_v,\n-\t\t\t\t\t\tbe64_to_cpu(hptep->r));\n-\t\t\tif (!HPTE_V_COMPARE(hpte_v, want_v) ||\n-\t\t\t !(hpte_v & HPTE_V_VALID))\n-\t\t\t\tnative_unlock_hpte(hptep);\n-\t\t\telse\n-\t\t\t\thptep->v = 0;\n+\t\t\thptep = native_hpte_find(hash, vpn, psize, ssize);\n+\t\t\tif (!hptep)\n+\t\t\t\tcontinue;\n+\t\t\t/*\n+\t\t\t * Invalidate the hpte. NOTE: this also unlocks it\n+\t\t\t */\n+\t\t\thptep->v = 0;\n \t\t} pte_iterate_hashed_end();\n \t}\n \ndiff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c\nindex e366252e0e93..d32469e40bbc 100644\n--- a/arch/powerpc/platforms/pseries/lpar.c\n+++ b/arch/powerpc/platforms/pseries/lpar.c\n@@ -580,14 +580,14 @@ static int pSeries_lpar_hpte_removebolted(unsigned long ea,\n static void pSeries_lpar_flush_hash_range(unsigned long number, int local)\n {\n \tunsigned long vpn;\n-\tunsigned long i, pix, rc;\n+\tunsigned long i, rc;\n \tunsigned long flags = 0;\n \tstruct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);\n \tint lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);\n \tunsigned long param[PLPAR_HCALL9_BUFSIZE];\n-\tunsigned long hash, index, shift, hidx, slot;\n+\tunsigned long index, shift;\n \treal_pte_t pte;\n-\tint psize, ssize;\n+\tint psize, ssize, pix;\n \n \tif (lock_tlbie)\n \t\tspin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);\n@@ -599,12 +599,11 @@ static void pSeries_lpar_flush_hash_range(unsigned long number, int local)\n \t\tvpn = batch->vpn[i];\n \t\tpte = batch->pte[i];\n \t\tpte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {\n-\t\t\thash = hpt_hash(vpn, shift, ssize);\n-\t\t\thidx = __rpte_to_hidx(pte, index);\n-\t\t\tif (hidx & _PTEIDX_SECONDARY)\n-\t\t\t\thash = ~hash;\n-\t\t\tslot = (hash & htab_hash_mask) * HPTES_PER_GROUP;\n-\t\t\tslot += hidx & _PTEIDX_GROUP_IX;\n+\t\t\tlong slot;\n+\n+\t\t\tslot = pSeries_lpar_hpte_find(vpn, psize, ssize);\n+\t\t\tif (slot < 0)\n+\t\t\t\tcontinue;\n \t\t\tif (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {\n \t\t\t\t/*\n \t\t\t\t * lpar doesn't use the passed actual page size\n", "prefixes": [ "06/16" ] }