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GET /api/1.2/patches/829994/?format=api
{ "id": 829994, "url": "http://patchwork.ozlabs.org/api/1.2/patches/829994/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/20171024175714.15840-2-clabbe.montjoie@gmail.com/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/1.2/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20171024175714.15840-2-clabbe.montjoie@gmail.com>", "list_archive_url": null, "date": "2017-10-24T17:57:05", "name": "[v9,01/10] dt-bindings: net: Restore sun8i dwmac binding", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": true, "hash": "ff5ea580bd745e6cdec8ba64d3e5da1a42d2e7dd", "submitter": { "id": 64152, "url": "http://patchwork.ozlabs.org/api/1.2/people/64152/?format=api", "name": "Corentin Labbe", "email": "clabbe.montjoie@gmail.com" }, "delegate": { "id": 34, "url": "http://patchwork.ozlabs.org/api/1.2/users/34/?format=api", "username": "davem", "first_name": "David", "last_name": "Miller", "email": "davem@davemloft.net" }, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/20171024175714.15840-2-clabbe.montjoie@gmail.com/mbox/", "series": [ { "id": 10031, "url": "http://patchwork.ozlabs.org/api/1.2/series/10031/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=10031", "date": "2017-10-24T17:57:06", "name": "net: stmmac: dwmac-sun8i: Handle integrated PHY", "version": 9, "mbox": "http://patchwork.ozlabs.org/series/10031/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/829994/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/829994/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming@ozlabs.org", "Delivered-To": "patchwork-incoming@ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"FDAjEHnY\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yM1Nq33w1z9sBd\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 25 Oct 2017 05:03:55 +1100 (AEDT)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S932344AbdJXSDr (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tTue, 24 Oct 2017 14:03:47 -0400", "from mail-wm0-f65.google.com ([74.125.82.65]:51084 \"EHLO\n\tmail-wm0-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751396AbdJXSAq (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Tue, 24 Oct 2017 14:00:46 -0400", "by mail-wm0-f65.google.com with SMTP id u138so17307838wmu.5;\n\tTue, 24 Oct 2017 11:00:45 -0700 (PDT)", "from Red.local (LFbn-MAR-1-580-96.w90-118.abo.wanadoo.fr.\n\t[90.118.159.96]) by smtp.googlemail.com with ESMTPSA id\n\ts18sm818968wrg.87.2017.10.24.11.00.43\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tTue, 24 Oct 2017 11:00:43 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=7E7I7AepMTcGSOwwWyKivEU4xyZm/Mk1cuspDTgQtIE=;\n\tb=FDAjEHnYBQdlPvlPcLLKk/AT/vKAG/z76Z6CQYqSasIIg2pzGSNb/WQvuH4FYfkIUt\n\tDwb6+5xZnbvYnHLNcPCM2T2uTAQW64A5MxesqB2Q0R27bXerBG6sNxurKBqW24oWPlom\n\t/cZo8+SyDbL7nTzH/sg0ByRxsYWdDTeNbWNzVL6Fsp8LRHOgW7Apc2g+P6YX53eJnPpJ\n\tU7118YymsAO8CGdhXp9uJPi50YXjsZrs4gfmQW24yGV2ueKkNysaSuoMduE6Nh4z9vtg\n\twl3MyHvwwHiV9YBGoK0EVc+k8dXIVEfI8ttV2ciKfg8pujLTehy6GjhOrV+7O9h6pBDo\n\txpnw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=7E7I7AepMTcGSOwwWyKivEU4xyZm/Mk1cuspDTgQtIE=;\n\tb=BItxQcfqQHQi6YhqClKeK6Ex8IRAJx7ZxLeGEL/qGI7LUIymOpyTsg1bpmhmMcVhi3\n\tHdO9OdbJ2y8dQkL3koifywGDo4SUTY8hmHwOO1qwbQzJ2IEDKcVR9XPpvcrw6kESSz0K\n\tsMvBS4CpyOpq7aIIZ3Id/H5cNwDlb+IsudJ0JmVKTwAO67tyNTvtu3vH97j15235YZfz\n\tkjhJeIww558Vc1youW/5zoEtmGLjJVLW9oo/bwlJRd1e/r27esrwEy+TkublTqBI0GUL\n\tmS+o22Ue8k6H8jcmV2MVxOjseTXHz0G23uJAD8cARMBV9X5XUm7Q7+xs7nvLSCTTP/qY\n\tXAsw==", "X-Gm-Message-State": "AMCzsaVZiFZK6lfwHjnyxusloM57EZ9dbi1y9ntU2FsieF+gRcBneGpr\n\tUBviXoSC5SQdgg4GCLHEeig=", "X-Google-Smtp-Source": "ABhQp+RD3HF93ExvKGQ9Y0EdAMZ6H4Y5bL5XdPsCJs4zXWKdPMOQf1mDwt+gJMkTqi1QLaXsotTJEQ==", "X-Received": "by 10.28.16.209 with SMTP id 200mr5694254wmq.35.1508868044469;\n\tTue, 24 Oct 2017 11:00:44 -0700 (PDT)", "From": "Corentin Labbe <clabbe.montjoie@gmail.com>", "To": "robh+dt@kernel.org, mark.rutland@arm.com,\n\tmaxime.ripard@free-electrons.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com", "Cc": "netdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tCorentin Labbe <clabbe.montjoie@gmail.com>", "Subject": "[PATCH v9 01/10] dt-bindings: net: Restore sun8i dwmac binding", "Date": "Tue, 24 Oct 2017 19:57:05 +0200", "Message-Id": "<20171024175714.15840-2-clabbe.montjoie@gmail.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20171024175714.15840-1-clabbe.montjoie@gmail.com>", "References": "<20171024175714.15840-1-clabbe.montjoie@gmail.com>", "Sender": "netdev-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "The original dwmac-sun8i DT bindings have some issue on how to handle\nintegrated PHY and was reverted in last RC of 4.13.\nBut now we have a solution so we need to get back that was reverted.\n\nThis patch restore dt-bindings documentation about dwmac-sun8i\nThis reverts commit 8aa33ec2f481 (\"dt-bindings: net: Revert sun8i dwmac binding\")\n\nSigned-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>\nAcked-by: Rob Herring <robh@kernel.org>\n---\n .../devicetree/bindings/net/dwmac-sun8i.txt | 84 ++++++++++++++++++++++\n 1 file changed, 84 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt", "diff": "diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\nnew file mode 100644\nindex 000000000000..725f3b187886\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n@@ -0,0 +1,84 @@\n+* Allwinner sun8i GMAC ethernet controller\n+\n+This device is a platform glue layer for stmmac.\n+Please see stmmac.txt for the other unchanged properties.\n+\n+Required properties:\n+- compatible: should be one of the following string:\n+\t\t\"allwinner,sun8i-a83t-emac\"\n+\t\t\"allwinner,sun8i-h3-emac\"\n+\t\t\"allwinner,sun8i-v3s-emac\"\n+\t\t\"allwinner,sun50i-a64-emac\"\n+- reg: address and length of the register for the device.\n+- interrupts: interrupt for the device\n+- interrupt-names: should be \"macirq\"\n+- clocks: A phandle to the reference clock for this device\n+- clock-names: should be \"stmmaceth\"\n+- resets: A phandle to the reset control for this device\n+- reset-names: should be \"stmmaceth\"\n+- phy-mode: See ethernet.txt\n+- phy-handle: See ethernet.txt\n+- #address-cells: shall be 1\n+- #size-cells: shall be 0\n+- syscon: A phandle to the syscon of the SoC with one of the following\n+ compatible string:\n+ - allwinner,sun8i-h3-system-controller\n+ - allwinner,sun8i-v3s-system-controller\n+ - allwinner,sun50i-a64-system-controller\n+ - allwinner,sun8i-a83t-system-controller\n+\n+Optional properties:\n+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0)\n+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0)\n+Both delay properties need to be a multiple of 100. They control the delay for\n+external PHY.\n+\n+Optional properties for the following compatibles:\n+ - \"allwinner,sun8i-h3-emac\",\n+ - \"allwinner,sun8i-v3s-emac\":\n+- allwinner,leds-active-low: EPHY LEDs are active low\n+\n+Required child node of emac:\n+- mdio bus node: should be named mdio\n+\n+Required properties of the mdio node:\n+- #address-cells: shall be 1\n+- #size-cells: shall be 0\n+\n+The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n+of the mdio node. See phy.txt for the generic PHY bindings.\n+\n+Required properties of the phy node with the following compatibles:\n+ - \"allwinner,sun8i-h3-emac\",\n+ - \"allwinner,sun8i-v3s-emac\":\n+- clocks: a phandle to the reference clock for the EPHY\n+- resets: a phandle to the reset control for the EPHY\n+\n+Example:\n+\n+emac: ethernet@1c0b000 {\n+\tcompatible = \"allwinner,sun8i-h3-emac\";\n+\tsyscon = <&syscon>;\n+\treg = <0x01c0b000 0x104>;\n+\tinterrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;\n+\tinterrupt-names = \"macirq\";\n+\tresets = <&ccu RST_BUS_EMAC>;\n+\treset-names = \"stmmaceth\";\n+\tclocks = <&ccu CLK_BUS_EMAC>;\n+\tclock-names = \"stmmaceth\";\n+\t#address-cells = <1>;\n+\t#size-cells = <0>;\n+\n+\tphy-handle = <&int_mii_phy>;\n+\tphy-mode = \"mii\";\n+\tallwinner,leds-active-low;\n+\tmdio: mdio {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\tint_mii_phy: ethernet-phy@1 {\n+\t\t\treg = <1>;\n+\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n+\t\t\tresets = <&ccu RST_BUS_EPHY>;\n+\t\t};\n+\t};\n+};\n", "prefixes": [ "v9", "01/10" ] }