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GET /api/1.2/patches/814813/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 814813,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/814813/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170918081626.12878-1-peter.ujfalusi@ti.com/",
    "project": {
        "id": 19,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/19/?format=api",
        "name": "Linux IMX development",
        "link_name": "linux-imx",
        "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org",
        "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20170918081626.12878-1-peter.ujfalusi@ti.com>",
    "list_archive_url": null,
    "date": "2017-09-18T08:16:26",
    "name": "[v2] dmaengine: edma: Align the memcpy acnt array size with the transfer",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "3d88c2939a4f41fece2dd9ba0ccee63b6c291a04",
    "submitter": {
        "id": 9142,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/9142/?format=api",
        "name": "Peter Ujfalusi",
        "email": "peter.ujfalusi@ti.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170918081626.12878-1-peter.ujfalusi@ti.com/mbox/",
    "series": [
        {
            "id": 3582,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/3582/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=3582",
            "date": "2017-09-18T08:16:26",
            "name": "[v2] dmaengine: edma: Align the memcpy acnt array size with the transfer",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/3582/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/814813/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/814813/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>",
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        ],
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        ],
        "From": "Peter Ujfalusi <peter.ujfalusi@ti.com>",
        "To": "<vinod.koul@intel.com>, <dan.j.williams@intel.com>",
        "Subject": "[PATCH v2] dmaengine: edma: Align the memcpy acnt array size with\n\tthe transfer",
        "Date": "Mon, 18 Sep 2017 11:16:26 +0300",
        "Message-ID": "<20170918081626.12878-1-peter.ujfalusi@ti.com>",
        "X-Mailer": "git-send-email 2.14.1",
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        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20170918_011648_960482_9F9ECA10 ",
        "X-CRM114-Status": "GOOD (  12.71  )",
        "X-Spam-Score": "-2.0 (--)",
        "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details:   (-2.0 points)\n\tpts rule name              description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [198.47.19.17 listed in list.dnswl.org]\n\t-0.0 SPF_PASS               SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain",
        "X-BeenThere": "linux-arm-kernel@lists.infradead.org",
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        "Cc": "dmaengine@vger.kernel.org, stable@vger.kernel.org,\n\tlinux-omap@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org",
        "Content-Type": "text/plain; charset=\"utf-8\"",
        "Content-Transfer-Encoding": "base64",
        "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>",
        "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org",
        "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org"
    },
    "content": "Memory to Memory transfers does not have any special alignment needs\nregarding to acnt array size, but if one of the areas are in memory mapped\nregions (like PCIe memory), we need to make sure that the acnt array size\nis aligned with the mem copy parameters.\n\nBefore \"dmaengine: edma: Optimize memcpy operation\" change the memcpy was set\nup in a different way: acnt == number of bytes in a word based on\n__ffs((src | dest | len), bcnt and ccnt for looping the necessary number of\nwords to comlete the trasnfer.\n\nInstead of reverting the commit we can fix it to make sure that the ACNT size\nis aligned to the traswnfer.\n\nFixes: df6694f80365a (dmaengine: edma: Optimize memcpy operation)\nSigned-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>\nCc: stable@vger.kernel.org\n---\nHi,\n\nChanges since v1:\n- Added Cc and Fixes tags to the commit massage for proper Stable handling.\n- Extended the commit message a bit to explain the issue a bit more.\n\nRegards,\nPeter\n\n drivers/dma/edma.c | 19 ++++++++++++++++---\n 1 file changed, 16 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c\nindex 14c52574262c..2f880010297d 100644\n--- a/drivers/dma/edma.c\n+++ b/drivers/dma/edma.c\n@@ -1169,11 +1169,24 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(\n \tstruct edma_desc *edesc;\n \tstruct device *dev = chan->device->dev;\n \tstruct edma_chan *echan = to_edma_chan(chan);\n-\tunsigned int width, pset_len;\n+\tunsigned int width, pset_len, array_size;\n \n \tif (unlikely(!echan || !len))\n \t\treturn NULL;\n \n+\t/* Align the array size (acnt block) with the transfer properties */\n+\tswitch (__ffs((src | dest | len))) {\n+\tcase 0:\n+\t\tarray_size = SZ_32K - 1;\n+\t\tbreak;\n+\tcase 1:\n+\t\tarray_size = SZ_32K - 2;\n+\t\tbreak;\n+\tdefault:\n+\t\tarray_size = SZ_32K - 4;\n+\t\tbreak;\n+\t}\n+\n \tif (len < SZ_64K) {\n \t\t/*\n \t\t * Transfer size less than 64K can be handled with one paRAM\n@@ -1195,7 +1208,7 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(\n \t\t * When the full_length is multibple of 32767 one slot can be\n \t\t * used to complete the transfer.\n \t\t */\n-\t\twidth = SZ_32K - 1;\n+\t\twidth = array_size;\n \t\tpset_len = rounddown(len, width);\n \t\t/* One slot is enough for lengths multiple of (SZ_32K -1) */\n \t\tif (unlikely(pset_len == len))\n@@ -1243,7 +1256,7 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(\n \t\t}\n \t\tdest += pset_len;\n \t\tsrc += pset_len;\n-\t\tpset_len = width = len % (SZ_32K - 1);\n+\t\tpset_len = width = len % array_size;\n \n \t\tret = edma_config_pset(chan, &edesc->pset[1], src, dest, 1,\n \t\t\t\t       width, pset_len, DMA_MEM_TO_MEM);\n",
    "prefixes": [
        "v2"
    ]
}