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GET /api/1.2/patches/814373/?format=api
{ "id": 814373, "url": "http://patchwork.ozlabs.org/api/1.2/patches/814373/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170915191359.28712-4-marek.vasut+renesas@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.2/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170915191359.28712-4-marek.vasut+renesas@gmail.com>", "list_archive_url": null, "date": "2017-09-15T19:13:58", "name": "[U-Boot,4/5] ARM: rmobile: Zap ad-hoc PFC and GPIO setup in board files", "commit_ref": "9c4c79f4321178a258e9bc98b0452b3ed5db337d", "pull_url": null, "state": "accepted", "archived": false, "hash": "182c3a39fd91b22e1370f656d1aba54b71d351bf", "submitter": { "id": 1124, "url": "http://patchwork.ozlabs.org/api/1.2/people/1124/?format=api", "name": "Marek Vasut", "email": "marek.vasut@gmail.com" }, "delegate": { "id": 1750, "url": "http://patchwork.ozlabs.org/api/1.2/users/1750/?format=api", "username": "iwamatsu", "first_name": "Nobuhiro", "last_name": "Iwamatsu", "email": "iwamatsu@nigauri.org" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170915191359.28712-4-marek.vasut+renesas@gmail.com/mbox/", "series": [ { "id": 3365, "url": "http://patchwork.ozlabs.org/api/1.2/series/3365/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=3365", "date": "2017-09-15T19:13:58", "name": "[U-Boot,1/5] pinctrl: rmobile: Add Renesas RCar pincontrol driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/3365/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/814373/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/814373/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"m+dvLeZR\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xv4sf2KKXz9s7g\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 16 Sep 2017 05:17:26 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid DE23DC21EC9; Fri, 15 Sep 2017 19:16:09 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id EDBB7C21F21;\n\tFri, 15 Sep 2017 19:15:30 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 523CCC21F13; Fri, 15 Sep 2017 19:14:08 +0000 (UTC)", "from mail-wr0-f196.google.com (mail-wr0-f196.google.com\n\t[209.85.128.196])\n\tby lists.denx.de (Postfix) with ESMTPS id DF577C21E84\n\tfor <u-boot@lists.denx.de>; Fri, 15 Sep 2017 19:14:07 +0000 (UTC)", "by mail-wr0-f196.google.com with SMTP id g50so1775509wra.3\n\tfor <u-boot@lists.denx.de>; Fri, 15 Sep 2017 12:14:07 -0700 (PDT)", "from kurokawa.lan (ip-86-49-107-50.net.upcbroadband.cz.\n\t[86.49.107.50]) by smtp.gmail.com with ESMTPSA id\n\ta39sm1710995wrc.48.2017.09.15.12.14.06\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 15 Sep 2017 12:14:06 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=CtyfXjuhovkS/2aUPzUI6WyYZlJts+hHhkExXmOIArw=;\n\tb=m+dvLeZRhMlsR09L4HUVS+Gqt1pxKSW0tYboi8ks/P8Fi3+JQIpw23vPqZDeK2YiEj\n\tPL+Zj2Vy7fpo/g7ixrFwCdsn213IkgENMi84ubixl3mdllpYcQmtwA1d2J42OttIwTKp\n\tgVxRm0k+/bNuJOabsEIvzTDXGL5wRgE0WN/1TiLgxGL8lWacnxpXS95PgV1PS9YdE3ph\n\tRveHaXzaSG1xSnYLtaY3EtqxcfaRAzI6gl20eO28nf7f7cE3QprD8BwS/Jh1mFchs8Dh\n\tNlFqumnPxrDlVAoe72SlsOIAg7g8SY5dOSejlCOftVd7l7TT3ol7qiNIAy3Eh3j1g3oh\n\tmFFg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=CtyfXjuhovkS/2aUPzUI6WyYZlJts+hHhkExXmOIArw=;\n\tb=fXcAJ65RJe735EhFLu5xW+wQxRGsQ8T2eQ/re1kqj87CZ5P+Yc9l5W+WHtu99TzeJ5\n\tKwaosxXIm+KhhX/Drn97SIUW9OtdLtJ8TWrPCqaWQuTObAPZgJwiIfsvF2xje+v6mu0L\n\t8gsL4fxfZ26MudPnJolHnuMRTsqHLluV18uq3i7C2iZe5nK0lBSJ2bd3NZQFvCYja37o\n\tYWPqt64uXVVPWV/G3VPYTLylgz5g6xZFEonPvRmshIlWaNm3mXY5q4lZxAMTFGgh5Pxp\n\tEREmQ/lS2QwSTy49I7Z8xNYSt8LZVqvhDkwk8gA0ZMYy1rvBCEu2QUHZC9RyrcKiOMF/\n\tPrBA==", "X-Gm-Message-State": "AHPjjUipvAPa/ZVrWX+pa1+rhtBWq6wXwP+MOvA+9dDwkvBcNyvyNyd/\n\tfF8U2MY1QYwbq31rBAI=", "X-Google-Smtp-Source": "ADKCNb6KYcjtFty1qdtM4hi626DDQ0WaENHe8IABXgXXp196bR9BytiTO7aHXb/h67bPCMcRQeYSXA==", "X-Received": "by 10.223.159.77 with SMTP id f13mr22447301wrg.154.1505502847295;\n\tFri, 15 Sep 2017 12:14:07 -0700 (PDT)", "From": "Marek Vasut <marek.vasut@gmail.com>", "X-Google-Original-From": "Marek Vasut <marek.vasut+renesas@gmail.com>", "To": "u-boot@lists.denx.de", "Date": "Fri, 15 Sep 2017 21:13:58 +0200", "Message-Id": "<20170915191359.28712-4-marek.vasut+renesas@gmail.com>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": "<20170915191359.28712-1-marek.vasut+renesas@gmail.com>", "References": "<20170915191359.28712-1-marek.vasut+renesas@gmail.com>", "Cc": "Marek Vasut <marek.vasut+renesas@gmail.com>", "Subject": "[U-Boot] [PATCH 4/5] ARM: rmobile: Zap ad-hoc PFC and GPIO setup in\n\tboard files", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "At long last, nuke all this ad-hoc setup in board files in favor of\nletting PFC pinmux and GPIO drivers do the same job, but based on DT\ndescription of the hardware rather than this board-file ugliness.\n\nSigned-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>\nCc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>\n---\n board/renesas/salvator-x/salvator-x.c | 117 ----------------------------------\n board/renesas/ulcb/ulcb.c | 80 -----------------------\n 2 files changed, 197 deletions(-)", "diff": "diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c\nindex 9d9de58370..debd1db721 100644\n--- a/board/renesas/salvator-x/salvator-x.c\n+++ b/board/renesas/salvator-x/salvator-x.c\n@@ -82,15 +82,6 @@ int board_init(void)\n \t/* adress of boot parameters */\n \tgd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;\n \n-#ifdef CONFIG_SH_GPIO_PFC\n-\t/* Init PFC controller */\n-#if defined(CONFIG_R8A7795)\n-\tr8a7795_pinmux_init();\n-#elif defined(CONFIG_R8A7796)\n-\tr8a7796_pinmux_init();\n-#endif\n-#endif\n-\n #if defined(CONFIG_R8A7795)\n \t/* GSX: force power and clock supply */\n \twritel(0x0000001F, SYSC_PWRONCR2);\n@@ -111,114 +102,6 @@ int board_init(void)\n \t/* low power status */\n \tsetbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);\n \n-#ifdef CONFIG_RENESAS_RAVB\n-\t/* EtherAVB Enable */\n-\t/* GPSR2 */\n-\tgpio_request(GPIO_GFN_AVB_AVTP_CAPTURE_A, NULL);\n-\tgpio_request(GPIO_GFN_AVB_AVTP_MATCH_A, NULL);\n-\tgpio_request(GPIO_GFN_AVB_LINK, NULL);\n-\tgpio_request(GPIO_GFN_AVB_PHY_INT, NULL);\n-\tgpio_request(GPIO_GFN_AVB_MAGIC, NULL);\n-\tgpio_request(GPIO_GFN_AVB_MDC, NULL);\n-\n-\t/* IPSR0 */\n-\tgpio_request(GPIO_IFN_AVB_MDC, NULL);\n-\tgpio_request(GPIO_IFN_AVB_MAGIC, NULL);\n-\tgpio_request(GPIO_IFN_AVB_PHY_INT, NULL);\n-\tgpio_request(GPIO_IFN_AVB_LINK, NULL);\n-\tgpio_request(GPIO_IFN_AVB_AVTP_MATCH_A, NULL);\n-\tgpio_request(GPIO_IFN_AVB_AVTP_CAPTURE_A, NULL);\n-\t/* IPSR1 */\n-\tgpio_request(GPIO_FN_AVB_AVTP_PPS, NULL);\n-\t/* IPSR2 */\n-\tgpio_request(GPIO_FN_AVB_AVTP_MATCH_B, NULL);\n-\t/* IPSR3 */\n-\tgpio_request(GPIO_FN_AVB_AVTP_CAPTURE_B, NULL);\n-\n-#if defined(CONFIG_R8A7795)\n-\t/* USB2_OVC */\n-\tgpio_request(GPIO_GP_6_15, NULL);\n-\tgpio_direction_input(GPIO_GP_6_15);\n-\n-\t/* USB2_PWEN */\n-\tgpio_request(GPIO_GP_6_14, NULL);\n-\tgpio_direction_output(GPIO_GP_6_14, 1);\n-\tgpio_set_value(GPIO_GP_6_14, 1);\n-#endif\n-\t/* AVB_PHY_RST */\n-\tgpio_request(GPIO_GP_2_10, NULL);\n-\tgpio_direction_output(GPIO_GP_2_10, 0);\n-\tmdelay(20);\n-\tgpio_set_value(GPIO_GP_2_10, 1);\n-\tudelay(1);\n-#endif\n-\n-#ifdef CONFIG_MMC\n-\t/* SDHI0 */\n-\tgpio_request(GPIO_GFN_SD0_DAT0, NULL);\n-\tgpio_request(GPIO_GFN_SD0_DAT1, NULL);\n-\tgpio_request(GPIO_GFN_SD0_DAT2, NULL);\n-\tgpio_request(GPIO_GFN_SD0_DAT3, NULL);\n-\tgpio_request(GPIO_GFN_SD0_CLK, NULL);\n-\tgpio_request(GPIO_GFN_SD0_CMD, NULL);\n-\tgpio_request(GPIO_GFN_SD0_CD, NULL);\n-\tgpio_request(GPIO_GFN_SD0_WP, NULL);\n-\n-\tgpio_request(GPIO_GP_5_2, NULL);\n-\tgpio_request(GPIO_GP_5_1, NULL);\n-\tgpio_direction_output(GPIO_GP_5_2, 1);\t/* power on */\n-\tgpio_direction_output(GPIO_GP_5_1, 1);\t/* 1: 3.3V, 0: 1.8V */\n-\n-\t/* SDHI1/SDHI2 eMMC */\n-\tgpio_request(GPIO_GFN_SD1_DAT0, NULL);\n-\tgpio_request(GPIO_GFN_SD1_DAT1, NULL);\n-\tgpio_request(GPIO_GFN_SD1_DAT2, NULL);\n-\tgpio_request(GPIO_GFN_SD1_DAT3, NULL);\n-\tgpio_request(GPIO_GFN_SD2_DAT0, NULL);\n-\tgpio_request(GPIO_GFN_SD2_DAT1, NULL);\n-\tgpio_request(GPIO_GFN_SD2_DAT2, NULL);\n-\tgpio_request(GPIO_GFN_SD2_DAT3, NULL);\n-\tgpio_request(GPIO_GFN_SD2_CLK, NULL);\n-#if defined(CONFIG_R8A7795)\n-\tgpio_request(GPIO_GFN_SD2_CMD, NULL);\n-#elif defined(CONFIG_R8A7796)\n-\tgpio_request(GPIO_FN_SD2_CMD, NULL);\n-#else\n-#error Only R8A7795 and R87796 is supported\n-#endif\n-\tgpio_request(GPIO_GP_5_3, NULL);\n-\tgpio_request(GPIO_GP_5_9, NULL);\n-\tgpio_direction_output(GPIO_GP_5_3, 0);\t/* 1: 3.3V, 0: 1.8V */\n-\tgpio_direction_output(GPIO_GP_5_9, 0);\t/* 1: 3.3V, 0: 1.8V */\n-\n-#if defined(CONFIG_R8A7795)\n-\t/* SDHI3 */\n-\tgpio_request(GPIO_GFN_SD3_DAT0, NULL);\t/* GP_4_9 */\n-\tgpio_request(GPIO_GFN_SD3_DAT1, NULL);\t/* GP_4_10 */\n-\tgpio_request(GPIO_GFN_SD3_DAT2, NULL);\t/* GP_4_11 */\n-\tgpio_request(GPIO_GFN_SD3_DAT3, NULL);\t/* GP_4_12 */\n-\tgpio_request(GPIO_GFN_SD3_CLK, NULL);\t/* GP_4_7 */\n-\tgpio_request(GPIO_GFN_SD3_CMD, NULL);\t/* GP_4_8 */\n-#elif defined(CONFIG_R8A7796)\n-\tgpio_request(GPIO_FN_SD3_DAT0, NULL);\t/* GP_4_9 */\n-\tgpio_request(GPIO_FN_SD3_DAT1, NULL);\t/* GP_4_10 */\n-\tgpio_request(GPIO_FN_SD3_DAT2, NULL);\t/* GP_4_11 */\n-\tgpio_request(GPIO_FN_SD3_DAT3, NULL);\t/* GP_4_12 */\n-\tgpio_request(GPIO_FN_SD3_CLK, NULL);\t/* GP_4_7 */\n-\tgpio_request(GPIO_FN_SD3_CMD, NULL);\t/* GP_4_8 */\n-#else\n-#error Only R8A7795 and R87796 is supported\n-#endif\n-\t/* IPSR10 */\n-\tgpio_request(GPIO_FN_SD3_CD, NULL);\n-\tgpio_request(GPIO_FN_SD3_WP, NULL);\n-\n-\tgpio_request(GPIO_GP_3_15, NULL);\n-\tgpio_request(GPIO_GP_3_14, NULL);\n-\tgpio_direction_output(GPIO_GP_3_15, 1);\t/* power on */\n-\tgpio_direction_output(GPIO_GP_3_14, 1);\t/* 1: 3.3V, 0: 1.8V */\n-#endif\n-\n \treturn 0;\n }\n \ndiff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c\nindex 3ee6990b57..ca1b71975b 100644\n--- a/board/renesas/ulcb/ulcb.c\n+++ b/board/renesas/ulcb/ulcb.c\n@@ -81,15 +81,6 @@ int board_init(void)\n \t/* adress of boot parameters */\n \tgd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;\n \n-#ifdef CONFIG_SH_GPIO_PFC\n-\t/* Init PFC controller */\n-#if defined(CONFIG_R8A7795)\n-\tr8a7795_pinmux_init();\n-#elif defined(CONFIG_R8A7796)\n-\tr8a7796_pinmux_init();\n-#endif\n-#endif\n-\n \t/* USB1 pull-up */\n \tsetbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);\n \n@@ -101,77 +92,6 @@ int board_init(void)\n \t/* low power status */\n \tsetbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);\n \n-#ifdef CONFIG_RENESAS_RAVB\n-\t/* EtherAVB Enable */\n-\t/* GPSR2 */\n-\tgpio_request(GPIO_GFN_AVB_AVTP_CAPTURE_A, NULL);\n-\tgpio_request(GPIO_GFN_AVB_AVTP_MATCH_A, NULL);\n-\tgpio_request(GPIO_GFN_AVB_LINK, NULL);\n-\tgpio_request(GPIO_GFN_AVB_PHY_INT, NULL);\n-\tgpio_request(GPIO_GFN_AVB_MAGIC, NULL);\n-\tgpio_request(GPIO_GFN_AVB_MDC, NULL);\n-\n-\t/* IPSR0 */\n-\tgpio_request(GPIO_IFN_AVB_MDC, NULL);\n-\tgpio_request(GPIO_IFN_AVB_MAGIC, NULL);\n-\tgpio_request(GPIO_IFN_AVB_PHY_INT, NULL);\n-\tgpio_request(GPIO_IFN_AVB_LINK, NULL);\n-\tgpio_request(GPIO_IFN_AVB_AVTP_MATCH_A, NULL);\n-\tgpio_request(GPIO_IFN_AVB_AVTP_CAPTURE_A, NULL);\n-\t/* IPSR1 */\n-\tgpio_request(GPIO_FN_AVB_AVTP_PPS, NULL);\n-\t/* IPSR2 */\n-\tgpio_request(GPIO_FN_AVB_AVTP_MATCH_B, NULL);\n-\t/* IPSR3 */\n-\tgpio_request(GPIO_FN_AVB_AVTP_CAPTURE_B, NULL);\n-\n-\t/* AVB_PHY_RST */\n-\tgpio_request(GPIO_GP_2_10, NULL);\n-\tgpio_direction_output(GPIO_GP_2_10, 0);\n-\tmdelay(20);\n-\tgpio_set_value(GPIO_GP_2_10, 1);\n-\tudelay(1);\n-#endif\n-\n-#ifdef CONFIG_MMC\n-\t/* SDHI0 */\n-\tgpio_request(GPIO_GFN_SD0_DAT0, NULL);\n-\tgpio_request(GPIO_GFN_SD0_DAT1, NULL);\n-\tgpio_request(GPIO_GFN_SD0_DAT2, NULL);\n-\tgpio_request(GPIO_GFN_SD0_DAT3, NULL);\n-\tgpio_request(GPIO_GFN_SD0_CLK, NULL);\n-\tgpio_request(GPIO_GFN_SD0_CMD, NULL);\n-\tgpio_request(GPIO_GFN_SD0_CD, NULL);\n-\tgpio_request(GPIO_GFN_SD0_WP, NULL);\n-\n-\tgpio_request(GPIO_GP_5_2, NULL);\n-\tgpio_request(GPIO_GP_5_1, NULL);\n-\tgpio_direction_output(GPIO_GP_5_2, 1);\t/* power on */\n-\tgpio_direction_output(GPIO_GP_5_1, 1);\t/* 1: 3.3V, 0: 1.8V */\n-\n-\t/* SDHI1/SDHI2 eMMC */\n-\tgpio_request(GPIO_GFN_SD1_DAT0, NULL);\n-\tgpio_request(GPIO_GFN_SD1_DAT1, NULL);\n-\tgpio_request(GPIO_GFN_SD1_DAT2, NULL);\n-\tgpio_request(GPIO_GFN_SD1_DAT3, NULL);\n-\tgpio_request(GPIO_GFN_SD2_DAT0, NULL);\n-\tgpio_request(GPIO_GFN_SD2_DAT1, NULL);\n-\tgpio_request(GPIO_GFN_SD2_DAT2, NULL);\n-\tgpio_request(GPIO_GFN_SD2_DAT3, NULL);\n-\tgpio_request(GPIO_GFN_SD2_CLK, NULL);\n-#if defined(CONFIG_R8A7795)\n-\tgpio_request(GPIO_GFN_SD2_CMD, NULL);\n-#elif defined(CONFIG_R8A7796)\n-\tgpio_request(GPIO_FN_SD2_CMD, NULL);\n-#else\n-#error Only R8A7795 and R87796 is supported\n-#endif\n-\tgpio_request(GPIO_GP_5_3, NULL);\n-\tgpio_request(GPIO_GP_5_9, NULL);\n-\tgpio_direction_output(GPIO_GP_5_3, 0);\t/* 1: 3.3V, 0: 1.8V */\n-\tgpio_direction_output(GPIO_GP_5_9, 0);\t/* 1: 3.3V, 0: 1.8V */\n-#endif\n-\n \treturn 0;\n }\n \n", "prefixes": [ "U-Boot", "4/5" ] }