Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.2/patches/811239/?format=api
{ "id": 811239, "url": "http://patchwork.ozlabs.org/api/1.2/patches/811239/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170907224051.21518-13-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170907224051.21518-13-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2017-09-07T22:40:40", "name": "[PULL,12/23] tcg/aarch64: Use constant pool for movi", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "717d58b5b9d005e8f7e07fc44bef583ea8efb687", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/1.2/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170907224051.21518-13-richard.henderson@linaro.org/mbox/", "series": [ { "id": 2073, "url": "http://patchwork.ozlabs.org/api/1.2/series/2073/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2073", "date": "2017-09-07T22:40:28", "name": "[PULL,01/23] tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.h", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2073/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/811239/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/811239/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"c+eSWtgp\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpFyK36VKz9sMN\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 8 Sep 2017 08:49:45 +1000 (AEST)", "from localhost ([::1]:42545 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dq5cF-0001UO-HD\n\tfor incoming@patchwork.ozlabs.org; Thu, 07 Sep 2017 18:49:43 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:52194)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dq5U6-00038Q-EK\n\tfor qemu-devel@nongnu.org; Thu, 07 Sep 2017 18:41:23 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dq5U1-0008Fv-Ea\n\tfor qemu-devel@nongnu.org; Thu, 07 Sep 2017 18:41:18 -0400", "from mail-pg0-x229.google.com ([2607:f8b0:400e:c05::229]:34449)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <richard.henderson@linaro.org>)\n\tid 1dq5U1-0008FE-8L\n\tfor qemu-devel@nongnu.org; Thu, 07 Sep 2017 18:41:13 -0400", "by mail-pg0-x229.google.com with SMTP id q68so1823968pgq.1\n\tfor <qemu-devel@nongnu.org>; Thu, 07 Sep 2017 15:41:13 -0700 (PDT)", "from bigtime.twiddle.net (97-126-108-236.tukw.qwest.net.\n\t[97.126.108.236]) by smtp.gmail.com with ESMTPSA id\n\th19sm770678pfh.142.2017.09.07.15.41.10\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tThu, 07 Sep 2017 15:41:10 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=GyID29fvgFconnX4hc2+M1A5fpECok1c1ASb0Yls7AI=;\n\tb=c+eSWtgplQVb6y3VMQpZFHgivuI4nvnIPHf5QqNy3vA7mu4nxgpHE0pl4m2OBXOgkV\n\tqwDDgCiNKlugaHpyKbo0u3ckP7r7wRnIo3aIfLWctzJuqfhjC2WmTwQNiVHgeqh2Ea9l\n\tj3eVaBXjbtbg8J64tpXxzDtdMx5MeXsqVl1KI=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=GyID29fvgFconnX4hc2+M1A5fpECok1c1ASb0Yls7AI=;\n\tb=oc2b/Yt/xkohOl/yDyT24fozPYzC9cLfyj8pT+EYf4iyet5sKq6l8KoyN1aUr8qqwq\n\tF0M7+peShrWKC9MnK5jpP4pBjaTlFTnhRJgdnVVJU3RrUGE7kHhcKaFc8ViAFEh7eRl0\n\tVCauHU/7FKIwBLV+tdgN0GS8q3FZjFqIWqjGIIKfOngQm/uo06h/jyNelZbQ3vhucJ85\n\tW13YsRuP+e2451wrsIwKcxyeT7yDZfylrOLFMzowT6RyEvue0Fy3sanh8UZtqiQiXose\n\txlOEhuv8uLbpUmTP00tn/Kf2mxicZstXvqBY91xbRXYrSvoWxiK/yT0MnSIJ2xd60B2n\n\t6/Ag==", "X-Gm-Message-State": "AHPjjUjiUG/BHyj5hF/AU2F7J0DSQC41w/RMw2fU1wYIhboliG+5rGfC\n\tzPX3i0htCo9UIZBjjCHEjA==", "X-Google-Smtp-Source": "ADKCNb5RiOrZUxD6zNRfOR586hfFn8TuLhutQEKM4FlS1Zfl3w91fJT3WtNB9laBGV5BIOs39QXpYA==", "X-Received": "by 10.99.171.73 with SMTP id k9mr962353pgp.196.1504824071887;\n\tThu, 07 Sep 2017 15:41:11 -0700 (PDT)", "From": "Richard Henderson <richard.henderson@linaro.org>", "To": "qemu-devel@nongnu.org", "Date": "Thu, 7 Sep 2017 15:40:40 -0700", "Message-Id": "<20170907224051.21518-13-richard.henderson@linaro.org>", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170907224051.21518-1-richard.henderson@linaro.org>", "References": "<20170907224051.21518-1-richard.henderson@linaro.org>", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400e:c05::229", "Subject": "[Qemu-devel] [PULL 12/23] tcg/aarch64: Use constant pool for movi", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "peter.maydell@linaro.org, Richard Henderson <rth@twiddle.net>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Richard Henderson <rth@twiddle.net>\n\nSigned-off-by: Richard Henderson <rth@twiddle.net>\n---\n tcg/aarch64/tcg-target.h | 1 +\n tcg/aarch64/tcg-target.inc.c | 62 +++++++++++++++++++++++---------------------\n 2 files changed, 33 insertions(+), 30 deletions(-)", "diff": "diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h\nindex 1bdbd7058b..c2525066ab 100644\n--- a/tcg/aarch64/tcg-target.h\n+++ b/tcg/aarch64/tcg-target.h\n@@ -125,5 +125,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t);\n #ifdef CONFIG_SOFTMMU\n #define TCG_TARGET_NEED_LDST_LABELS\n #endif\n+#define TCG_TARGET_NEED_POOL_LABELS\n \n #endif /* AARCH64_TCG_TARGET_H */\ndiff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c\nindex c7c751bafc..c2f3812214 100644\n--- a/tcg/aarch64/tcg-target.inc.c\n+++ b/tcg/aarch64/tcg-target.inc.c\n@@ -10,6 +10,7 @@\n * See the COPYING file in the top-level directory for details.\n */\n \n+#include \"tcg-pool.inc.c\"\n #include \"qemu/bitops.h\"\n \n /* We're going to re-use TCGType in setting of the SF bit, which controls\n@@ -587,9 +588,11 @@ static void tcg_out_logicali(TCGContext *s, AArch64Insn insn, TCGType ext,\n static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,\n tcg_target_long value)\n {\n- int i, wantinv, shift;\n tcg_target_long svalue = value;\n tcg_target_long ivalue = ~value;\n+ tcg_target_long t0, t1, t2;\n+ int s0, s1;\n+ AArch64Insn opc;\n \n /* For 32-bit values, discard potential garbage in value. For 64-bit\n values within [2**31, 2**32-1], we can create smaller sequences by\n@@ -638,38 +641,29 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,\n }\n }\n \n- /* Would it take fewer insns to begin with MOVN? For the value and its\n- inverse, count the number of 16-bit lanes that are 0. */\n- for (i = wantinv = 0; i < 64; i += 16) {\n- tcg_target_long mask = 0xffffull << i;\n- wantinv -= ((value & mask) == 0);\n- wantinv += ((ivalue & mask) == 0);\n- }\n-\n- if (wantinv <= 0) {\n- /* Find the lowest lane that is not 0x0000. */\n- shift = ctz64(value) & (63 & -16);\n- tcg_out_insn(s, 3405, MOVZ, type, rd, value >> shift, shift);\n- /* Clear out the lane that we just set. */\n- value &= ~(0xffffUL << shift);\n- /* Iterate until all non-zero lanes have been processed. */\n- while (value) {\n- shift = ctz64(value) & (63 & -16);\n- tcg_out_insn(s, 3405, MOVK, type, rd, value >> shift, shift);\n- value &= ~(0xffffUL << shift);\n- }\n+ /* Would it take fewer insns to begin with MOVN? */\n+ if (ctpop64(value) >= 32) {\n+ t0 = ivalue;\n+ opc = I3405_MOVN;\n } else {\n- /* Like above, but with the inverted value and MOVN to start. */\n- shift = ctz64(ivalue) & (63 & -16);\n- tcg_out_insn(s, 3405, MOVN, type, rd, ivalue >> shift, shift);\n- ivalue &= ~(0xffffUL << shift);\n- while (ivalue) {\n- shift = ctz64(ivalue) & (63 & -16);\n- /* Provide MOVK with the non-inverted value. */\n- tcg_out_insn(s, 3405, MOVK, type, rd, ~(ivalue >> shift), shift);\n- ivalue &= ~(0xffffUL << shift);\n+ t0 = value;\n+ opc = I3405_MOVZ;\n+ }\n+ s0 = ctz64(t0) & (63 & -16);\n+ t1 = t0 & ~(0xffffUL << s0);\n+ s1 = ctz64(t1) & (63 & -16);\n+ t2 = t1 & ~(0xffffUL << s1);\n+ if (t2 == 0) {\n+ tcg_out_insn_3405(s, opc, type, rd, t0 >> s0, s0);\n+ if (t1 != 0) {\n+ tcg_out_insn(s, 3405, MOVK, type, rd, value >> s1, s1);\n }\n+ return;\n }\n+\n+ /* For more than 2 insns, dump it into the constant pool. */\n+ new_pool_label(s, value, R_AARCH64_CONDBR19, s->code_ptr, 0);\n+ tcg_out_insn(s, 3305, LDR, 0, rd);\n }\n \n /* Define something more legible for general use. */\n@@ -2030,6 +2024,14 @@ static void tcg_target_qemu_prologue(TCGContext *s)\n tcg_out_insn(s, 3207, RET, TCG_REG_LR);\n }\n \n+static void tcg_out_nop_fill(tcg_insn_unit *p, int count)\n+{\n+ int i;\n+ for (i = 0; i < count; ++i) {\n+ p[i] = NOP;\n+ }\n+}\n+\n typedef struct {\n DebugFrameHeader h;\n uint8_t fde_def_cfa[4];\n", "prefixes": [ "PULL", "12/23" ] }