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GET /api/1.2/patches/811210/?format=api
{ "id": 811210, "url": "http://patchwork.ozlabs.org/api/1.2/patches/811210/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170907224051.21518-20-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170907224051.21518-20-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2017-09-07T22:40:47", "name": "[PULL,19/23] tcg/arm: Use constant pool for movi", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a04ca0577906eadbe8dde9caa8ffb2dce617f3de", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/1.2/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170907224051.21518-20-richard.henderson@linaro.org/mbox/", "series": [ { "id": 2073, "url": "http://patchwork.ozlabs.org/api/1.2/series/2073/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2073", "date": "2017-09-07T22:40:28", "name": "[PULL,01/23] tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.h", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2073/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/811210/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/811210/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"VmPATD0p\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpFrx6PxPz9s81\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 8 Sep 2017 08:45:05 +1000 (AEST)", "from localhost ([::1]:42527 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dq5Xj-0005pV-Ty\n\tfor incoming@patchwork.ozlabs.org; Thu, 07 Sep 2017 18:45:03 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:52344)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dq5UG-0003H4-1G\n\tfor qemu-devel@nongnu.org; Thu, 07 Sep 2017 18:41:33 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dq5UA-0008NR-T7\n\tfor qemu-devel@nongnu.org; Thu, 07 Sep 2017 18:41:28 -0400", "from mail-pf0-x233.google.com ([2607:f8b0:400e:c00::233]:35370)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <richard.henderson@linaro.org>)\n\tid 1dq5UA-0008Mo-L5\n\tfor qemu-devel@nongnu.org; Thu, 07 Sep 2017 18:41:22 -0400", "by mail-pf0-x233.google.com with SMTP id g13so1630069pfm.2\n\tfor <qemu-devel@nongnu.org>; Thu, 07 Sep 2017 15:41:22 -0700 (PDT)", "from bigtime.twiddle.net (97-126-108-236.tukw.qwest.net.\n\t[97.126.108.236]) by smtp.gmail.com with ESMTPSA id\n\th19sm770678pfh.142.2017.09.07.15.41.20\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tThu, 07 Sep 2017 15:41:20 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=yBOu7JqCOYL/zdGWF1N82TvQobuXyOfCGYZq1uRWpb0=;\n\tb=VmPATD0ptYLRoh1GGAo8LC3hiwDUVY2YE29ioS+3EobbsdwCP1G5WvXPff6bJIbng/\n\tF9zkEkp385Ms4U0n1sdkK3eKRQWopTyYDUfeiu3gl0h/urwmd1pcUKDcp6e6k+VaS5r4\n\trEA3GOjvoBntcb2/xPpC6DG0+FAgjb4E0KEco=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=yBOu7JqCOYL/zdGWF1N82TvQobuXyOfCGYZq1uRWpb0=;\n\tb=tbsRvl/O4QpaT6wHQjsNOz5funcWcT5dEwG4bkPPHUP/K1dIQg8mCByM1FauarJG5b\n\thcocglKEzqYzgdZA6np4v+H4HtSE1ZMiV+Wc8YMTubvTBGx2UK0jlhxFqRb/+gHjAh9A\n\t4tsP2GKt/KghXFXwhTfoXluYvxVgSNVMnQaoRbp0NkuYtliS5kaT1XT5GdMAxtnabOaw\n\tgyMTJ6/waKnZFbnDeOMzsj4gMjEj/SelE1UwRyfMehqg+3m7o6ho5m1EGo9fzgyPp7xE\n\tjnRBUFR/oZr44uNw1AEBG2Zr362Pp49crybebn0vAB0HSZFt0rwbSc8Fb2WnE8I/Pewu\n\tVf2A==", "X-Gm-Message-State": "AHPjjUj5zdmC/jrA0e7THcrqzcg2ZmgqP77aA/75qXOHdkhDobvnQusm\n\tMkb3g3dp+9CxKs21jbGZzg==", "X-Google-Smtp-Source": "ADKCNb4PdCLghz5H1eb2KnMixpdTsFMIvxHm+5EZbDHmuivHgmVb/fL50hg4zyaq30QF0FykgXPK/Q==", "X-Received": "by 10.98.80.13 with SMTP id e13mr939480pfb.341.1504824081298;\n\tThu, 07 Sep 2017 15:41:21 -0700 (PDT)", "From": "Richard Henderson <richard.henderson@linaro.org>", "To": "qemu-devel@nongnu.org", "Date": "Thu, 7 Sep 2017 15:40:47 -0700", "Message-Id": "<20170907224051.21518-20-richard.henderson@linaro.org>", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170907224051.21518-1-richard.henderson@linaro.org>", "References": "<20170907224051.21518-1-richard.henderson@linaro.org>", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400e:c00::233", "Subject": "[Qemu-devel] [PULL 19/23] tcg/arm: Use constant pool for movi", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "peter.maydell@linaro.org, Richard Henderson <rth@twiddle.net>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Richard Henderson <rth@twiddle.net>\n\nSigned-off-by: Richard Henderson <rth@twiddle.net>\n---\n tcg/arm/tcg-target.h | 1 +\n tcg/arm/tcg-target.inc.c | 92 ++++++++++++++++++++++++++++++++++++++----------\n 2 files changed, 75 insertions(+), 18 deletions(-)", "diff": "diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h\nindex 2e92cb3283..94b3578c55 100644\n--- a/tcg/arm/tcg-target.h\n+++ b/tcg/arm/tcg-target.h\n@@ -143,5 +143,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t);\n #ifdef CONFIG_SOFTMMU\n #define TCG_TARGET_NEED_LDST_LABELS\n #endif\n+#define TCG_TARGET_NEED_POOL_LABELS\n \n #endif\ndiff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c\nindex 78603a19db..2736022d5a 100644\n--- a/tcg/arm/tcg-target.inc.c\n+++ b/tcg/arm/tcg-target.inc.c\n@@ -23,6 +23,7 @@\n */\n \n #include \"elf.h\"\n+#include \"tcg-pool.inc.c\"\n \n int arm_arch = __ARM_ARCH;\n \n@@ -203,9 +204,39 @@ static inline void reloc_pc24_atomic(tcg_insn_unit *code_ptr, tcg_insn_unit *tar\n static void patch_reloc(tcg_insn_unit *code_ptr, int type,\n intptr_t value, intptr_t addend)\n {\n- tcg_debug_assert(type == R_ARM_PC24);\n tcg_debug_assert(addend == 0);\n- reloc_pc24(code_ptr, (tcg_insn_unit *)value);\n+\n+ if (type == R_ARM_PC24) {\n+ reloc_pc24(code_ptr, (tcg_insn_unit *)value);\n+ } else if (type == R_ARM_PC13) {\n+ intptr_t diff = value - (uintptr_t)(code_ptr + 2);\n+ tcg_insn_unit insn = *code_ptr;\n+ bool u;\n+\n+ if (diff >= -0xfff && diff <= 0xfff) {\n+ u = (diff >= 0);\n+ if (!u) {\n+ diff = -diff;\n+ }\n+ } else {\n+ int rd = extract32(insn, 12, 4);\n+ int rt = rd == TCG_REG_PC ? TCG_REG_TMP : rd;\n+ assert(diff >= 0x1000 && diff < 0x100000);\n+ /* add rt, pc, #high */\n+ *code_ptr++ = ((insn & 0xf0000000) | (1 << 25) | ARITH_ADD\n+ | (TCG_REG_PC << 16) | (rt << 12)\n+ | (20 << 7) | (diff >> 12));\n+ /* ldr rd, [rt, #low] */\n+ insn = deposit32(insn, 12, 4, rt);\n+ diff &= 0xfff;\n+ u = 1;\n+ }\n+ insn = deposit32(insn, 23, 1, u);\n+ insn = deposit32(insn, 0, 12, diff);\n+ *code_ptr = insn;\n+ } else {\n+ g_assert_not_reached();\n+ }\n }\n \n #define TCG_CT_CONST_ARM 0x100\n@@ -581,9 +612,20 @@ static inline void tcg_out_ld8s_r(TCGContext *s, int cond, TCGReg rt,\n tcg_out_memop_r(s, cond, INSN_LDRSB_REG, rt, rn, rm, 1, 1, 0);\n }\n \n+static void tcg_out_movi_pool(TCGContext *s, int cond, int rd, uint32_t arg)\n+{\n+ /* The 12-bit range on the ldr insn is sometimes a bit too small.\n+ In order to get around that we require two insns, one of which\n+ will usually be a nop, but may be replaced in patch_reloc. */\n+ new_pool_label(s, arg, R_ARM_PC13, s->code_ptr, 0);\n+ tcg_out_ld32_12(s, cond, rd, TCG_REG_PC, 0);\n+ tcg_out_nop(s);\n+}\n+\n static void tcg_out_movi32(TCGContext *s, int cond, int rd, uint32_t arg)\n {\n- int rot, opc, rn, diff;\n+ int rot, diff, opc, sh1, sh2;\n+ uint32_t tt0, tt1, tt2;\n \n /* Check a single MOV/MVN before anything else. */\n rot = encode_imm(arg);\n@@ -631,24 +673,30 @@ static void tcg_out_movi32(TCGContext *s, int cond, int rd, uint32_t arg)\n return;\n }\n \n- /* TODO: This is very suboptimal, we can easily have a constant\n- pool somewhere after all the instructions. */\n+ /* Look for sequences of two insns. If we have lots of 1's, we can\n+ shorten the sequence by beginning with mvn and then clearing\n+ higher bits with eor. */\n+ tt0 = arg;\n opc = ARITH_MOV;\n- rn = 0;\n- /* If we have lots of leading 1's, we can shorten the sequence by\n- beginning with mvn and then clearing higher bits with eor. */\n- if (clz32(~arg) > clz32(arg)) {\n- opc = ARITH_MVN, arg = ~arg;\n+ if (ctpop32(arg) > 16) {\n+ tt0 = ~arg;\n+ opc = ARITH_MVN;\n+ }\n+ sh1 = ctz32(tt0) & ~1;\n+ tt1 = tt0 & ~(0xff << sh1);\n+ sh2 = ctz32(tt1) & ~1;\n+ tt2 = tt1 & ~(0xff << sh2);\n+ if (tt2 == 0) {\n+ rot = ((32 - sh1) << 7) & 0xf00;\n+ tcg_out_dat_imm(s, cond, opc, rd, 0, ((tt0 >> sh1) & 0xff) | rot);\n+ rot = ((32 - sh2) << 7) & 0xf00;\n+ tcg_out_dat_imm(s, cond, ARITH_EOR, rd, rd,\n+ ((tt0 >> sh2) & 0xff) | rot);\n+ return;\n }\n- do {\n- int i = ctz32(arg) & ~1;\n- rot = ((32 - i) << 7) & 0xf00;\n- tcg_out_dat_imm(s, cond, opc, rd, rn, ((arg >> i) & 0xff) | rot);\n- arg &= ~(0xff << i);\n \n- opc = ARITH_EOR;\n- rn = rd;\n- } while (arg);\n+ /* Otherwise, drop it into the constant pool. */\n+ tcg_out_movi_pool(s, cond, rd, arg);\n }\n \n static inline void tcg_out_dat_rI(TCGContext *s, int cond, int opc, TCGArg dst,\n@@ -2164,6 +2212,14 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type,\n tcg_out_movi32(s, COND_AL, ret, arg);\n }\n \n+static void tcg_out_nop_fill(tcg_insn_unit *p, int count)\n+{\n+ int i;\n+ for (i = 0; i < count; ++i) {\n+ p[i] = INSN_NOP;\n+ }\n+}\n+\n /* Compute frame size via macros, to share between tcg_target_qemu_prologue\n and tcg_register_jit. */\n \n", "prefixes": [ "PULL", "19/23" ] }