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GET /api/1.2/patches/801901/?format=api
{ "id": 801901, "url": "http://patchwork.ozlabs.org/api/1.2/patches/801901/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1502862122-14771-8-git-send-email-bmeng.cn@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.2/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1502862122-14771-8-git-send-email-bmeng.cn@gmail.com>", "list_archive_url": null, "date": "2017-08-16T05:41:56", "name": "[U-Boot,07/13] x86: dm: video: Add a framebuffer driver that utilizes VBT", "commit_ref": "5df91f1c82af1b2a87a1e028de7ddd092c313655", "pull_url": null, "state": "accepted", "archived": false, "hash": "2c180373885b3615ebb8990b769dc3aada1bd183", "submitter": { "id": 64981, "url": "http://patchwork.ozlabs.org/api/1.2/people/64981/?format=api", "name": "Bin Meng", "email": "bmeng.cn@gmail.com" }, "delegate": { "id": 56520, "url": "http://patchwork.ozlabs.org/api/1.2/users/56520/?format=api", "username": "bmeng", "first_name": "Bin", "last_name": "Meng", "email": "bmeng.cn@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1502862122-14771-8-git-send-email-bmeng.cn@gmail.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/801901/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/801901/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"aewrN63P\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xXJFN2vRyz9s78\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 16 Aug 2017 15:44:24 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 3A4ACC21E4D; Wed, 16 Aug 2017 05:40:29 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 4D993C21E1C;\n\tWed, 16 Aug 2017 05:38:55 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 329C9C21DF3; Wed, 16 Aug 2017 05:37:54 +0000 (UTC)", "from mail-io0-f196.google.com (mail-io0-f196.google.com\n\t[209.85.223.196])\n\tby lists.denx.de (Postfix) with ESMTPS id 2A103C21DD9\n\tfor <u-boot@lists.denx.de>; Wed, 16 Aug 2017 05:37:50 +0000 (UTC)", "by mail-io0-f196.google.com with SMTP id c74so1780267iod.4\n\tfor <u-boot@lists.denx.de>; Tue, 15 Aug 2017 22:37:50 -0700 (PDT)", "from ala-d2121-lx1.wrs.com (unknown-156-139.windriver.com.\n\t[147.11.156.139])\n\tby smtp.gmail.com with ESMTPSA id g13sm30442ioi.0.2017.08.15.22.37.47\n\t(version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tTue, 15 Aug 2017 22:37:48 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:subject:date:message-id:in-reply-to:references;\n\tbh=jbo5MWBsbdc157NbPrTF5CK+/DPp3sn/fxyHpOXuNfM=;\n\tb=aewrN63Pcaghc1gzWZAOfg7kCQdBUnZo9S9UKxsEEwrayXk1fCSW6ZjU4uRmgOcxp1\n\tTvmbdpWIXC+6/NOXTe32jR+62raCypt9QhA36b0wHusZN9i/knEoNqXzRPUHqIZzpz+T\n\tpbuU8HoaLD5sE1ETAd0u4wGJpASL/y4l8C71Lcl+cuJuTQUUqtADGWyBim6qUlaQdYTZ\n\t6C8seC4McsO3MgzUWTrAyAlj8LgKk6NB44pQOjaXD7bxESIaStiNfkjX6RMOIeaCGb6i\n\tAszVMgIf5i7F+0ih+puSowDrdZtEsDULdzUrCk/ntjQmCHefhwLLV0FXJd8RDeGUhDse\n\tUsaQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=jbo5MWBsbdc157NbPrTF5CK+/DPp3sn/fxyHpOXuNfM=;\n\tb=hL/CBimk98ubIhRWurE81ehWxCz+qOl0rlM4pSW+MNcs/W8ajLrikT9HW7DSkN8HMO\n\tACx1IxxwVCwywoZ6vlD5uqnNh/8eNy+xquMg6i7OlezrqKL0+zLHXS9EW7i74Qp2kzcz\n\tDsS5nA/gvCAH/0Q7klsQqPmi08ZzYTiZlqJ1LiLt4MB23Z58h8QWQpeMSYk8oE9zc2GI\n\tAjHM0TIA1h867JIbgjXSTpogNolvb8osO17vQd/cXVIP5ct3YWutLOPO64X50vhiCr5q\n\t66x/vXKfeBZdbD4SL7p+FNuzfhUZpO39y+GLqZDT8VKsHzKWIA7C59lfrjtpALNLUoh/\n\t69Sw==", "X-Gm-Message-State": "AHYfb5ga8mAAjpJOxHo9OxiI2be3UcestrIQ+YN/603XpzWfnAi6Dpo5\n\t62gtJIIwp2Y/Z0zX", "X-Received": "by 10.107.56.7 with SMTP id f7mr540478ioa.52.1502861869082;\n\tTue, 15 Aug 2017 22:37:49 -0700 (PDT)", "From": "Bin Meng <bmeng.cn@gmail.com>", "To": "Simon Glass <sjg@chromium.org>,\n\tU-Boot Mailing List <u-boot@lists.denx.de>", "Date": "Tue, 15 Aug 2017 22:41:56 -0700", "Message-Id": "<1502862122-14771-8-git-send-email-bmeng.cn@gmail.com>", "X-Mailer": "git-send-email 1.7.9.5", "In-Reply-To": "<1502862122-14771-1-git-send-email-bmeng.cn@gmail.com>", "References": "<1502862122-14771-1-git-send-email-bmeng.cn@gmail.com>", "Subject": "[U-Boot] [PATCH 07/13] x86: dm: video: Add a framebuffer driver\n\tthat utilizes VBT", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "When a VBT is given to an FSP that supports graphics initialization,\nthe FSP will produce a graphics info HOB that contains all necessary\ninformation for the linear frame buffer of the integrated graphics\ndevice. This adds a DM video driver for it.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\n---\n\n arch/x86/Kconfig | 8 +++\n arch/x86/lib/fsp/Makefile | 1 +\n arch/x86/lib/fsp/fsp_graphics.c | 124 ++++++++++++++++++++++++++++++++++++++++\n 3 files changed, 133 insertions(+)\n create mode 100644 arch/x86/lib/fsp/fsp_graphics.c", "diff": "diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig\nindex b0d3266..f72d307 100644\n--- a/arch/x86/Kconfig\n+++ b/arch/x86/Kconfig\n@@ -585,6 +585,14 @@ config VBT_ADDR\n \t example, base address of 0xfff90000 indicates that the image will\n \t be put at offset 0x90000 from the beginning of a 1MB flash device.\n \n+config VIDEO_FSP\n+\tbool \"Enable FSP framebuffer driver support\"\n+\tdepends on HAVE_VBT && DM_VIDEO\n+\thelp\n+\t Turn on this option to enable a framebuffer driver when U-Boot is\n+\t using Video BIOS Table (VBT) image for FSP firmware to initialize\n+\t the integrated graphics device.\n+\n config ROM_TABLE_ADDR\n \thex\n \tdefault 0xf0000\ndiff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile\nindex 3ea4880..afe83dd3 100644\n--- a/arch/x86/lib/fsp/Makefile\n+++ b/arch/x86/lib/fsp/Makefile\n@@ -8,4 +8,5 @@ obj-y += cmd_fsp.o\n obj-y += fsp_car.o\n obj-y += fsp_common.o\n obj-y += fsp_dram.o\n+obj-$(CONFIG_VIDEO_FSP) += fsp_graphics.o\n obj-y += fsp_support.o\ndiff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c\nnew file mode 100644\nindex 0000000..a19b067\n--- /dev/null\n+++ b/arch/x86/lib/fsp/fsp_graphics.c\n@@ -0,0 +1,124 @@\n+/*\n+ * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <dm.h>\n+#include <vbe.h>\n+#include <video.h>\n+#include <asm/fsp/fsp_support.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+struct pixel {\n+\tu8 pos;\n+\tu8 size;\n+};\n+\n+static const struct fsp_framebuffer {\n+\tstruct pixel red;\n+\tstruct pixel green;\n+\tstruct pixel blue;\n+\tstruct pixel rsvd;\n+} fsp_framebuffer_format_map[] = {\n+\t[pixel_rgbx_8bpc] = { {0, 8}, {8, 8}, {16, 8}, {24, 8} },\n+\t[pixel_bgrx_8bpc] = { {16, 8}, {8, 8}, {0, 8}, {24, 8} },\n+};\n+\n+static int save_vesa_mode(struct vesa_mode_info *vesa)\n+{\n+\tconst struct hob_graphics_info *ginfo;\n+\tconst struct fsp_framebuffer *fbinfo;\n+\n+\tginfo = fsp_get_graphics_info(gd->arch.hob_list, NULL);\n+\n+\t/*\n+\t * If there is no graphics info structure, bail out and keep\n+\t * running on the serial console.\n+\t */\n+\tif (!ginfo) {\n+\t\tdebug(\"FSP graphics hand-off block not found\\n\");\n+\t\treturn -ENXIO;\n+\t}\n+\n+\tvesa->x_resolution = ginfo->width;\n+\tvesa->y_resolution = ginfo->height;\n+\tvesa->bits_per_pixel = 32;\n+\tvesa->bytes_per_scanline = ginfo->pixels_per_scanline * 4;\n+\tvesa->phys_base_ptr = ginfo->fb_base;\n+\n+\tif (ginfo->pixel_format >= pixel_bitmask) {\n+\t\tdebug(\"FSP set unknown framebuffer format: %d\\n\",\n+\t\t ginfo->pixel_format);\n+\t\treturn -EINVAL;\n+\t}\n+\tfbinfo = &fsp_framebuffer_format_map[ginfo->pixel_format];\n+\tvesa->red_mask_size = fbinfo->red.size;\n+\tvesa->red_mask_pos = fbinfo->red.pos;\n+\tvesa->green_mask_size = fbinfo->green.size;\n+\tvesa->green_mask_pos = fbinfo->green.pos;\n+\tvesa->blue_mask_size = fbinfo->blue.size;\n+\tvesa->blue_mask_pos = fbinfo->blue.pos;\n+\tvesa->reserved_mask_size = fbinfo->rsvd.size;\n+\tvesa->reserved_mask_pos = fbinfo->rsvd.pos;\n+\n+\treturn 0;\n+}\n+\n+static int fsp_video_probe(struct udevice *dev)\n+{\n+\tstruct video_uc_platdata *plat = dev_get_uclass_platdata(dev);\n+\tstruct video_priv *uc_priv = dev_get_uclass_priv(dev);\n+\tstruct vesa_mode_info *vesa = &mode_info.vesa;\n+\tint ret;\n+\n+\tprintf(\"Video: \");\n+\n+\t/* Initialize vesa_mode_info structure */\n+\tret = save_vesa_mode(vesa);\n+\tif (ret)\n+\t\tgoto err;\n+\n+\t/*\n+\t * The framebuffer base address in the FSP graphics info HOB reflects\n+\t * the value assigned by the FSP. After PCI enumeration the framebuffer\n+\t * base address may be relocated. Let's get the updated one from device.\n+\t *\n+\t * For IGD, it seems to be always on BAR2.\n+\t */\n+\tvesa->phys_base_ptr = dm_pci_read_bar32(dev, 2);\n+\n+\tret = vbe_setup_video_priv(vesa, uc_priv, plat);\n+\tif (ret)\n+\t\tgoto err;\n+\n+\tprintf(\"%dx%dx%d\\n\", uc_priv->xsize, uc_priv->ysize,\n+\t vesa->bits_per_pixel);\n+\n+\treturn 0;\n+\n+err:\n+\tprintf(\"No video mode configured in FSP!\\n\");\n+\treturn ret;\n+}\n+\n+static const struct udevice_id fsp_video_ids[] = {\n+\t{ .compatible = \"fsp-fb\" },\n+\t{ }\n+};\n+\n+U_BOOT_DRIVER(fsp_video) = {\n+\t.name\t= \"fsp_video\",\n+\t.id\t= UCLASS_VIDEO,\n+\t.of_match = fsp_video_ids,\n+\t.probe\t= fsp_video_probe,\n+};\n+\n+static struct pci_device_id fsp_video_supported[] = {\n+\t{ PCI_DEVICE_CLASS(PCI_CLASS_DISPLAY_VGA << 8, 0xffff00) },\n+\t{ },\n+};\n+\n+U_BOOT_PCI_DEVICE(fsp_video, fsp_video_supported);\n", "prefixes": [ "U-Boot", "07/13" ] }