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GET /api/1.2/patches/801456/?format=api
{ "id": 801456, "url": "http://patchwork.ozlabs.org/api/1.2/patches/801456/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openbmc/patch/20170815072102.23067-1-andrew@aj.id.au/", "project": { "id": 56, "url": "http://patchwork.ozlabs.org/api/1.2/projects/56/?format=api", "name": "OpenBMC development", "link_name": "openbmc", "list_id": "openbmc.lists.ozlabs.org", "list_email": "openbmc@lists.ozlabs.org", "web_url": "http://github.com/openbmc/", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170815072102.23067-1-andrew@aj.id.au>", "list_archive_url": null, "date": "2017-08-15T07:21:02", "name": "i2c: aspeed: Retain delay/setup/hold values when configuring bus frequency", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "624e48c3ff555795529a70b0dbda7c4d055f8827", "submitter": { "id": 68332, "url": "http://patchwork.ozlabs.org/api/1.2/people/68332/?format=api", "name": "Andrew Jeffery", "email": "andrew@aj.id.au" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/openbmc/patch/20170815072102.23067-1-andrew@aj.id.au/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/801456/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/801456/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "openbmc@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "openbmc@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xWkSP0znRz9t32\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 15 Aug 2017 17:21:57 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xWkSN6vHgzDrJc\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 15 Aug 2017 17:21:56 +1000 (AEST)", "from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com\n\t[66.111.4.28])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xWkS82XP1zDrJD;\n\tTue, 15 Aug 2017 17:21:43 +1000 (AEST)", "from compute4.internal (compute4.nyi.internal [10.202.2.44])\n\tby mailout.nyi.internal (Postfix) with ESMTP id 4A68A2083F;\n\tTue, 15 Aug 2017 03:21:40 -0400 (EDT)", "from frontend2 ([10.202.2.161])\n\tby compute4.internal (MEProxy); Tue, 15 Aug 2017 03:21:40 -0400", "from keelia.au.ibm.com (unknown [203.0.153.9])\n\tby mail.messagingengine.com (Postfix) with ESMTPA id 75E56244B4;\n\tTue, 15 Aug 2017 03:21:36 -0400 (EDT)" ], "Authentication-Results": [ "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=aj.id.au header.i=@aj.id.au header.b=\"l2Onq2+6\";\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=messagingengine.com\n\theader.i=@messagingengine.com header.b=\"llInxmLf\"; \n\tdkim-atps=neutral", "lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=aj.id.au header.i=@aj.id.au header.b=\"l2Onq2+6\";\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=messagingengine.com\n\theader.i=@messagingengine.com header.b=\"llInxmLf\"; \n\tdkim-atps=neutral", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=aj.id.au header.i=@aj.id.au header.b=\"l2Onq2+6\";\n\tdkim=pass (2048-bit key;\n\tunprotected) header.d=messagingengine.com\n\theader.i=@messagingengine.com\n\theader.b=\"llInxmLf\"; dkim-atps=neutral" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc\n\t:date:from:message-id:subject:to:x-me-sender:x-me-sender\n\t:x-sasl-enc:x-sasl-enc; s=fm1; bh=OgKfMeb2Y9tE1TVykTcqQUGm11+u9B\n\tLmCxt1DDfx4O4=; b=l2Onq2+6+wT9UPaW9vQQf/1auTDId8hCV/xpRQQhghfjL9\n\tItefnjtGvZyw6UssHQo1R0XBRTNftnY65hw8VLrwFLpJSuRu0ll4AxmbrZzb2jhw\n\t+FuipAha5yeqemfpEvAx+43k7ezoFrK4219BQIa3FrUlhuK8oqrfeEt3m1kCJVD2\n\tAOrtsUb3NWJ3LrdbvEnR1bbsbfMkFUxwQc2D7lPuBRT662gAQS509lF9oOd3bjVO\n\tyCm3Cv+vq922cfU0evT2qK9qr1wFON9kbDm2sQEmE1xrR3WdCXhGnihZH9C+a+XW\n\tqi0NdMRkS3BgzTG6GeiGgeF4AABQY397NbismPlw==", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n\tmessagingengine.com; h=cc:date:from:message-id:subject:to\n\t:x-me-sender:x-me-sender:x-sasl-enc:x-sasl-enc; s=fm1; bh=OgKfMe\n\tb2Y9tE1TVykTcqQUGm11+u9BLmCxt1DDfx4O4=; b=llInxmLfLQVVzVXhzjELdQ\n\tbbm72m4UqYfSvI3z4eBTjZtJ7N8V1dI0KL/OFuUMDZsH6g7Vd9MOh7UOPU9lmfgI\n\tbpBE8zygqaqxGLptJLAC6rWqJ+dan5JFNYfxI8jq1rMnrrx45gY/FiIgWnfADylt\n\tO+frk5Bo8YEIZiLupCFWktzalPKTTtq0R5xSxUxJR4dhhFax0TGsmn0vzhClZmvY\n\tBeYJiUOFV0X/1I570FulvGAGMv4JjM/HNWLKZb4R+qRN13DNSQuZheqrl8HZ51qk\n\tLpTm7/0HaMkjy2lDvDrjjXBTLkoLDnoTRejCtdLDECdzp5aE/cxAXvzd5Dbh4NhQ\n\t==" ], "X-ME-Sender": "<xms:BKGSWf1D8y_PzbvU_oxfzW1oPCv3LFLu8l9PuPo6bX30fqD4P3TZHw>", "X-Sasl-enc": "XAJMdXutb/OF+0vpf8QojVymBc5bo71OzcGHCO3ZIQbV 1502781699", "From": "Andrew Jeffery <andrew@aj.id.au>", "To": "linux-i2c@vger.kernel.org", "Subject": "[PATCH] i2c: aspeed: Retain delay/setup/hold values when configuring\n\tbus frequency", "Date": "Tue, 15 Aug 2017 16:51:02 +0930", "Message-Id": "<20170815072102.23067-1-andrew@aj.id.au>", "X-Mailer": "git-send-email 2.11.0", "X-BeenThere": "openbmc@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Development list for OpenBMC <openbmc.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/openbmc/>", "List-Post": "<mailto:openbmc@lists.ozlabs.org>", "List-Help": "<mailto:openbmc-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/openbmc>,\n\t<mailto:openbmc-request@lists.ozlabs.org?subject=subscribe>", "Cc": "ryan_chen@aspeedtech.com, linux-aspeed@lists.ozlabs.org,\n\twsa@the-dreams.de, \n\tAndrew Jeffery <andrew@aj.id.au>, openbmc@lists.ozlabs.org,\n\tbrendanhiggins@google.com, linux-kernel@vger.kernel.org", "Errors-To": "openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"openbmc\"\n\t<openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "In addition to the base, low and high clock configuration, the AC timing\nregister #1 on the AST2400 houses fields controlling:\n\n1. tBUF: Minimum delay between Stop and Start conditions\n2. tHDSTA: Hold time for the Start condition\n3. tACST: Setup time for Start and Stop conditions, and hold time for the\n Repeated Start condition\n\nThese values are defined in hardware on the AST2500 and therefore don't\nneed to be set.\n\naspeed_i2c_init_clk() was performing a direct write of the generated\nclock values rather than a read/mask/modify/update sequence to retain\ntBUF, tHDSTA and tACST, and therefore cleared the tBUF, tHDSTA and tACST\nfields on the AST2400. This resulted in a delay/setup/hold time of 1\nbase clock, which in some configurations is not enough for some devices\n(e.g. the MAX31785 fan controller, with an APB of 48MHz and a desired\nbus speed of 100kHz).\n\nSigned-off-by: Andrew Jeffery <andrew@aj.id.au>\n---\n drivers/i2c/busses/i2c-aspeed.c | 9 ++++++++-\n 1 file changed, 8 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c\nindex ee76e6dddc4b..284f8670dbeb 100644\n--- a/drivers/i2c/busses/i2c-aspeed.c\n+++ b/drivers/i2c/busses/i2c-aspeed.c\n@@ -53,6 +53,9 @@\n #define ASPEED_I2CD_MASTER_EN\t\t\t\tBIT(0)\n \n /* 0x04 : I2CD Clock and AC Timing Control Register #1 */\n+#define ASPEED_I2CD_TIME_TBUF_MASK\t\t\tGENMASK(31, 28)\n+#define ASPEED_I2CD_TIME_THDSTA_MASK\t\t\tGENMASK(27, 24)\n+#define ASPEED_I2CD_TIME_TACST_MASK\t\t\tGENMASK(23, 20)\n #define ASPEED_I2CD_TIME_SCL_HIGH_SHIFT\t\t\t16\n #define ASPEED_I2CD_TIME_SCL_HIGH_MASK\t\t\tGENMASK(19, 16)\n #define ASPEED_I2CD_TIME_SCL_LOW_SHIFT\t\t\t12\n@@ -744,7 +747,11 @@ static int aspeed_i2c_init_clk(struct aspeed_i2c_bus *bus)\n \tu32 divisor, clk_reg_val;\n \n \tdivisor = DIV_ROUND_UP(bus->parent_clk_frequency, bus->bus_frequency);\n-\tclk_reg_val = bus->get_clk_reg_val(divisor);\n+\tclk_reg_val = readl(bus->base + ASPEED_I2C_AC_TIMING_REG1);\n+\tclk_reg_val &= (ASPEED_I2CD_TIME_TBUF_MASK |\n+\t\t\tASPEED_I2CD_TIME_THDSTA_MASK |\n+\t\t\tASPEED_I2CD_TIME_TACST_MASK);\n+\tclk_reg_val |= bus->get_clk_reg_val(divisor);\n \twritel(clk_reg_val, bus->base + ASPEED_I2C_AC_TIMING_REG1);\n \twritel(ASPEED_NO_TIMEOUT_CTRL, bus->base + ASPEED_I2C_AC_TIMING_REG2);\n \n", "prefixes": [] }