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{
    "id": 800940,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/800940/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1502582477-27948-1-git-send-email-yamada.masahiro@socionext.com/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1502582477-27948-1-git-send-email-yamada.masahiro@socionext.com>",
    "list_archive_url": null,
    "date": "2017-08-13T00:01:13",
    "name": "[U-Boot,1/5] ARM: uniphier: remove sLD3 SoC support",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "5242a9da2c17db448be85d4dbc050e8f6fe04a90",
    "submitter": {
        "id": 65882,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/65882/?format=api",
        "name": "Masahiro Yamada",
        "email": "yamada.masahiro@socionext.com"
    },
    "delegate": {
        "id": 38701,
        "url": "http://patchwork.ozlabs.org/api/1.2/users/38701/?format=api",
        "username": "masahir0y",
        "first_name": "Masahiro",
        "last_name": "Yamada",
        "email": "yamada.m@jp.panasonic.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1502582477-27948-1-git-send-email-yamada.masahiro@socionext.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/800940/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/800940/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Masahiro Yamada <yamada.masahiro@socionext.com>",
        "To": "u-boot@lists.denx.de",
        "Date": "Sun, 13 Aug 2017 09:01:13 +0900",
        "Message-Id": "<1502582477-27948-1-git-send-email-yamada.masahiro@socionext.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "Cc": "Albert Aribaud <albert.u.boot@aribaud.net>",
        "Subject": "[U-Boot] [PATCH 1/5] ARM: uniphier: remove sLD3 SoC support",
        "X-BeenThere": "u-boot@lists.denx.de",
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        "List-Id": "U-Boot discussion <u-boot.lists.denx.de>",
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        "Errors-To": "u-boot-bounces@lists.denx.de",
        "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>"
    },
    "content": "This SoC is too old.  It is difficult to maintain any longer.\n\nSigned-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>\n---\n\n arch/arm/dts/Makefile                              |   2 -\n arch/arm/dts/uniphier-sld3-ref.dts                 | 100 -----\n arch/arm/dts/uniphier-sld3.dtsi                    | 458 ---------------------\n arch/arm/mach-uniphier/Kconfig                     |   4 -\n arch/arm/mach-uniphier/arm32/cache-uniphier.c      |   3 -\n arch/arm/mach-uniphier/arm32/debug_ll.S            |  21 -\n arch/arm/mach-uniphier/arm32/lowlevel_init.S       |   5 +-\n arch/arm/mach-uniphier/arm32/psci.c                |   1 -\n arch/arm/mach-uniphier/bcu/Makefile                |   1 -\n arch/arm/mach-uniphier/bcu/bcu-sld3.c              |  39 --\n arch/arm/mach-uniphier/board_init.c                |   9 -\n arch/arm/mach-uniphier/boards.c                    |  22 -\n arch/arm/mach-uniphier/boot-device/Makefile        |   1 -\n .../mach-uniphier/boot-device/boot-device-sld3.c   |  84 ----\n arch/arm/mach-uniphier/boot-device/boot-device.c   |   9 -\n arch/arm/mach-uniphier/boot-device/boot-device.h   |   2 -\n arch/arm/mach-uniphier/clk/Makefile                |  14 +-\n .../clk/{clk-dram-sld3.c => clk-dram-ld4.c}        |   2 +-\n .../clk/{clk-early-sld3.c => clk-early-ld4.c}      |   2 +-\n arch/arm/mach-uniphier/clk/dpll-sld3.c             |  13 -\n arch/arm/mach-uniphier/clk/pll-sld3.c              |  14 -\n arch/arm/mach-uniphier/cpu-info.c                  |   4 -\n arch/arm/mach-uniphier/debug-uart/Makefile         |   1 -\n .../arm/mach-uniphier/debug-uart/debug-uart-sld3.c |  31 --\n arch/arm/mach-uniphier/debug-uart/debug-uart.c     |   5 -\n arch/arm/mach-uniphier/debug-uart/debug-uart.h     |   1 -\n arch/arm/mach-uniphier/dram/Makefile               |   1 -\n arch/arm/mach-uniphier/dram/umc-sld3.c             |   6 -\n arch/arm/mach-uniphier/dram_init.c                 |   9 -\n arch/arm/mach-uniphier/init.h                      |  10 +-\n arch/arm/mach-uniphier/memconf.c                   |  14 +-\n arch/arm/mach-uniphier/mmc-boot-mode.c             |   2 +-\n arch/arm/mach-uniphier/sc-regs.h                   |   4 -\n arch/arm/mach-uniphier/soc-info.h                  |   1 -\n arch/arm/mach-uniphier/spl_board_init.c            |  29 +-\n configs/uniphier_sld3_defconfig                    |  46 ---\n doc/README.uniphier                                |   1 -\n drivers/clk/uniphier/clk-uniphier-core.c           |   4 -\n drivers/clk/uniphier/clk-uniphier-mio.c            |   2 -\n drivers/pinctrl/uniphier/Kconfig                   |   6 -\n drivers/pinctrl/uniphier/Makefile                  |   1 -\n drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c   | 129 ------\n drivers/reset/reset-uniphier.c                     |  14 +-\n include/configs/uniphier.h                         |   8 +-\n 44 files changed, 30 insertions(+), 1105 deletions(-)\n delete mode 100644 arch/arm/dts/uniphier-sld3-ref.dts\n delete mode 100644 arch/arm/dts/uniphier-sld3.dtsi\n delete mode 100644 arch/arm/mach-uniphier/bcu/bcu-sld3.c\n delete mode 100644 arch/arm/mach-uniphier/boot-device/boot-device-sld3.c\n rename arch/arm/mach-uniphier/clk/{clk-dram-sld3.c => clk-dram-ld4.c} (93%)\n rename arch/arm/mach-uniphier/clk/{clk-early-sld3.c => clk-early-ld4.c} (93%)\n delete mode 100644 arch/arm/mach-uniphier/clk/dpll-sld3.c\n delete mode 100644 arch/arm/mach-uniphier/clk/pll-sld3.c\n delete mode 100644 arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c\n delete mode 100644 arch/arm/mach-uniphier/dram/umc-sld3.c\n delete mode 100644 configs/uniphier_sld3_defconfig\n delete mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c",
    "diff": "diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex c2dc240edf68..8f6b186df828 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -118,8 +118,6 @@ dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \\\n \tuniphier-pxs2-vodka.dtb\n dtb-$(CONFIG_ARCH_UNIPHIER_PXS3) += \\\n \tuniphier-pxs3-ref.dtb\n-dtb-$(CONFIG_ARCH_UNIPHIER_SLD3) += \\\n-\tuniphier-sld3-ref.dtb\n dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \\\n \tuniphier-sld8-ref.dtb\n \ndiff --git a/arch/arm/dts/uniphier-sld3-ref.dts b/arch/arm/dts/uniphier-sld3-ref.dts\ndeleted file mode 100644\nindex baf706976aca..000000000000\n--- a/arch/arm/dts/uniphier-sld3-ref.dts\n+++ /dev/null\n@@ -1,100 +0,0 @@\n-/*\n- * Device Tree Source for UniPhier sLD3 Reference Board\n- *\n- * Copyright (C) 2015-2016 Socionext Inc.\n- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>\n- *\n- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)\n- */\n-\n-/dts-v1/;\n-/include/ \"uniphier-sld3.dtsi\"\n-/include/ \"uniphier-ref-daughter.dtsi\"\n-/include/ \"uniphier-support-card.dtsi\"\n-\n-/ {\n-\tmodel = \"UniPhier sLD3 Reference Board\";\n-\tcompatible = \"socionext,uniphier-sld3-ref\", \"socionext,uniphier-sld3\";\n-\n-\tchosen {\n-\t\tstdout-path = \"serial0:115200n8\";\n-\t};\n-\n-\taliases {\n-\t\tserial0 = &serial0;\n-\t\tserial1 = &serial1;\n-\t\tserial2 = &serial2;\n-\t\ti2c0 = &i2c0;\n-\t\ti2c1 = &i2c1;\n-\t\ti2c2 = &i2c2;\n-\t\ti2c3 = &i2c3;\n-\t\ti2c4 = &i2c4;\n-\t};\n-\n-\tmemory@8000000 {\n-\t\tdevice_type = \"memory\";\n-\t\treg = <0x80000000 0x20000000\n-\t\t       0xc0000000 0x20000000>;\n-\t};\n-};\n-\n-&ethsc {\n-\tinterrupts = <0 49 4>;\n-};\n-\n-&serial0 {\n-\tstatus = \"okay\";\n-};\n-\n-&serial1 {\n-\tstatus = \"okay\";\n-};\n-\n-&serial2 {\n-\tstatus = \"okay\";\n-};\n-\n-&i2c0 {\n-\tstatus = \"okay\";\n-};\n-\n-&emmc {\n-\tstatus = \"okay\";\n-};\n-\n-&sd {\n-\tstatus = \"okay\";\n-};\n-\n-&usb0 {\n-\tstatus = \"okay\";\n-};\n-\n-&usb1 {\n-\tstatus = \"okay\";\n-};\n-\n-&usb2 {\n-\tstatus = \"okay\";\n-};\n-\n-&usb3 {\n-\tstatus = \"okay\";\n-};\n-\n-/* for U-Boot only */\n-&serial0 {\n-       u-boot,dm-pre-reloc;\n-};\n-\n-&emmc {\n-       u-boot,dm-pre-reloc;\n-};\n-\n-&pinctrl_uart0 {\n-\tu-boot,dm-pre-reloc;\n-};\n-\n-&pinctrl_emmc {\n-\tu-boot,dm-pre-reloc;\n-};\ndiff --git a/arch/arm/dts/uniphier-sld3.dtsi b/arch/arm/dts/uniphier-sld3.dtsi\ndeleted file mode 100644\nindex 2bb2e029eeeb..000000000000\n--- a/arch/arm/dts/uniphier-sld3.dtsi\n+++ /dev/null\n@@ -1,458 +0,0 @@\n-/*\n- * Device Tree Source for UniPhier sLD3 SoC\n- *\n- * Copyright (C) 2015-2016 Socionext Inc.\n- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>\n- *\n- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)\n- */\n-\n-/ {\n-\tcompatible = \"socionext,uniphier-sld3\";\n-\t#address-cells = <1>;\n-\t#size-cells = <1>;\n-\n-\tcpus {\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <0>;\n-\n-\t\tcpu@0 {\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\tcompatible = \"arm,cortex-a9\";\n-\t\t\treg = <0>;\n-\t\t\tenable-method = \"psci\";\n-\t\t\tnext-level-cache = <&l2>;\n-\t\t};\n-\n-\t\tcpu@1 {\n-\t\t\tdevice_type = \"cpu\";\n-\t\t\tcompatible = \"arm,cortex-a9\";\n-\t\t\treg = <1>;\n-\t\t\tenable-method = \"psci\";\n-\t\t\tnext-level-cache = <&l2>;\n-\t\t};\n-\t};\n-\n-\tpsci {\n-\t\tcompatible = \"arm,psci-0.2\";\n-\t\tmethod = \"smc\";\n-\t};\n-\n-\tclocks {\n-\t\trefclk: ref {\n-\t\t\t#clock-cells = <0>;\n-\t\t\tcompatible = \"fixed-clock\";\n-\t\t\tclock-frequency = <24576000>;\n-\t\t};\n-\n-\t\tarm_timer_clk: arm_timer_clk {\n-\t\t\t#clock-cells = <0>;\n-\t\t\tcompatible = \"fixed-clock\";\n-\t\t\tclock-frequency = <50000000>;\n-\t\t};\n-\t};\n-\n-\tsoc {\n-\t\tcompatible = \"simple-bus\";\n-\t\t#address-cells = <1>;\n-\t\t#size-cells = <1>;\n-\t\tranges;\n-\t\tinterrupt-parent = <&intc>;\n-\t\tu-boot,dm-pre-reloc;\n-\n-\t\ttimer@20000200 {\n-\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n-\t\t\treg = <0x20000200 0x20>;\n-\t\t\tinterrupts = <1 11 0x304>;\n-\t\t\tclocks = <&arm_timer_clk>;\n-\t\t};\n-\n-\t\ttimer@20000600 {\n-\t\t\tcompatible = \"arm,cortex-a9-twd-timer\";\n-\t\t\treg = <0x20000600 0x20>;\n-\t\t\tinterrupts = <1 13 0x304>;\n-\t\t\tclocks = <&arm_timer_clk>;\n-\t\t};\n-\n-\t\tintc: interrupt-controller@20001000 {\n-\t\t\tcompatible = \"arm,cortex-a9-gic\";\n-\t\t\t#interrupt-cells = <3>;\n-\t\t\tinterrupt-controller;\n-\t\t\treg = <0x20001000 0x1000>,\n-\t\t\t      <0x20000100 0x100>;\n-\t\t};\n-\n-\t\tl2: l2-cache@500c0000 {\n-\t\t\tcompatible = \"socionext,uniphier-system-cache\";\n-\t\t\treg = <0x500c0000 0x2000>, <0x503c0100 0x4>,\n-\t\t\t      <0x506c0000 0x400>;\n-\t\t\tinterrupts = <0 174 4>, <0 175 4>;\n-\t\t\tcache-unified;\n-\t\t\tcache-size = <(512 * 1024)>;\n-\t\t\tcache-sets = <256>;\n-\t\t\tcache-line-size = <128>;\n-\t\t\tcache-level = <2>;\n-\t\t};\n-\n-\t\tserial0: serial@54006800 {\n-\t\t\tcompatible = \"socionext,uniphier-uart\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x54006800 0x40>;\n-\t\t\tinterrupts = <0 33 4>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_uart0>;\n-\t\t\tclocks = <&sys_clk 0>;\n-\t\t\tclock-frequency = <36864000>;\n-\t\t};\n-\n-\t\tserial1: serial@54006900 {\n-\t\t\tcompatible = \"socionext,uniphier-uart\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x54006900 0x40>;\n-\t\t\tinterrupts = <0 35 4>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_uart1>;\n-\t\t\tclocks = <&sys_clk 0>;\n-\t\t\tclock-frequency = <36864000>;\n-\t\t};\n-\n-\t\tserial2: serial@54006a00 {\n-\t\t\tcompatible = \"socionext,uniphier-uart\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x54006a00 0x40>;\n-\t\t\tinterrupts = <0 37 4>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_uart2>;\n-\t\t\tclocks = <&sys_clk 0>;\n-\t\t\tclock-frequency = <36864000>;\n-\t\t};\n-\n-\t\tport0x: gpio@55000008 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000008 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport1x: gpio@55000010 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000010 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport2x: gpio@55000018 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000018 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport3x: gpio@55000020 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000020 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport4: gpio@55000028 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000028 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport5x: gpio@55000030 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000030 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport6x: gpio@55000038 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000038 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport7x: gpio@55000040 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000040 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport8x: gpio@55000048 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000048 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport9x: gpio@55000050 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000050 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport10x: gpio@55000058 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000058 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport11x: gpio@55000060 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000060 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport12x: gpio@55000068 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000068 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport13x: gpio@55000070 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000070 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport14x: gpio@55000078 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000078 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\tport16x: gpio@55000088 {\n-\t\t\tcompatible = \"socionext,uniphier-gpio\";\n-\t\t\treg = <0x55000088 0x8>;\n-\t\t\tgpio-controller;\n-\t\t\t#gpio-cells = <2>;\n-\t\t};\n-\n-\t\ti2c0: i2c@58400000 {\n-\t\t\tcompatible = \"socionext,uniphier-i2c\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x58400000 0x40>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t\tinterrupts = <0 41 1>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_i2c0>;\n-\t\t\tclocks = <&sys_clk 1>;\n-\t\t\tclock-frequency = <100000>;\n-\t\t};\n-\n-\t\ti2c1: i2c@58480000 {\n-\t\t\tcompatible = \"socionext,uniphier-i2c\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x58480000 0x40>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t\tinterrupts = <0 42 1>;\n-\t\t\tclocks = <&sys_clk 1>;\n-\t\t\tclock-frequency = <100000>;\n-\t\t};\n-\n-\t\ti2c2: i2c@58500000 {\n-\t\t\tcompatible = \"socionext,uniphier-i2c\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x58500000 0x40>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t\tinterrupts = <0 43 1>;\n-\t\t\tclocks = <&sys_clk 1>;\n-\t\t\tclock-frequency = <100000>;\n-\t\t};\n-\n-\t\ti2c3: i2c@58580000 {\n-\t\t\tcompatible = \"socionext,uniphier-i2c\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x58580000 0x40>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t\tinterrupts = <0 44 1>;\n-\t\t\tclocks = <&sys_clk 1>;\n-\t\t\tclock-frequency = <100000>;\n-\t\t};\n-\n-\t\t/* chip-internal connection for DMD */\n-\t\ti2c4: i2c@58600000 {\n-\t\t\tcompatible = \"socionext,uniphier-i2c\";\n-\t\t\treg = <0x58600000 0x40>;\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n-\t\t\tinterrupts = <0 45 1>;\n-\t\t\tclocks = <&sys_clk 1>;\n-\t\t\tclock-frequency = <400000>;\n-\t\t};\n-\n-\t\tsystem_bus: system-bus@58c00000 {\n-\t\t\tcompatible = \"socionext,uniphier-system-bus\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x58c00000 0x400>;\n-\t\t\t#address-cells = <2>;\n-\t\t\t#size-cells = <1>;\n-\t\t};\n-\n-\t\tsmpctrl@59801000 {\n-\t\t\tcompatible = \"socionext,uniphier-smpctrl\";\n-\t\t\treg = <0x59801000 0x400>;\n-\t\t};\n-\n-\t\tmioctrl@59810000 {\n-\t\t\tcompatible = \"socionext,uniphier-sld3-mioctrl\",\n-\t\t\t\t     \"simple-mfd\", \"syscon\";\n-\t\t\treg = <0x59810000 0x800>;\n-\t\t\tu-boot,dm-pre-reloc;\n-\n-\t\t\tmio_clk: clock {\n-\t\t\t\tcompatible = \"socionext,uniphier-sld3-mio-clock\";\n-\t\t\t\t#clock-cells = <1>;\n-\t\t\t\tu-boot,dm-pre-reloc;\n-\t\t\t};\n-\n-\t\t\tmio_rst: reset {\n-\t\t\t\tcompatible = \"socionext,uniphier-sld3-mio-reset\";\n-\t\t\t\t#reset-cells = <1>;\n-\t\t\t};\n-\t\t};\n-\n-\t\temmc: sdhc@5a400000 {\n-\t\t\tcompatible = \"socionext,uniphier-sdhc\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x5a400000 0x200>;\n-\t\t\tinterrupts = <0 78 4>;\n-\t\t\tpinctrl-names = \"default\", \"1.8v\";\n-\t\t\tpinctrl-0 = <&pinctrl_emmc>;\n-\t\t\tpinctrl-1 = <&pinctrl_emmc_1v8>;\n-\t\t\tclocks = <&mio_clk 1>;\n-\t\t\treset-names = \"host\", \"bridge\";\n-\t\t\tresets = <&mio_rst 1>, <&mio_rst 4>;\n-\t\t\tbus-width = <8>;\n-\t\t\tnon-removable;\n-\t\t\tcap-mmc-highspeed;\n-\t\t\tcap-mmc-hw-reset;\n-\t\t};\n-\n-\t\tsd: sdhc@5a500000 {\n-\t\t\tcompatible = \"socionext,uniphier-sdhc\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x5a500000 0x200>;\n-\t\t\tinterrupts = <0 76 4>;\n-\t\t\tpinctrl-names = \"default\", \"1.8v\";\n-\t\t\tpinctrl-0 = <&pinctrl_sd>;\n-\t\t\tpinctrl-1 = <&pinctrl_sd_1v8>;\n-\t\t\tclocks = <&mio_clk 0>;\n-\t\t\treset-names = \"host\", \"bridge\";\n-\t\t\tresets = <&mio_rst 0>, <&mio_rst 3>;\n-\t\t\tbus-width = <4>;\n-\t\t\tcap-sd-highspeed;\n-\t\t\tsd-uhs-sdr12;\n-\t\t\tsd-uhs-sdr25;\n-\t\t\tsd-uhs-sdr50;\n-\t\t};\n-\n-\t\tusb0: usb@5a800100 {\n-\t\t\tcompatible = \"socionext,uniphier-ehci\", \"generic-ehci\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x5a800100 0x100>;\n-\t\t\tinterrupts = <0 80 4>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_usb0>;\n-\t\t\tclocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;\n-\t\t\tresets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,\n-\t\t\t\t <&mio_rst 12>;\n-\t\t};\n-\n-\t\tusb1: usb@5a810100 {\n-\t\t\tcompatible = \"socionext,uniphier-ehci\", \"generic-ehci\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x5a810100 0x100>;\n-\t\t\tinterrupts = <0 81 4>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_usb1>;\n-\t\t\tclocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;\n-\t\t\tresets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,\n-\t\t\t\t <&mio_rst 13>;\n-\t\t};\n-\n-\t\tusb2: usb@5a820100 {\n-\t\t\tcompatible = \"socionext,uniphier-ehci\", \"generic-ehci\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x5a820100 0x100>;\n-\t\t\tinterrupts = <0 82 4>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_usb2>;\n-\t\t\tclocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;\n-\t\t\tresets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,\n-\t\t\t\t <&mio_rst 14>;\n-\t\t};\n-\n-\t\tusb3: usb@5a830100 {\n-\t\t\tcompatible = \"socionext,uniphier-ehci\", \"generic-ehci\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg = <0x5a830100 0x100>;\n-\t\t\tinterrupts = <0 83 4>;\n-\t\t\tpinctrl-names = \"default\";\n-\t\t\tpinctrl-0 = <&pinctrl_usb3>;\n-\t\t\tclocks = <&mio_clk 7>, <&mio_clk 11>, <&mio_clk 15>;\n-\t\t\tresets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 11>,\n-\t\t\t\t <&mio_rst 15>;\n-\t\t};\n-\n-\t\tsoc-glue@5f800000 {\n-\t\t\tcompatible = \"socionext,uniphier-sld3-soc-glue\",\n-\t\t\t\t     \"simple-mfd\", \"syscon\";\n-\t\t\treg = <0x5f800000 0x2000>;\n-\t\t\tu-boot,dm-pre-reloc;\n-\n-\t\t\tpinctrl: pinctrl {\n-\t\t\t\tcompatible = \"socionext,uniphier-sld3-pinctrl\";\n-\t\t\t\tu-boot,dm-pre-reloc;\n-\t\t\t};\n-\t\t};\n-\n-\t\taidet@f1830000 {\n-\t\t\tcompatible = \"simple-mfd\", \"syscon\";\n-\t\t\treg = <0xf1830000 0x200>;\n-\t\t};\n-\n-\t\tsysctrl@f1840000 {\n-\t\t\tcompatible = \"socionext,uniphier-sld3-sysctrl\",\n-\t\t\t\t     \"simple-mfd\", \"syscon\";\n-\t\t\treg = <0xf1840000 0x10000>;\n-\n-\t\t\tsys_clk: clock {\n-\t\t\t\tcompatible = \"socionext,uniphier-sld3-clock\";\n-\t\t\t\t#clock-cells = <1>;\n-\t\t\t};\n-\n-\t\t\tsys_rst: reset {\n-\t\t\t\tcompatible = \"socionext,uniphier-sld3-reset\";\n-\t\t\t\t#reset-cells = <1>;\n-\t\t\t};\n-\t\t};\n-\n-\t\tnand: nand@f8000000 {\n-\t\t\tcompatible = \"socionext,uniphier-denali-nand-v5a\";\n-\t\t\tstatus = \"disabled\";\n-\t\t\treg-names = \"nand_data\", \"denali_reg\";\n-\t\t\treg = <0xf8000000 0x20>, <0xf8100000 0x1000>;\n-\t\t\tinterrupts = <0 65 4>;\n-\t\t\tclocks = <&sys_clk 2>;\n-\t\t\tnand-ecc-strength = <8>;\n-\t\t};\n-\t};\n-};\n-\n-/include/ \"uniphier-pinctrl.dtsi\"\ndiff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig\nindex 3147db76cb68..6a7e239e0d28 100644\n--- a/arch/arm/mach-uniphier/Kconfig\n+++ b/arch/arm/mach-uniphier/Kconfig\n@@ -15,10 +15,6 @@ choice\n         prompt \"UniPhier SoC select\"\n         default ARCH_UNIPHIER_PRO4\n \n-config ARCH_UNIPHIER_SLD3\n-\tbool \"UniPhier sLD3 SoC\"\n-\tselect ARCH_UNIPHIER_32BIT\n-\n config ARCH_UNIPHIER_LD4_SLD8\n \tbool \"UniPhier LD4/sLD8 SoCs\"\n \tselect ARCH_UNIPHIER_32BIT\ndiff --git a/arch/arm/mach-uniphier/arm32/cache-uniphier.c b/arch/arm/mach-uniphier/arm32/cache-uniphier.c\nindex 658969b04911..3df82bfef008 100644\n--- a/arch/arm/mach-uniphier/arm32/cache-uniphier.c\n+++ b/arch/arm/mach-uniphier/arm32/cache-uniphier.c\n@@ -197,9 +197,6 @@ void uniphier_cache_set_active_ways(int cpu, u32 active_ways)\n \tvoid __iomem *base = (void __iomem *)UNIPHIER_SSCC + 0xc00;\n \n \tswitch (readl(UNIPHIER_SSCID)) { /* revision */\n-\tcase 0x11:\t/* sLD3 */\n-\t\tbase = (void __iomem *)UNIPHIER_SSCC + 0x870;\n-\t\tbreak;\n \tcase 0x12:\t/* LD4 */\n \tcase 0x16:\t/* sld8 */\n \t\tbase = (void __iomem *)UNIPHIER_SSCC + 0x840;\ndiff --git a/arch/arm/mach-uniphier/arm32/debug_ll.S b/arch/arm/mach-uniphier/arm32/debug_ll.S\nindex 76631f2faa22..b39899e6231e 100644\n--- a/arch/arm/mach-uniphier/arm32/debug_ll.S\n+++ b/arch/arm/mach-uniphier/arm32/debug_ll.S\n@@ -26,27 +26,6 @@ ENTRY(debug_ll_init)\n \tand\t\tr1, r1, #SG_REVISION_TYPE_MASK\n \tmov\t\tr1, r1, lsr #SG_REVISION_TYPE_SHIFT\n \n-#if defined(CONFIG_ARCH_UNIPHIER_SLD3)\n-#define UNIPHIER_SLD3_UART_CLK\t\t36864000\n-\tcmp\t\tr1, #0x25\n-\tbne\t\tsld3_end\n-\n-\tsg_set_pinsel\t64, 1, 4, 4, r0, r1\t@ TXD0 -> TXD0\n-\n-\tldr\t\tr0, =BCSCR5\n-\tldr\t\tr1, =0x24440000\n-\tstr\t\tr1, [r0]\n-\n-\tldr\t\tr0, =SC_CLKCTRL\n-\tldr\t\tr1, [r0]\n-\torr\t\tr1, r1, #SC_CLKCTRL_CEN_PERI\n-\tstr\t\tr1, [r0]\n-\n-\tldr\t\tr3, =DIV_ROUND(UNIPHIER_SLD3_UART_CLK, 16 * BAUDRATE)\n-\n-\tb\t\tinit_uart\n-sld3_end:\n-#endif\n #if defined(CONFIG_ARCH_UNIPHIER_LD4)\n #define UNIPHIER_LD4_UART_CLK\t\t36864000\n \tcmp\t\tr1, #0x26\ndiff --git a/arch/arm/mach-uniphier/arm32/lowlevel_init.S b/arch/arm/mach-uniphier/arm32/lowlevel_init.S\nindex af5ed1c050fe..89bb5a6355fd 100644\n--- a/arch/arm/mach-uniphier/arm32/lowlevel_init.S\n+++ b/arch/arm/mach-uniphier/arm32/lowlevel_init.S\n@@ -29,9 +29,8 @@ ENTRY(lowlevel_init)\n \n \t/*\n \t * Now we are using the page table embedded in the Boot ROM.\n-\t * It is not handy since it is not a straight mapped table for sLD3.\n-\t * Also, the access to the external bus is prohibited.  What we need\n-\t * to do next is to create a page table and switch over to it.\n+\t * What we need to do next is to create a page table and switch\n+\t * over to it.\n \t */\n \tbl\tcreate_page_table\n \tbl\t__v7_flush_dcache_all\ndiff --git a/arch/arm/mach-uniphier/arm32/psci.c b/arch/arm/mach-uniphier/arm32/psci.c\nindex 65a468dec9f5..3ab101a9cfe8 100644\n--- a/arch/arm/mach-uniphier/arm32/psci.c\n+++ b/arch/arm/mach-uniphier/arm32/psci.c\n@@ -29,7 +29,6 @@ u32 uniphier_smp_booted[CONFIG_ARMV7_PSCI_NR_CPUS];\n static int uniphier_get_nr_cpus(void)\n {\n \tswitch (uniphier_get_soc_id()) {\n-\tcase UNIPHIER_SLD3_ID:\n \tcase UNIPHIER_PRO4_ID:\n \tcase UNIPHIER_PRO5_ID:\n \t\treturn 2;\ndiff --git a/arch/arm/mach-uniphier/bcu/Makefile b/arch/arm/mach-uniphier/bcu/Makefile\nindex 02107b376ac8..5a9d8d72728b 100644\n--- a/arch/arm/mach-uniphier/bcu/Makefile\n+++ b/arch/arm/mach-uniphier/bcu/Makefile\n@@ -2,6 +2,5 @@\n # SPDX-License-Identifier:\tGPL-2.0+\n #\n \n-obj-$(CONFIG_ARCH_UNIPHIER_SLD3)\t+= bcu-sld3.o\n obj-$(CONFIG_ARCH_UNIPHIER_LD4)\t\t+= bcu-ld4.o\n obj-$(CONFIG_ARCH_UNIPHIER_SLD8)\t+= bcu-ld4.o\ndiff --git a/arch/arm/mach-uniphier/bcu/bcu-sld3.c b/arch/arm/mach-uniphier/bcu/bcu-sld3.c\ndeleted file mode 100644\nindex 99b318fd8f74..000000000000\n--- a/arch/arm/mach-uniphier/bcu/bcu-sld3.c\n+++ /dev/null\n@@ -1,39 +0,0 @@\n-/*\n- * Copyright (C) 2011-2014 Panasonic Corporation\n- * Copyright (C) 2015-2016 Socionext Inc.\n- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>\n- *\n- * SPDX-License-Identifier:\tGPL-2.0+\n- */\n-\n-#include <linux/io.h>\n-\n-#include \"../init.h\"\n-#include \"bcu-regs.h\"\n-\n-#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))\n-\n-void uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)\n-{\n-\tint shift;\n-\n-\twritel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */\n-\twritel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */\n-\twritel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */\n-\t/*\n-\t * 0xe0000000-0xefffffff: Ex-bus\n-\t * 0xf0000000-0xfbffffff: ASM bus\n-\t * 0xfc000000-0xffffffff: OCM bus\n-\t */\n-\twritel(0x24440000, BCSCR5);\n-\n-\t/* Specify DDR channel */\n-\tshift = bd->dram_ch[0].size / 0x04000000 * 4;\n-\twritel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */\n-\n-\tshift -= 32;\n-\twritel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */\n-\n-\tshift -= 32;\n-\twritel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */\n-}\ndiff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c\nindex 884bc67654d4..ed58d07f7e50 100644\n--- a/arch/arm/mach-uniphier/board_init.c\n+++ b/arch/arm/mach-uniphier/board_init.c\n@@ -86,15 +86,6 @@ struct uniphier_initdata {\n };\n \n static const struct uniphier_initdata uniphier_initdata[] = {\n-#if defined(CONFIG_ARCH_UNIPHIER_SLD3)\n-\t{\n-\t\t.soc_id = UNIPHIER_SLD3_ID,\n-\t\t.nand_2cs = true,\n-\t\t.sbc_init = uniphier_sbc_init_admulti,\n-\t\t.pll_init = uniphier_sld3_pll_init,\n-\t\t.clk_init = uniphier_ld4_clk_init,\n-\t},\n-#endif\n #if defined(CONFIG_ARCH_UNIPHIER_LD4)\n \t{\n \t\t.soc_id = UNIPHIER_LD4_ID,\ndiff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c\nindex 78de256a01e5..9bfc4c254196 100644\n--- a/arch/arm/mach-uniphier/boards.c\n+++ b/arch/arm/mach-uniphier/boards.c\n@@ -13,25 +13,6 @@\n \n DECLARE_GLOBAL_DATA_PTR;\n \n-#if defined(CONFIG_ARCH_UNIPHIER_SLD3)\n-static const struct uniphier_board_data uniphier_sld3_data = {\n-\t.dram_freq = 1600,\n-\t.dram_ch[0] = {\n-\t\t.size = 0x20000000,\n-\t\t.width = 32,\n-\t},\n-\t.dram_ch[1] = {\n-\t\t.size = 0x20000000,\n-\t\t.width = 16,\n-\t},\n-\t.dram_ch[2] = {\n-\t\t.size = 0x10000000,\n-\t\t.width = 16,\n-\t},\n-\t.flags = UNIPHIER_BD_DRAM_SPARSE,\n-};\n-#endif\n-\n #if defined(CONFIG_ARCH_UNIPHIER_LD4)\n static const struct uniphier_board_data uniphier_ld4_data = {\n \t.dram_freq = 1600,\n@@ -146,9 +127,6 @@ struct uniphier_board_id {\n };\n \n static const struct uniphier_board_id uniphier_boards[] = {\n-#if defined(CONFIG_ARCH_UNIPHIER_SLD3)\n-\t{ \"socionext,uniphier-sld3\", &uniphier_sld3_data, },\n-#endif\n #if defined(CONFIG_ARCH_UNIPHIER_LD4)\n \t{ \"socionext,uniphier-ld4\", &uniphier_ld4_data, },\n #endif\ndiff --git a/arch/arm/mach-uniphier/boot-device/Makefile b/arch/arm/mach-uniphier/boot-device/Makefile\nindex b35729213032..6c8580ce791e 100644\n--- a/arch/arm/mach-uniphier/boot-device/Makefile\n+++ b/arch/arm/mach-uniphier/boot-device/Makefile\n@@ -4,7 +4,6 @@\n \n obj-y\t\t\t\t\t+= boot-device.o\n \n-obj-$(CONFIG_ARCH_UNIPHIER_SLD3)\t+= boot-device-sld3.o\n obj-$(CONFIG_ARCH_UNIPHIER_LD4)\t\t+= boot-device-ld4.o\n obj-$(CONFIG_ARCH_UNIPHIER_PRO4)\t+= boot-device-ld4.o\n obj-$(CONFIG_ARCH_UNIPHIER_SLD8)\t+= boot-device-ld4.o\ndiff --git a/arch/arm/mach-uniphier/boot-device/boot-device-sld3.c b/arch/arm/mach-uniphier/boot-device/boot-device-sld3.c\ndeleted file mode 100644\nindex 2b36494f7343..000000000000\n--- a/arch/arm/mach-uniphier/boot-device/boot-device-sld3.c\n+++ /dev/null\n@@ -1,84 +0,0 @@\n-/*\n- * Copyright (C) 2014      Panasonic Corporation\n- * Copyright (C) 2015-2017 Socionext Inc.\n- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>\n- *\n- * SPDX-License-Identifier:\tGPL-2.0+\n- */\n-\n-#include <common.h>\n-#include <spl.h>\n-#include <linux/io.h>\n-#include <linux/kernel.h>\n-\n-#include \"boot-device.h\"\n-\n-const struct uniphier_boot_device uniphier_sld3_boot_device_table[] = {\n-\t{BOOT_DEVICE_NOR,  \"NOR  (XECS0)\"},\n-\t{BOOT_DEVICE_NONE, \"External Master\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_MMC1, \"eMMC (3.3V, Boot Oparation)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_MMC1, \"eMMC (1.8V, Boot Oparation)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_MMC1, \"eMMC (3.3V, Normal)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_MMC1, \"eMMC (1.8V, Normal)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 1, ECC  8, EraseSize 128KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 1, ECC  8, EraseSize 256KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 1, ECC  8, EraseSize 512KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 4, ECC 24, EraseSize   1MB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC  8, EraseSize 128KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC  8, EraseSize 256KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC  8, EraseSize 512KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC 24, EraseSize   1MB, Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 1, ECC  8, ONFI,            Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 1, ECC 16, ONFI,            Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 4, ECC 24, ONFI,            Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC  8, ONFI,            Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC 16, ONFI,            Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NAND, \"NAND (Mirror 8, ECC 24, ONFI,            Addr 5)\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-\t{BOOT_DEVICE_NONE, \"Reserved\"},\n-};\n-\n-const unsigned uniphier_sld3_boot_device_count =\n-\t\t\t\tARRAY_SIZE(uniphier_sld3_boot_device_table);\ndiff --git a/arch/arm/mach-uniphier/boot-device/boot-device.c b/arch/arm/mach-uniphier/boot-device/boot-device.c\nindex 094f77b4d10e..0f93926f28fa 100644\n--- a/arch/arm/mach-uniphier/boot-device/boot-device.c\n+++ b/arch/arm/mach-uniphier/boot-device/boot-device.c\n@@ -26,15 +26,6 @@ struct uniphier_boot_device_info {\n };\n \n static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {\n-#if defined(CONFIG_ARCH_UNIPHIER_SLD3)\n-\t{\n-\t\t.soc_id = UNIPHIER_SLD3_ID,\n-\t\t.boot_device_sel_shift = 0,\n-\t\t.boot_device_table = uniphier_sld3_boot_device_table,\n-\t\t.boot_device_count = &uniphier_sld3_boot_device_count,\n-\t\t.have_internal_stm = 0,\n-\t},\n-#endif\n #if defined(CONFIG_ARCH_UNIPHIER_LD4)\n \t{\n \t\t.soc_id = UNIPHIER_LD4_ID,\ndiff --git a/arch/arm/mach-uniphier/boot-device/boot-device.h b/arch/arm/mach-uniphier/boot-device/boot-device.h\nindex c4ce3e50a378..f9631d682089 100644\n--- a/arch/arm/mach-uniphier/boot-device/boot-device.h\n+++ b/arch/arm/mach-uniphier/boot-device/boot-device.h\n@@ -13,14 +13,12 @@ struct uniphier_boot_device {\n \tconst char *desc;\n };\n \n-extern const struct uniphier_boot_device uniphier_sld3_boot_device_table[];\n extern const struct uniphier_boot_device uniphier_ld4_boot_device_table[];\n extern const struct uniphier_boot_device uniphier_pro5_boot_device_table[];\n extern const struct uniphier_boot_device uniphier_pxs2_boot_device_table[];\n extern const struct uniphier_boot_device uniphier_ld11_boot_device_table[];\n extern const struct uniphier_boot_device uniphier_pxs3_boot_device_table[];\n \n-extern const unsigned int uniphier_sld3_boot_device_count;\n extern const unsigned int uniphier_ld4_boot_device_count;\n extern const unsigned int uniphier_pro5_boot_device_count;\n extern const unsigned int uniphier_pxs2_boot_device_count;\ndiff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile\nindex 1680dddd6e68..76633bcd498a 100644\n--- a/arch/arm/mach-uniphier/clk/Makefile\n+++ b/arch/arm/mach-uniphier/clk/Makefile\n@@ -4,17 +4,15 @@\n \n ifdef CONFIG_SPL_BUILD\n \n-obj-$(CONFIG_ARCH_UNIPHIER_SLD3)\t+= clk-early-sld3.o clk-dram-sld3.o dpll-sld3.o\n-obj-$(CONFIG_ARCH_UNIPHIER_LD4)\t\t+= clk-early-sld3.o clk-dram-sld3.o dpll-ld4.o\n-obj-$(CONFIG_ARCH_UNIPHIER_PRO4)\t+= clk-early-sld3.o clk-dram-sld3.o dpll-pro4.o\n-obj-$(CONFIG_ARCH_UNIPHIER_SLD8)\t+= clk-early-sld3.o clk-dram-sld3.o dpll-sld8.o\n-obj-$(CONFIG_ARCH_UNIPHIER_PRO5)\t+= clk-early-sld3.o clk-dram-pro5.o dpll-pro5.o\n-obj-$(CONFIG_ARCH_UNIPHIER_PXS2)\t+= clk-early-sld3.o clk-dram-pxs2.o dpll-pxs2.o\n-obj-$(CONFIG_ARCH_UNIPHIER_LD6B)\t+= clk-early-sld3.o clk-dram-pxs2.o dpll-pxs2.o\n+obj-$(CONFIG_ARCH_UNIPHIER_LD4)\t\t+= clk-early-ld4.o clk-dram-ld4.o dpll-ld4.o\n+obj-$(CONFIG_ARCH_UNIPHIER_PRO4)\t+= clk-early-ld4.o clk-dram-ld4.o dpll-pro4.o\n+obj-$(CONFIG_ARCH_UNIPHIER_SLD8)\t+= clk-early-ld4.o clk-dram-ld4.o dpll-sld8.o\n+obj-$(CONFIG_ARCH_UNIPHIER_PRO5)\t+= clk-early-ld4.o clk-dram-pro5.o dpll-pro5.o\n+obj-$(CONFIG_ARCH_UNIPHIER_PXS2)\t+= clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o\n+obj-$(CONFIG_ARCH_UNIPHIER_LD6B)\t+= clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o\n \n else\n \n-obj-$(CONFIG_ARCH_UNIPHIER_SLD3)\t+= clk-ld4.o pll-sld3.o dpll-tail.o\n obj-$(CONFIG_ARCH_UNIPHIER_LD4)\t\t+= clk-ld4.o pll-ld4.o dpll-tail.o\n obj-$(CONFIG_ARCH_UNIPHIER_PRO4)\t+= clk-pro4.o pll-pro4.o dpll-tail.o\n obj-$(CONFIG_ARCH_UNIPHIER_SLD8)\t+= clk-ld4.o pll-ld4.o dpll-tail.o\ndiff --git a/arch/arm/mach-uniphier/clk/clk-dram-sld3.c b/arch/arm/mach-uniphier/clk/clk-dram-ld4.c\nsimilarity index 93%\nrename from arch/arm/mach-uniphier/clk/clk-dram-sld3.c\nrename to arch/arm/mach-uniphier/clk/clk-dram-ld4.c\nindex 3430303f875a..407daf066425 100644\n--- a/arch/arm/mach-uniphier/clk/clk-dram-sld3.c\n+++ b/arch/arm/mach-uniphier/clk/clk-dram-ld4.c\n@@ -12,7 +12,7 @@\n #include \"../init.h\"\n #include \"../sc-regs.h\"\n \n-void uniphier_sld3_dram_clk_init(void)\n+void uniphier_ld4_dram_clk_init(void)\n {\n \tu32 tmp;\n \ndiff --git a/arch/arm/mach-uniphier/clk/clk-early-sld3.c b/arch/arm/mach-uniphier/clk/clk-early-ld4.c\nsimilarity index 93%\nrename from arch/arm/mach-uniphier/clk/clk-early-sld3.c\nrename to arch/arm/mach-uniphier/clk/clk-early-ld4.c\nindex 3235da20bcb9..07b916dc9a9c 100644\n--- a/arch/arm/mach-uniphier/clk/clk-early-sld3.c\n+++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c\n@@ -12,7 +12,7 @@\n #include \"../init.h\"\n #include \"../sc-regs.h\"\n \n-void uniphier_sld3_early_clk_init(void)\n+void uniphier_ld4_early_clk_init(void)\n {\n \tu32 tmp;\n \ndiff --git a/arch/arm/mach-uniphier/clk/dpll-sld3.c b/arch/arm/mach-uniphier/clk/dpll-sld3.c\ndeleted file mode 100644\nindex 0eb310ceb8f3..000000000000\n--- a/arch/arm/mach-uniphier/clk/dpll-sld3.c\n+++ /dev/null\n@@ -1,13 +0,0 @@\n-/*\n- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>\n- *\n- * SPDX-License-Identifier:\tGPL-2.0+\n- */\n-\n-#include \"../init.h\"\n-\n-int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd)\n-{\n-\t/* add pll init code here */\n-\treturn 0;\n-}\ndiff --git a/arch/arm/mach-uniphier/clk/pll-sld3.c b/arch/arm/mach-uniphier/clk/pll-sld3.c\ndeleted file mode 100644\nindex 37a7c1278251..000000000000\n--- a/arch/arm/mach-uniphier/clk/pll-sld3.c\n+++ /dev/null\n@@ -1,14 +0,0 @@\n-/*\n- * Copyright (C) 2016 Socionext Inc.\n- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>\n- *\n- * SPDX-License-Identifier:\tGPL-2.0+\n- */\n-\n-#include \"../init.h\"\n-#include \"pll.h\"\n-\n-void uniphier_sld3_pll_init(void)\n-{\n-\tuniphier_ld4_dpll_ssc_en();\n-}\ndiff --git a/arch/arm/mach-uniphier/cpu-info.c b/arch/arm/mach-uniphier/cpu-info.c\nindex 2ce73c5af888..90ef4110871f 100644\n--- a/arch/arm/mach-uniphier/cpu-info.c\n+++ b/arch/arm/mach-uniphier/cpu-info.c\n@@ -23,10 +23,6 @@ int print_cpuinfo(void)\n \tputs(\"SoC:   \");\n \n \tswitch (id) {\n-\tcase UNIPHIER_SLD3_ID:\n-\t\tputs(\"sLD3\");\n-\t\trequired_model = 2;\n-\t\tbreak;\n \tcase UNIPHIER_LD4_ID:\n \t\tputs(\"LD4\");\n \t\trequired_rev = 2;\ndiff --git a/arch/arm/mach-uniphier/debug-uart/Makefile b/arch/arm/mach-uniphier/debug-uart/Makefile\nindex 0bad718de66b..3837ee7ec6db 100644\n--- a/arch/arm/mach-uniphier/debug-uart/Makefile\n+++ b/arch/arm/mach-uniphier/debug-uart/Makefile\n@@ -3,7 +3,6 @@\n #\n \n ifdef CONFIG_SPL_BUILD\n-obj-$(CONFIG_ARCH_UNIPHIER_SLD3)\t+= debug-uart-sld3.o\n obj-$(CONFIG_ARCH_UNIPHIER_LD4)\t\t+= debug-uart-ld4.o\n obj-$(CONFIG_ARCH_UNIPHIER_PRO4)\t+= debug-uart-pro4.o\n obj-$(CONFIG_ARCH_UNIPHIER_SLD8)\t+= debug-uart-sld8.o\ndiff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c\ndeleted file mode 100644\nindex 508318a6820c..000000000000\n--- a/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c\n+++ /dev/null\n@@ -1,31 +0,0 @@\n-/*\n- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>\n- *\n- * SPDX-License-Identifier:\tGPL-2.0+\n- */\n-\n-#include <config.h>\n-#include <linux/kernel.h>\n-#include <linux/io.h>\n-\n-#include \"../bcu/bcu-regs.h\"\n-#include \"../sc-regs.h\"\n-#include \"../sg-regs.h\"\n-#include \"debug-uart.h\"\n-\n-#define UNIPHIER_SLD3_UART_CLK\t\t36864000\n-\n-unsigned int uniphier_sld3_debug_uart_init(void)\n-{\n-\tu32 tmp;\n-\n-\tsg_set_pinsel(64, 1, 4, 4);\t/* TXD0 -> TXD0 */\n-\n-\twritel(0x24440000, BCSCR5);\n-\n-\ttmp = readl(SC_CLKCTRL);\n-\ttmp |= SC_CLKCTRL_CEN_PERI;\n-\twritel(tmp, SC_CLKCTRL);\n-\n-\treturn DIV_ROUND_CLOSEST(UNIPHIER_SLD3_UART_CLK, 16 * CONFIG_BAUDRATE);\n-}\ndiff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c\nindex 72a514dc0e81..94d05a8b9c01 100644\n--- a/arch/arm/mach-uniphier/debug-uart/debug-uart.c\n+++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c\n@@ -33,11 +33,6 @@ void _debug_uart_init(void)\n \tunsigned int divisor;\n \n \tswitch (uniphier_get_soc_id()) {\n-#if defined(CONFIG_ARCH_UNIPHIER_SLD3)\n-\tcase UNIPHIER_SLD3_ID:\n-\t\tdivisor = uniphier_sld3_debug_uart_init();\n-\t\tbreak;\n-#endif\n #if defined(CONFIG_ARCH_UNIPHIER_LD4)\n \tcase UNIPHIER_LD4_ID:\n \t\tdivisor = uniphier_ld4_debug_uart_init();\ndiff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.h b/arch/arm/mach-uniphier/debug-uart/debug-uart.h\nindex 8de9124b02df..d57e5df3db17 100644\n--- a/arch/arm/mach-uniphier/debug-uart/debug-uart.h\n+++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.h\n@@ -7,7 +7,6 @@\n #ifndef _MACH_DEBUG_UART_H\n #define _MACH_DEBUG_UART_H\n \n-unsigned int uniphier_sld3_debug_uart_init(void);\n unsigned int uniphier_ld4_debug_uart_init(void);\n unsigned int uniphier_pro4_debug_uart_init(void);\n unsigned int uniphier_sld8_debug_uart_init(void);\ndiff --git a/arch/arm/mach-uniphier/dram/Makefile b/arch/arm/mach-uniphier/dram/Makefile\nindex 1da33f6d80a1..baf2a7b481bb 100644\n--- a/arch/arm/mach-uniphier/dram/Makefile\n+++ b/arch/arm/mach-uniphier/dram/Makefile\n@@ -4,7 +4,6 @@\n \n ifdef CONFIG_SPL_BUILD\n \n-obj-$(CONFIG_ARCH_UNIPHIER_SLD3)\t+= umc-sld3.o\n obj-$(CONFIG_ARCH_UNIPHIER_LD4)\t\t+= umc-ld4.o \\\n \t\t\t\t\t   ddrphy-training.o ddrphy-ld4.o\n obj-$(CONFIG_ARCH_UNIPHIER_PRO4)\t+= umc-pro4.o \\\ndiff --git a/arch/arm/mach-uniphier/dram/umc-sld3.c b/arch/arm/mach-uniphier/dram/umc-sld3.c\ndeleted file mode 100644\nindex 99249eb20168..000000000000\n--- a/arch/arm/mach-uniphier/dram/umc-sld3.c\n+++ /dev/null\n@@ -1,6 +0,0 @@\n-#include \"../init.h\"\n-\n-int uniphier_sld3_umc_init(const struct uniphier_board_data *bd)\n-{\n-\treturn 0;\n-}\ndiff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c\nindex 6eb8d2650424..32d359321ae2 100644\n--- a/arch/arm/mach-uniphier/dram_init.c\n+++ b/arch/arm/mach-uniphier/dram_init.c\n@@ -28,15 +28,6 @@ struct uniphier_memif_data {\n \n static const struct uniphier_memif_data uniphier_memif_data[] = {\n \t{\n-\t\t.soc_id = UNIPHIER_SLD3_ID,\n-\t\t.sparse_ch1_base = 0xc0000000,\n-\t\t/*\n-\t\t * In fact, SLD3 has DRAM ch2, but the memory regions for ch1\n-\t\t * and ch2 overlap, and host cannot get access to them at the\n-\t\t * same time.  Hide the ch2 from U-Boot.\n-\t\t */\n-\t},\n-\t{\n \t\t.soc_id = UNIPHIER_LD4_ID,\n \t\t.sparse_ch1_base = 0xc0000000,\n \t},\ndiff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h\nindex b322628eedfa..29f638d94703 100644\n--- a/arch/arm/mach-uniphier/init.h\n+++ b/arch/arm/mach-uniphier/init.h\n@@ -28,7 +28,6 @@ struct uniphier_board_data {\n \n const struct uniphier_board_data *uniphier_get_board_param(void);\n \n-int uniphier_sld3_init(const struct uniphier_board_data *bd);\n int uniphier_ld4_init(const struct uniphier_board_data *bd);\n int uniphier_pro4_init(const struct uniphier_board_data *bd);\n int uniphier_sld8_init(const struct uniphier_board_data *bd);\n@@ -63,34 +62,29 @@ static inline void uniphier_ld11_sbc_init(void)\n }\n #endif\n \n-void uniphier_sld3_bcu_init(const struct uniphier_board_data *bd);\n void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd);\n \n int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd);\n-int uniphier_memconf_3ch_no_disbit_init(const struct uniphier_board_data *bd);\n int uniphier_memconf_3ch_init(const struct uniphier_board_data *bd);\n \n-int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd);\n int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd);\n int uniphier_pro4_dpll_init(const struct uniphier_board_data *bd);\n int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd);\n int uniphier_pro5_dpll_init(const struct uniphier_board_data *bd);\n int uniphier_pxs2_dpll_init(const struct uniphier_board_data *bd);\n \n-void uniphier_sld3_early_clk_init(void);\n+void uniphier_ld4_early_clk_init(void);\n \n-void uniphier_sld3_dram_clk_init(void);\n+void uniphier_ld4_dram_clk_init(void);\n void uniphier_pro5_dram_clk_init(void);\n void uniphier_pxs2_dram_clk_init(void);\n \n-int uniphier_sld3_umc_init(const struct uniphier_board_data *bd);\n int uniphier_ld4_umc_init(const struct uniphier_board_data *bd);\n int uniphier_pro4_umc_init(const struct uniphier_board_data *bd);\n int uniphier_sld8_umc_init(const struct uniphier_board_data *bd);\n int uniphier_pro5_umc_init(const struct uniphier_board_data *bd);\n int uniphier_pxs2_umc_init(const struct uniphier_board_data *bd);\n \n-void uniphier_sld3_pll_init(void);\n void uniphier_ld4_pll_init(void);\n void uniphier_pro4_pll_init(void);\n void uniphier_ld11_pll_init(void);\ndiff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c\nindex 4ced2cbace03..3b34e4d37294 100644\n--- a/arch/arm/mach-uniphier/memconf.c\n+++ b/arch/arm/mach-uniphier/memconf.c\n@@ -15,7 +15,7 @@\n #include \"init.h\"\n \n static int __uniphier_memconf_init(const struct uniphier_board_data *bd,\n-\t\t\t\t   int have_ch2, int have_ch2_disable_bit)\n+\t\t\t\t   int have_ch2)\n {\n \tu32 val = 0;\n \tunsigned long size_per_word;\n@@ -100,8 +100,7 @@ static int __uniphier_memconf_init(const struct uniphier_board_data *bd,\n \t\tgoto out;\n \n \tif (!bd->dram_ch[2].size) {\n-\t\tif (have_ch2_disable_bit)\n-\t\t\tval |= SG_MEMCONF_CH2_DISABLE;\n+\t\tval |= SG_MEMCONF_CH2_DISABLE;\n \t\tgoto out;\n \t}\n \n@@ -149,15 +148,10 @@ out:\n \n int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd)\n {\n-\treturn __uniphier_memconf_init(bd, 0, 0);\n-}\n-\n-int uniphier_memconf_3ch_no_disbit_init(const struct uniphier_board_data *bd)\n-{\n-\treturn __uniphier_memconf_init(bd, 1, 0);\n+\treturn __uniphier_memconf_init(bd, 0);\n }\n \n int uniphier_memconf_3ch_init(const struct uniphier_board_data *bd)\n {\n-\treturn __uniphier_memconf_init(bd, 1, 1);\n+\treturn __uniphier_memconf_init(bd, 1);\n }\ndiff --git a/arch/arm/mach-uniphier/mmc-boot-mode.c b/arch/arm/mach-uniphier/mmc-boot-mode.c\nindex d60c578ce7fe..f40534eebb9f 100644\n--- a/arch/arm/mach-uniphier/mmc-boot-mode.c\n+++ b/arch/arm/mach-uniphier/mmc-boot-mode.c\n@@ -14,7 +14,7 @@ u32 spl_boot_mode(const u32 boot_device)\n \tstruct mmc *mmc;\n \n \t/*\n-\t * work around a bug in the Boot ROM of PH1-sLD3, LD4, Pro4, and sLD8:\n+\t * work around a bug in the Boot ROM of LD4, Pro4, and sLD8:\n \t *\n \t * The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of\n \t * Extended CSD register; when switching to the Boot Partition 1, the\ndiff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h\nindex ad58e10e23d0..54bbe43ebbad 100644\n--- a/arch/arm/mach-uniphier/sc-regs.h\n+++ b/arch/arm/mach-uniphier/sc-regs.h\n@@ -11,11 +11,7 @@\n #ifndef ARCH_SC_REGS_H\n #define ARCH_SC_REGS_H\n \n-#if defined(CONFIG_ARCH_UNIPHIER_SLD3)\n-#define SC_BASE_ADDR\t\t\t0xf1840000\n-#else\n #define SC_BASE_ADDR\t\t\t0x61840000\n-#endif\n \n #define SC_DPLLOSCCTRL\t\t\t(SC_BASE_ADDR | 0x1110)\n #define SC_DPLLOSCCTRL_DPLLST\t\t(0x1 << 1)\ndiff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h\nindex 04732527a75e..9ba6a7ed6934 100644\n--- a/arch/arm/mach-uniphier/soc-info.h\n+++ b/arch/arm/mach-uniphier/soc-info.h\n@@ -11,7 +11,6 @@\n #include <linux/kernel.h>\n #include <linux/stddef.h>\n \n-#define UNIPHIER_SLD3_ID\t0x25\n #define UNIPHIER_LD4_ID\t\t0x26\n #define UNIPHIER_PRO4_ID\t0x28\n #define UNIPHIER_SLD8_ID\t0x29\ndiff --git a/arch/arm/mach-uniphier/spl_board_init.c b/arch/arm/mach-uniphier/spl_board_init.c\nindex 6da5631bcace..1272b4e25c08 100644\n--- a/arch/arm/mach-uniphier/spl_board_init.c\n+++ b/arch/arm/mach-uniphier/spl_board_init.c\n@@ -24,35 +24,24 @@ struct uniphier_spl_initdata {\n };\n \n static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {\n-#if defined(CONFIG_ARCH_UNIPHIER_SLD3)\n-\t{\n-\t\t.soc_id = UNIPHIER_SLD3_ID,\n-\t\t.bcu_init = uniphier_sld3_bcu_init,\n-\t\t.early_clk_init = uniphier_sld3_early_clk_init,\n-\t\t.dpll_init = uniphier_sld3_dpll_init,\n-\t\t.memconf_init = uniphier_memconf_3ch_no_disbit_init,\n-\t\t.dram_clk_init = uniphier_sld3_dram_clk_init,\n-\t\t.umc_init = uniphier_sld3_umc_init,\n-\t},\n-#endif\n #if defined(CONFIG_ARCH_UNIPHIER_LD4)\n \t{\n \t\t.soc_id = UNIPHIER_LD4_ID,\n \t\t.bcu_init = uniphier_ld4_bcu_init,\n-\t\t.early_clk_init = uniphier_sld3_early_clk_init,\n+\t\t.early_clk_init = uniphier_ld4_early_clk_init,\n \t\t.dpll_init = uniphier_ld4_dpll_init,\n \t\t.memconf_init = uniphier_memconf_2ch_init,\n-\t\t.dram_clk_init = uniphier_sld3_dram_clk_init,\n+\t\t.dram_clk_init = uniphier_ld4_dram_clk_init,\n \t\t.umc_init = uniphier_ld4_umc_init,\n \t},\n #endif\n #if defined(CONFIG_ARCH_UNIPHIER_PRO4)\n \t{\n \t\t.soc_id = UNIPHIER_PRO4_ID,\n-\t\t.early_clk_init = uniphier_sld3_early_clk_init,\n+\t\t.early_clk_init = uniphier_ld4_early_clk_init,\n \t\t.dpll_init = uniphier_pro4_dpll_init,\n \t\t.memconf_init = uniphier_memconf_2ch_init,\n-\t\t.dram_clk_init = uniphier_sld3_dram_clk_init,\n+\t\t.dram_clk_init = uniphier_ld4_dram_clk_init,\n \t\t.umc_init = uniphier_pro4_umc_init,\n \t},\n #endif\n@@ -60,17 +49,17 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {\n \t{\n \t\t.soc_id = UNIPHIER_SLD8_ID,\n \t\t.bcu_init = uniphier_ld4_bcu_init,\n-\t\t.early_clk_init = uniphier_sld3_early_clk_init,\n+\t\t.early_clk_init = uniphier_ld4_early_clk_init,\n \t\t.dpll_init = uniphier_sld8_dpll_init,\n \t\t.memconf_init = uniphier_memconf_2ch_init,\n-\t\t.dram_clk_init = uniphier_sld3_dram_clk_init,\n+\t\t.dram_clk_init = uniphier_ld4_dram_clk_init,\n \t\t.umc_init = uniphier_sld8_umc_init,\n \t},\n #endif\n #if defined(CONFIG_ARCH_UNIPHIER_PRO5)\n \t{\n \t\t.soc_id = UNIPHIER_PRO5_ID,\n-\t\t.early_clk_init = uniphier_sld3_early_clk_init,\n+\t\t.early_clk_init = uniphier_ld4_early_clk_init,\n \t\t.dpll_init = uniphier_pro5_dpll_init,\n \t\t.memconf_init = uniphier_memconf_2ch_init,\n \t\t.dram_clk_init = uniphier_pro5_dram_clk_init,\n@@ -80,7 +69,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {\n #if defined(CONFIG_ARCH_UNIPHIER_PXS2)\n \t{\n \t\t.soc_id = UNIPHIER_PXS2_ID,\n-\t\t.early_clk_init = uniphier_sld3_early_clk_init,\n+\t\t.early_clk_init = uniphier_ld4_early_clk_init,\n \t\t.dpll_init = uniphier_pxs2_dpll_init,\n \t\t.memconf_init = uniphier_memconf_3ch_init,\n \t\t.dram_clk_init = uniphier_pxs2_dram_clk_init,\n@@ -90,7 +79,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {\n #if defined(CONFIG_ARCH_UNIPHIER_LD6B)\n \t{\n \t\t.soc_id = UNIPHIER_LD6B_ID,\n-\t\t.early_clk_init = uniphier_sld3_early_clk_init,\n+\t\t.early_clk_init = uniphier_ld4_early_clk_init,\n \t\t.dpll_init = uniphier_pxs2_dpll_init,\n \t\t.memconf_init = uniphier_memconf_3ch_init,\n \t\t.dram_clk_init = uniphier_pxs2_dram_clk_init,\ndiff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig\ndeleted file mode 100644\nindex 6340b6a40dc2..000000000000\n--- a/configs/uniphier_sld3_defconfig\n+++ /dev/null\n@@ -1,46 +0,0 @@\n-CONFIG_ARM=y\n-CONFIG_ARCH_UNIPHIER=y\n-CONFIG_SYS_TEXT_BASE=0x84000000\n-CONFIG_SYS_MALLOC_F_LEN=0x2000\n-CONFIG_SPL_MMC_SUPPORT=y\n-CONFIG_SPL_SERIAL_SUPPORT=y\n-CONFIG_SPL_NAND_SUPPORT=y\n-CONFIG_ARCH_UNIPHIER_SLD3=y\n-CONFIG_MICRO_SUPPORT_CARD=y\n-CONFIG_DEFAULT_DEVICE_TREE=\"uniphier-sld3-ref\"\n-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set\n-CONFIG_SPL=y\n-CONFIG_SPL_NOR_SUPPORT=y\n-CONFIG_HUSH_PARSER=y\n-CONFIG_CMD_CONFIG=y\n-CONFIG_CMD_BOOTZ=y\n-# CONFIG_CMD_XIMG is not set\n-# CONFIG_CMD_ENV_EXISTS is not set\n-CONFIG_CMD_GPT=y\n-CONFIG_CMD_MMC=y\n-CONFIG_CMD_I2C=y\n-CONFIG_CMD_USB=y\n-# CONFIG_CMD_FPGA is not set\n-CONFIG_CMD_GPIO=y\n-CONFIG_CMD_TFTPPUT=y\n-CONFIG_CMD_PING=y\n-CONFIG_CMD_CACHE=y\n-CONFIG_CMD_TIME=y\n-# CONFIG_CMD_MISC is not set\n-CONFIG_CMD_FAT=y\n-CONFIG_CMD_FS_GENERIC=y\n-# CONFIG_SPL_DOS_PARTITION is not set\n-# CONFIG_SPL_EFI_PARTITION is not set\n-CONFIG_NET_RANDOM_ETHADDR=y\n-CONFIG_GPIO_UNIPHIER=y\n-CONFIG_MISC=y\n-CONFIG_I2C_EEPROM=y\n-CONFIG_MMC_UNIPHIER=y\n-CONFIG_NAND_DENALI=y\n-CONFIG_SYS_NAND_DENALI_64BIT=y\n-CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8\n-CONFIG_SPL_NAND_DENALI=y\n-CONFIG_USB=y\n-CONFIG_USB_EHCI_HCD=y\n-CONFIG_USB_EHCI_GENERIC=y\n-CONFIG_USB_STORAGE=y\ndiff --git a/doc/README.uniphier b/doc/README.uniphier\nindex f21c9d09ce3e..fa1f9bcc9667 100644\n--- a/doc/README.uniphier\n+++ b/doc/README.uniphier\n@@ -29,7 +29,6 @@ The following tables show <defconfig> and <device-tree> for each board.\n \n  Board         | <defconfig>                  | <device-tree>\n ---------------|------------------------------|------------------------------\n-sLD3 reference | uniphier_sld3_defconfig      | uniphier-sld3-ref (default)\n LD4 reference  | uniphier_ld4_sld8_defconfig  | uniphier-ld4-ref (default)\n sld8 reference | uniphier_ld4_sld8_defconfig  | uniphier-sld8-def\n Pro4 reference | uniphier_pro4_defconfig      | uniphier-pro4-ref (default)\ndiff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c\nindex 0fb48541b9b7..eed21b9a6871 100644\n--- a/drivers/clk/uniphier/clk-uniphier-core.c\n+++ b/drivers/clk/uniphier/clk-uniphier-core.c\n@@ -147,10 +147,6 @@ static int uniphier_clk_probe(struct udevice *dev)\n \n static const struct udevice_id uniphier_clk_match[] = {\n \t{\n-\t\t.compatible = \"socionext,uniphier-sld3-mio-clock\",\n-\t\t.data = (ulong)&uniphier_mio_clk_data,\n-\t},\n-\t{\n \t\t.compatible = \"socionext,uniphier-ld4-mio-clock\",\n \t\t.data = (ulong)&uniphier_mio_clk_data,\n \t},\ndiff --git a/drivers/clk/uniphier/clk-uniphier-mio.c b/drivers/clk/uniphier/clk-uniphier-mio.c\nindex 18e685670925..9c13dcd55518 100644\n--- a/drivers/clk/uniphier/clk-uniphier-mio.c\n+++ b/drivers/clk/uniphier/clk-uniphier-mio.c\n@@ -64,11 +64,9 @@ static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {\n \tUNIPHIER_MIO_CLK_USB2(8, 0),\n \tUNIPHIER_MIO_CLK_USB2(9, 1),\n \tUNIPHIER_MIO_CLK_USB2(10, 2),\n-\tUNIPHIER_MIO_CLK_USB2(11, 3),\t\t/* for PH1-sLD3 only */\n \tUNIPHIER_MIO_CLK_USB2_PHY(12, 0),\n \tUNIPHIER_MIO_CLK_USB2_PHY(13, 1),\n \tUNIPHIER_MIO_CLK_USB2_PHY(14, 2),\n-\tUNIPHIER_MIO_CLK_USB2_PHY(15, 3),\t/* for PH1-sLD3 only */\n \tUNIPHIER_CLK_END\n };\n \ndiff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig\nindex a6e51caba5f5..b6abcd12ff3d 100644\n--- a/drivers/pinctrl/uniphier/Kconfig\n+++ b/drivers/pinctrl/uniphier/Kconfig\n@@ -3,12 +3,6 @@ if ARCH_UNIPHIER\n config PINCTRL_UNIPHIER\n \tbool\n \n-config PINCTRL_UNIPHIER_SLD3\n-\tbool \"UniPhier sLD3 SoC pinctrl driver\"\n-\tdepends on ARCH_UNIPHIER_SLD3\n-\tdefault y\n-\tselect PINCTRL_UNIPHIER\n-\n config PINCTRL_UNIPHIER_LD4\n \tbool \"UniPhier LD4 SoC pinctrl driver\"\n \tdepends on ARCH_UNIPHIER_LD4\ndiff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile\nindex b805765ed1ce..215104b61b49 100644\n--- a/drivers/pinctrl/uniphier/Makefile\n+++ b/drivers/pinctrl/uniphier/Makefile\n@@ -4,7 +4,6 @@\n \n obj-y\t\t\t\t\t+= pinctrl-uniphier-core.o\n \n-obj-$(CONFIG_PINCTRL_UNIPHIER_SLD3)\t+= pinctrl-uniphier-sld3.o\n obj-$(CONFIG_PINCTRL_UNIPHIER_LD4)\t+= pinctrl-uniphier-ld4.o\n obj-$(CONFIG_PINCTRL_UNIPHIER_PRO4)\t+= pinctrl-uniphier-pro4.o\n obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8)\t+= pinctrl-uniphier-sld8.o\ndiff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c\ndeleted file mode 100644\nindex e9cc9d205d83..000000000000\n--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c\n+++ /dev/null\n@@ -1,129 +0,0 @@\n-/*\n- * Copyright (C) 2016 Socionext Inc.\n- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>\n- *\n- * SPDX-License-Identifier:\tGPL-2.0+\n- */\n-\n-#include <common.h>\n-#include <dm.h>\n-#include <dm/pinctrl.h>\n-\n-#include \"pinctrl-uniphier.h\"\n-\n-static const unsigned emmc_pins[] = {55, 56, 60};\n-static const int emmc_muxvals[] = {1, 1, 1};\n-static const unsigned emmc_dat8_pins[] = {57};\n-static const int emmc_dat8_muxvals[] = {1};\n-static const unsigned ether_mii_pins[] = {35, 107, 108, 109, 110, 111, 112,\n-\t\t\t\t\t  113};\n-static const int ether_mii_muxvals[] = {1, 2, 2, 2, 2, 2, 2, 2};\n-static const unsigned ether_rmii_pins[] = {35};\n-static const int ether_rmii_muxvals[] = {1};\n-static const unsigned i2c0_pins[] = {36};\n-static const int i2c0_muxvals[] = {0};\n-static const unsigned nand_pins[] = {38, 39, 40, 58, 59};\n-static const int nand_muxvals[] = {1, 1, 1, 1, 1};\n-static const unsigned nand_cs1_pins[] = {41};\n-static const int nand_cs1_muxvals[] = {1};\n-static const unsigned sd_pins[] = {42, 43, 44, 45};\n-static const int sd_muxvals[] = {1, 1, 1, 1};\n-static const unsigned system_bus_pins[] = {46, 50, 51, 53, 54, 73, 74, 75, 76,\n-\t\t\t\t\t   77, 78, 79, 80, 88, 89, 91, 92, 99};\n-static const int system_bus_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,\n-\t\t\t\t\t 1, 1, 1, 1, 1};\n-static const unsigned system_bus_cs0_pins[] = {93};\n-static const int system_bus_cs0_muxvals[] = {1};\n-static const unsigned system_bus_cs1_pins[] = {94};\n-static const int system_bus_cs1_muxvals[] = {1};\n-static const unsigned system_bus_cs2_pins[] = {95};\n-static const int system_bus_cs2_muxvals[] = {1};\n-static const unsigned system_bus_cs3_pins[] = {96};\n-static const int system_bus_cs3_muxvals[] = {1};\n-static const unsigned system_bus_cs4_pins[] = {81};\n-static const int system_bus_cs4_muxvals[] = {1};\n-static const unsigned system_bus_cs5_pins[] = {82};\n-static const int system_bus_cs5_muxvals[] = {1};\n-static const unsigned uart0_pins[] = {63, 64};\n-static const int uart0_muxvals[] = {0, 1};\n-static const unsigned uart1_pins[] = {65, 66};\n-static const int uart1_muxvals[] = {0, 1};\n-static const unsigned uart2_pins[] = {96, 102};\n-static const int uart2_muxvals[] = {2, 2};\n-static const unsigned usb0_pins[] = {13, 14};\n-static const int usb0_muxvals[] = {0, 1};\n-static const unsigned usb1_pins[] = {15, 16};\n-static const int usb1_muxvals[] = {0, 1};\n-static const unsigned usb2_pins[] = {17, 18};\n-static const int usb2_muxvals[] = {0, 1};\n-static const unsigned usb3_pins[] = {19, 20};\n-static const int usb3_muxvals[] = {0, 1};\n-\n-static const struct uniphier_pinctrl_group uniphier_sld3_groups[] = {\n-\tUNIPHIER_PINCTRL_GROUP_SPL(emmc),\n-\tUNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),\n-\tUNIPHIER_PINCTRL_GROUP(ether_mii),\n-\tUNIPHIER_PINCTRL_GROUP(ether_rmii),\n-\tUNIPHIER_PINCTRL_GROUP(i2c0),\n-\tUNIPHIER_PINCTRL_GROUP(nand),\n-\tUNIPHIER_PINCTRL_GROUP(nand_cs1),\n-\tUNIPHIER_PINCTRL_GROUP(sd),\n-\tUNIPHIER_PINCTRL_GROUP(system_bus),\n-\tUNIPHIER_PINCTRL_GROUP(system_bus_cs0),\n-\tUNIPHIER_PINCTRL_GROUP(system_bus_cs1),\n-\tUNIPHIER_PINCTRL_GROUP(system_bus_cs2),\n-\tUNIPHIER_PINCTRL_GROUP(system_bus_cs3),\n-\tUNIPHIER_PINCTRL_GROUP(system_bus_cs4),\n-\tUNIPHIER_PINCTRL_GROUP(system_bus_cs5),\n-\tUNIPHIER_PINCTRL_GROUP_SPL(uart0),\n-\tUNIPHIER_PINCTRL_GROUP_SPL(uart1),\n-\tUNIPHIER_PINCTRL_GROUP_SPL(uart2),\n-\tUNIPHIER_PINCTRL_GROUP(usb0),\n-\tUNIPHIER_PINCTRL_GROUP(usb1),\n-\tUNIPHIER_PINCTRL_GROUP(usb2),\n-\tUNIPHIER_PINCTRL_GROUP(usb3)\n-};\n-\n-static const char * const uniphier_sld3_functions[] = {\n-\tUNIPHIER_PINMUX_FUNCTION_SPL(emmc),\n-\tUNIPHIER_PINMUX_FUNCTION(ether_mii),\n-\tUNIPHIER_PINMUX_FUNCTION(ether_rmii),\n-\tUNIPHIER_PINMUX_FUNCTION(i2c0),\n-\tUNIPHIER_PINMUX_FUNCTION(nand),\n-\tUNIPHIER_PINMUX_FUNCTION(sd),\n-\tUNIPHIER_PINMUX_FUNCTION(system_bus),\n-\tUNIPHIER_PINMUX_FUNCTION_SPL(uart0),\n-\tUNIPHIER_PINMUX_FUNCTION_SPL(uart1),\n-\tUNIPHIER_PINMUX_FUNCTION_SPL(uart2),\n-\tUNIPHIER_PINMUX_FUNCTION(usb0),\n-\tUNIPHIER_PINMUX_FUNCTION(usb1),\n-\tUNIPHIER_PINMUX_FUNCTION(usb2),\n-\tUNIPHIER_PINMUX_FUNCTION(usb3),\n-};\n-\n-static struct uniphier_pinctrl_socdata uniphier_sld3_pinctrl_socdata = {\n-\t.groups = uniphier_sld3_groups,\n-\t.groups_count = ARRAY_SIZE(uniphier_sld3_groups),\n-\t.functions = uniphier_sld3_functions,\n-\t.functions_count = ARRAY_SIZE(uniphier_sld3_functions),\n-\t.caps = UNIPHIER_PINCTRL_CAPS_MUX_4BIT,\n-};\n-\n-static int uniphier_sld3_pinctrl_probe(struct udevice *dev)\n-{\n-\treturn uniphier_pinctrl_probe(dev, &uniphier_sld3_pinctrl_socdata);\n-}\n-\n-static const struct udevice_id uniphier_sld3_pinctrl_match[] = {\n-\t{ .compatible = \"socionext,uniphier-sld3-pinctrl\" },\n-\t{ /* sentinel */ }\n-};\n-\n-U_BOOT_DRIVER(uniphier_sld3_pinctrl) = {\n-\t.name = \"uniphier-sld3-pinctrl\",\n-\t.id = UCLASS_PINCTRL,\n-\t.of_match = of_match_ptr(uniphier_sld3_pinctrl_match),\n-\t.probe = uniphier_sld3_pinctrl_probe,\n-\t.priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv),\n-\t.ops = &uniphier_pinctrl_ops,\n-};\ndiff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c\nindex 17e971a427f9..df7fa267d13c 100644\n--- a/drivers/reset/reset-uniphier.c\n+++ b/drivers/reset/reset-uniphier.c\n@@ -56,7 +56,7 @@ struct uniphier_reset_data {\n #define UNIPHIER_PRO4_SYS_RESET_USB3(id, ch)\t\t\\\n \tUNIPHIER_RESETX((id), 0x2000 + 0x4 * (ch), 17)\n \n-static const struct uniphier_reset_data uniphier_sld3_sys_reset_data[] = {\n+static const struct uniphier_reset_data uniphier_ld4_sys_reset_data[] = {\n \tUNIPHIER_SLD3_SYS_RESET_STDMAC(8),\t/* Ether, HSC, MIO */\n \tUNIPHIER_RESET_END,\n };\n@@ -270,12 +270,8 @@ static int uniphier_reset_probe(struct udevice *dev)\n static const struct udevice_id uniphier_reset_match[] = {\n \t/* System reset */\n \t{\n-\t\t.compatible = \"socionext,uniphier-sld3-reset\",\n-\t\t.data = (ulong)uniphier_sld3_sys_reset_data,\n-\t},\n-\t{\n \t\t.compatible = \"socionext,uniphier-ld4-reset\",\n-\t\t.data = (ulong)uniphier_sld3_sys_reset_data,\n+\t\t.data = (ulong)uniphier_ld4_sys_reset_data,\n \t},\n \t{\n \t\t.compatible = \"socionext,uniphier-pro4-reset\",\n@@ -283,7 +279,7 @@ static const struct udevice_id uniphier_reset_match[] = {\n \t},\n \t{\n \t\t.compatible = \"socionext,uniphier-sld8-reset\",\n-\t\t.data = (ulong)uniphier_sld3_sys_reset_data,\n+\t\t.data = (ulong)uniphier_ld4_sys_reset_data,\n \t},\n \t{\n \t\t.compatible = \"socionext,uniphier-pro5-reset\",\n@@ -303,10 +299,6 @@ static const struct udevice_id uniphier_reset_match[] = {\n \t},\n \t/* Media I/O reset */\n \t{\n-\t\t.compatible = \"socionext,uniphier-sld3-mio-clock\",\n-\t\t.data = (ulong)uniphier_mio_reset_data,\n-\t},\n-\t{\n \t\t.compatible = \"socionext,uniphier-ld4-mio-reset\",\n \t\t.data = (ulong)uniphier_mio_reset_data,\n \t},\ndiff --git a/include/configs/uniphier.h b/include/configs/uniphier.h\nindex 6f5313931ab9..9a64063c3ee6 100644\n--- a/include/configs/uniphier.h\n+++ b/include/configs/uniphier.h\n@@ -88,13 +88,8 @@\n \n #define CONFIG_NAND_DENALI_ECC_SIZE\t\t\t1024\n \n-#ifdef CONFIG_ARCH_UNIPHIER_SLD3\n-#define CONFIG_SYS_NAND_REGS_BASE\t\t\t0xf8100000\n-#define CONFIG_SYS_NAND_DATA_BASE\t\t\t0xf8000000\n-#else\n #define CONFIG_SYS_NAND_REGS_BASE\t\t\t0x68100000\n #define CONFIG_SYS_NAND_DATA_BASE\t\t\t0x68000000\n-#endif\n \n #define CONFIG_SYS_NAND_BASE\t\t(CONFIG_SYS_NAND_DATA_BASE + 0x10)\n \n@@ -249,8 +244,7 @@\n #define CONFIG_SYS_INIT_SP_ADDR\t\t(CONFIG_SYS_TEXT_BASE)\n \n /* only for SPL */\n-#if defined(CONFIG_ARCH_UNIPHIER_SLD3) || \\\n-\tdefined(CONFIG_ARCH_UNIPHIER_LD4) || \\\n+#if defined(CONFIG_ARCH_UNIPHIER_LD4) || \\\n \tdefined(CONFIG_ARCH_UNIPHIER_SLD8)\n #define CONFIG_SPL_TEXT_BASE\t\t0x00040000\n #else\n",
    "prefixes": [
        "U-Boot",
        "1/5"
    ]
}