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GET /api/1.2/patches/768121/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 768121,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/768121/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170529101148.GB13938@fergus.ozlabs.ibm.com/",
    "project": {
        "id": 2,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/2/?format=api",
        "name": "Linux PPC development",
        "link_name": "linuxppc-dev",
        "list_id": "linuxppc-dev.lists.ozlabs.org",
        "list_email": "linuxppc-dev@lists.ozlabs.org",
        "web_url": "https://github.com/linuxppc/wiki/wiki",
        "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git",
        "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/",
        "list_archive_url": "https://lore.kernel.org/linuxppc-dev/",
        "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/",
        "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"
    },
    "msgid": "<20170529101148.GB13938@fergus.ozlabs.ibm.com>",
    "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170529101148.GB13938@fergus.ozlabs.ibm.com/",
    "date": "2017-05-29T10:11:48",
    "name": "[V3,1/2] KVM: PPC: Book3S HV: Cope with host using large decrementer mode",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "67981de704949f96531b8b412919e7f537129680",
    "submitter": {
        "id": 67079,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/67079/?format=api",
        "name": "Paul Mackerras",
        "email": "paulus@ozlabs.org"
    },
    "delegate": {
        "id": 13,
        "url": "http://patchwork.ozlabs.org/api/1.2/users/13/?format=api",
        "username": "paulus",
        "first_name": "Paul",
        "last_name": "Mackerras",
        "email": "paulus@samba.org"
    },
    "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170529101148.GB13938@fergus.ozlabs.ibm.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/768121/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/768121/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>",
        "X-Original-To": [
            "patchwork-incoming@ozlabs.org",
            "linuxppc-dev@lists.ozlabs.org"
        ],
        "Delivered-To": [
            "patchwork-incoming@ozlabs.org",
            "linuxppc-dev@lists.ozlabs.org",
            "linuxppc-dev@ozlabs.org"
        ],
        "Received": [
            "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3wbsyG0mWLz9s2s\n\tfor <patchwork-incoming@ozlabs.org>;\n\tMon, 29 May 2017 20:13:26 +1000 (AEST)",
            "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3wbsyG00y4zDqMN\n\tfor <patchwork-incoming@ozlabs.org>;\n\tMon, 29 May 2017 20:13:26 +1000 (AEST)",
            "from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3wbsx5376jzDq9m\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tMon, 29 May 2017 20:12:25 +1000 (AEST)",
            "by ozlabs.org (Postfix)\n\tid 3wbsx51qXVz9s7M; Mon, 29 May 2017 20:12:25 +1000 (AEST)",
            "by ozlabs.org (Postfix, from userid 1003)\n\tid 3wbsx51X0Dz9s74; Mon, 29 May 2017 20:12:25 +1000 (AEST)"
        ],
        "Date": "Mon, 29 May 2017 20:11:48 +1000",
        "From": "Paul Mackerras <paulus@ozlabs.org>",
        "To": "kvm@vger.kernel.org",
        "Subject": "[PATCH V3 1/2] KVM: PPC: Book3S HV: Cope with host using large\n\tdecrementer mode",
        "Message-ID": "<20170529101148.GB13938@fergus.ozlabs.ibm.com>",
        "References": "<20170529101113.GA13938@fergus.ozlabs.ibm.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=us-ascii",
        "Content-Disposition": "inline",
        "In-Reply-To": "<20170529101113.GA13938@fergus.ozlabs.ibm.com>",
        "User-Agent": "Mutt/1.5.24 (2015-08-30)",
        "X-BeenThere": "linuxppc-dev@lists.ozlabs.org",
        "X-Mailman-Version": "2.1.23",
        "Precedence": "list",
        "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>",
        "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>",
        "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>",
        "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>",
        "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>",
        "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>",
        "Cc": "linuxppc-dev@ozlabs.org, kvm-ppc@vger.kernel.org",
        "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org",
        "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>"
    },
    "content": "POWER9 introduces a new mode for the decrementer register, called\nlarge decrementer mode, in which the decrementer counter is 56 bits\nwide rather than 32, and reads are sign-extended rather than\nzero-extended.  For the decrementer, this new mode is optional and\ncontrolled by a bit in the LPCR.  The hypervisor decrementer (HDEC)\nis 56 bits wide on POWER9 and has no mode control.\n\nSince KVM code reads and writes the decrementer and hypervisor\ndecrementer registers in a few places, it needs to be aware of the\nneed to treat the decrementer value as a 64-bit quantity, and only do\na 32-bit sign extension when large decrementer mode is not in effect.\nSimilarly, the HDEC should always be treated as a 64-bit quantity on\nPOWER9.  We define a new EXTEND_HDEC macro to encapsulate the feature\ntest for POWER9 and the sign extension.\n\nTo enable the sign extension to be removed in large decrementer mode,\nwe test the LPCR_LD bit in the host LPCR image stored in the struct\nkvm for the guest.  If is set then large decrementer mode is enabled\nand the sign extension should be skipped.\n\nThis is partly based on an earlier patch by Oliver O'Halloran.\n\nCc: stable@vger.kernel.org # v4.10+\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>\n---\n arch/powerpc/kvm/book3s_hv_interrupts.S | 12 +++++++++++-\n arch/powerpc/kvm/book3s_hv_rmhandlers.S | 23 +++++++++++++++++------\n 2 files changed, 28 insertions(+), 7 deletions(-)",
    "diff": "diff --git a/arch/powerpc/kvm/book3s_hv_interrupts.S b/arch/powerpc/kvm/book3s_hv_interrupts.S\nindex 0fdc4a2..404deb5 100644\n--- a/arch/powerpc/kvm/book3s_hv_interrupts.S\n+++ b/arch/powerpc/kvm/book3s_hv_interrupts.S\n@@ -121,10 +121,20 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)\n \t * Put whatever is in the decrementer into the\n \t * hypervisor decrementer.\n \t */\n+BEGIN_FTR_SECTION\n+\tld\tr5, HSTATE_KVM_VCORE(r13)\n+\tld\tr6, VCORE_KVM(r5)\n+\tld\tr9, KVM_HOST_LPCR(r6)\n+\tandis.\tr9, r9, LPCR_LD@h\n+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)\n \tmfspr\tr8,SPRN_DEC\n \tmftb\tr7\n-\tmtspr\tSPRN_HDEC,r8\n+BEGIN_FTR_SECTION\n+\t/* On POWER9, don't sign-extend if host LPCR[LD] bit is set */\n+\tbne\t32f\n+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)\n \textsw\tr8,r8\n+32:\tmtspr\tSPRN_HDEC,r8\n \tadd\tr8,r8,r7\n \tstd\tr8,HSTATE_DECEXP(r13)\n \ndiff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S\nindex bdb3f76..e390b38 100644\n--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S\n+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S\n@@ -32,6 +32,12 @@\n #include <asm/opal.h>\n #include <asm/xive-regs.h>\n \n+/* Sign-extend HDEC if not on POWER9 */\n+#define EXTEND_HDEC(reg)\t\t\t\\\n+BEGIN_FTR_SECTION;\t\t\t\t\\\n+\textsw\treg, reg;\t\t\t\\\n+END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)\n+\n #define VCPU_GPRS_TM(reg) (((reg) * ULONG_SIZE) + VCPU_GPR_TM)\n \n /* Values in HSTATE_NAPPING(r13) */\n@@ -214,6 +220,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)\n kvmppc_primary_no_guest:\n \t/* We handle this much like a ceded vcpu */\n \t/* put the HDEC into the DEC, since HDEC interrupts don't wake us */\n+\t/* HDEC may be larger than DEC for arch >= v3.00, but since the */\n+\t/* HDEC value came from DEC in the first place, it will fit */\n \tmfspr\tr3, SPRN_HDEC\n \tmtspr\tSPRN_DEC, r3\n \t/*\n@@ -295,8 +303,9 @@ kvm_novcpu_wakeup:\n \n \t/* See if our timeslice has expired (HDEC is negative) */\n \tmfspr\tr0, SPRN_HDEC\n+\tEXTEND_HDEC(r0)\n \tli\tr12, BOOK3S_INTERRUPT_HV_DECREMENTER\n-\tcmpwi\tr0, 0\n+\tcmpdi\tr0, 0\n \tblt\tkvm_novcpu_exit\n \n \t/* Got an IPI but other vcpus aren't yet exiting, must be a latecomer */\n@@ -390,8 +399,8 @@ kvm_secondary_got_guest:\n \tlbz\tr4, HSTATE_PTID(r13)\n \tcmpwi\tr4, 0\n \tbne\t63f\n-\tlis\tr6, 0x7fff\n-\tori\tr6, r6, 0xffff\n+\tLOAD_REG_ADDR(r6, decrementer_max)\n+\tld\tr6, 0(r6)\n \tmtspr\tSPRN_HDEC, r6\n \t/* and set per-LPAR registers, if doing dynamic micro-threading */\n \tld\tr6, HSTATE_SPLIT_MODE(r13)\n@@ -968,7 +977,8 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_300)\n \n \t/* Check if HDEC expires soon */\n \tmfspr\tr3, SPRN_HDEC\n-\tcmpwi\tr3, 512\t\t/* 1 microsecond */\n+\tEXTEND_HDEC(r3)\n+\tcmpdi\tr3, 512\t\t/* 1 microsecond */\n \tblt\thdec_soon\n \n #ifdef CONFIG_KVM_XICS\n@@ -2366,12 +2376,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_TM)\n \tmfspr\tr3, SPRN_DEC\n \tmfspr\tr4, SPRN_HDEC\n \tmftb\tr5\n-\tcmpw\tr3, r4\n+\textsw\tr3, r3\n+\tEXTEND_HDEC(r4)\n+\tcmpd\tr3, r4\n \tble\t67f\n \tmtspr\tSPRN_DEC, r4\n 67:\n \t/* save expiry time of guest decrementer */\n-\textsw\tr3, r3\n \tadd\tr3, r3, r5\n \tld\tr4, HSTATE_KVM_VCPU(r13)\n \tld\tr5, HSTATE_KVM_VCORE(r13)\n",
    "prefixes": [
        "V3",
        "1/2"
    ]
}