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GET /api/1.2/patches/2235219/?format=api
{ "id": 2235219, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2235219/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508034912.4082520-4-rkannoth@marvell.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/1.2/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260508034912.4082520-4-rkannoth@marvell.com>", "list_archive_url": null, "date": "2026-05-08T03:49:06", "name": "[v12,net-next,3/9] devlink: pass param values by pointer", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5814b3f91d657082280b06afe4bfcf71f28b54bc", "submitter": { "id": 86908, "url": "http://patchwork.ozlabs.org/api/1.2/people/86908/?format=api", "name": "Ratheesh Kannoth", "email": "rkannoth@marvell.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508034912.4082520-4-rkannoth@marvell.com/mbox/", "series": [ { "id": 503453, "url": "http://patchwork.ozlabs.org/api/1.2/series/503453/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=503453", "date": "2026-05-08T03:49:12", "name": "octeontx2-af: npc: Enhancements.", "version": 12, "mbox": "http://patchwork.ozlabs.org/series/503453/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2235219/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2235219/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=Iq1/lzWa;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::137; helo=smtp4.osuosl.org;\n envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from smtp4.osuosl.org (smtp4.osuosl.org [IPv6:2605:bc80:3010::137])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gC3Dx2hfdz1yCg\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 09 May 2026 08:09:21 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby smtp4.osuosl.org (Postfix) with ESMTP id DA27341271;\n\tFri, 8 May 2026 22:09:13 +0000 (UTC)", "from smtp4.osuosl.org ([127.0.0.1])\n by localhost (smtp4.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id J5nbUw1f5fLl; Fri, 8 May 2026 22:09:12 +0000 (UTC)", "from lists1.osuosl.org (lists1.osuosl.org [140.211.166.142])\n\tby smtp4.osuosl.org (Postfix) with ESMTP id 1FE80410F1;\n\tFri, 8 May 2026 22:09:12 +0000 (UTC)", "from smtp2.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n by lists1.osuosl.org (Postfix) with ESMTP id 7570E272\n for <intel-wired-lan@lists.osuosl.org>; Fri, 8 May 2026 04:04:54 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n by smtp2.osuosl.org (Postfix) with ESMTP id 65B4E409D6\n for <intel-wired-lan@lists.osuosl.org>; Fri, 8 May 2026 04:04:53 +0000 (UTC)", "from smtp2.osuosl.org ([127.0.0.1])\n by localhost (smtp2.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id Qic1PydvTt_B for <intel-wired-lan@lists.osuosl.org>;\n Fri, 8 May 2026 04:04:51 +0000 (UTC)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by smtp2.osuosl.org (Postfix) with ESMTPS id 987B7404A0\n for <intel-wired-lan@lists.osuosl.org>; Fri, 8 May 2026 04:04:51 +0000 (UTC)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 6482MJx41753734; Thu, 7 May 2026 20:50:04 -0700", "from dc6wp-exch02.marvell.com ([4.21.29.225])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 4e0uytj5m7-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Thu, 07 May 2026 20:50:03 -0700 (PDT)", "from DC6WP-EXCH02.marvell.com (10.76.176.209) by\n DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1544.25; Thu, 7 May 2026 20:50:02 -0700", "from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com\n (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.25 via Frontend\n Transport; Thu, 7 May 2026 20:50:02 -0700", "from rkannoth-OptiPlex-7090.. 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a=rsa-sha256; c=relaxed/relaxed;\n d=marvell.com; h=\n cc:content-transfer-encoding:content-type:date:from:in-reply-to\n :message-id:mime-version:references:subject:to; s=pfpt0220; bh=1\n wD2y1KGe0ZVodxypLXCmUazk3eJ1YL4kaBybrLvx1Q=; b=BlRtlpJXfVRZ3jELa\n wHhK+znCe/K6rjkVNQWOvi7m6LMylA+AVNpBleXO/GAJGBk7YM8xT7fCK4pb+g/r\n CE9tVJSXbLtVoJzMHH8/3xb7RguXJbY8nByC8I0YLyXQN2sRNmQS2FJ81P65vxgg\n oFH0GjNrQcodm7C4ivvznKeQGVN1fani7r/dPP+jDqD/zsZLVUJmU3IDIrspLuj0\n oBZtqup03SYM2Ts0chtfWyIVFtRGh3ZkDg/+d57RcimdYm8qpKhulGy2aQvhNjHm\n svZREfU2V3X5hYK5oETlgCdVoNjdnhMBjN8bPu/L4Fm7ZrWlvVOx1yYR2OuggKpp\n R1bxA==", "X-Mailman-Original-Authentication-Results": [ "smtp2.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=marvell.com", "smtp2.osuosl.org;\n dkim=pass (2048-bit key,\n unprotected) header.d=marvell.com header.i=@marvell.com header.a=rsa-sha256\n header.s=pfpt0220 header.b=BlRtlpJX" ], "Subject": "[Intel-wired-lan] [PATCH v12 net-next 3/9] devlink: pass param\n values by pointer", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "union devlink_param_value grows substantially once U64 array\nparameters are added to devlink (from 32 bytes to over 264 bytes).\ndevlink_nl_param_value_fill_one() and devlink_nl_param_value_put()\ncopy the union by value in several places. Passing two instances as\nvalue arguments alone consumes over 528 bytes of stack; combined with\ndeeper call chains the parameter stack can approach 800 bytes and trip\nCONFIG_FRAME_WARN more easily.\n\nSwitch internal helpers and exported driver APIs to pass pointers to\nunion devlink_param_value rather than passing the union by value.\n\nSigned-off-by: Ratheesh Kannoth <rkannoth@marvell.com>\n---\n drivers/dpll/zl3073x/devlink.c | 6 +-\n drivers/net/ethernet/amazon/ena/ena_devlink.c | 8 +--\n drivers/net/ethernet/amd/pds_core/core.h | 2 +-\n drivers/net/ethernet/amd/pds_core/devlink.c | 2 +-\n .../net/ethernet/broadcom/bnxt/bnxt_devlink.c | 6 +-\n .../net/ethernet/intel/ice/devlink/devlink.c | 30 ++++----\n .../marvell/octeontx2/af/rvu_devlink.c | 22 +++---\n .../marvell/octeontx2/nic/otx2_devlink.c | 4 +-\n drivers/net/ethernet/mellanox/mlx4/main.c | 14 ++--\n .../net/ethernet/mellanox/mlx5/core/devlink.c | 72 +++++++++----------\n .../mellanox/mlx5/core/eswitch_offloads.c | 2 +-\n .../net/ethernet/mellanox/mlx5/core/fs_core.c | 4 +-\n .../mellanox/mlx5/core/lib/nv_param.c | 12 ++--\n drivers/net/ethernet/mellanox/mlxsw/core.c | 8 +--\n .../ethernet/netronome/nfp/devlink_param.c | 6 +-\n drivers/net/netdevsim/dev.c | 4 +-\n include/net/devlink.h | 4 +-\n net/devlink/param.c | 32 ++++-----\n 18 files changed, 119 insertions(+), 119 deletions(-)", "diff": "diff --git a/drivers/dpll/zl3073x/devlink.c b/drivers/dpll/zl3073x/devlink.c\nindex ccc22332b346..218b08fd8a30 100644\n--- a/drivers/dpll/zl3073x/devlink.c\n+++ b/drivers/dpll/zl3073x/devlink.c\n@@ -315,10 +315,10 @@ EXPORT_SYMBOL_NS_GPL(zl3073x_devm_alloc, \"ZL3073X\");\n \n static int\n zl3073x_devlink_param_clock_id_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\tunion devlink_param_value val,\n+\t\t\t\t\tunion devlink_param_value *val,\n \t\t\t\t\tstruct netlink_ext_ack *extack)\n {\n-\tif (!val.vu64) {\n+\tif (!val->vu64) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"'clock_id' must be non-zero\");\n \t\treturn -EINVAL;\n \t}\n@@ -377,7 +377,7 @@ int zl3073x_devlink_register(struct zl3073x_dev *zldev)\n \tvalue.vu64 = zldev->clock_id;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_CLOCK_ID,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n \t/* Register devlink instance */\n \tdevl_register(devlink);\ndiff --git a/drivers/net/ethernet/amazon/ena/ena_devlink.c b/drivers/net/ethernet/amazon/ena/ena_devlink.c\nindex 4772185e669d..5ea9fef149aa 100644\n--- a/drivers/net/ethernet/amazon/ena/ena_devlink.c\n+++ b/drivers/net/ethernet/amazon/ena/ena_devlink.c\n@@ -8,12 +8,12 @@\n #include \"ena_phc.h\"\n \n static int ena_devlink_enable_phc_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);\n \n-\tif (!val.vbool)\n+\tif (!val->vbool)\n \t\treturn 0;\n \n \tif (!ena_com_phc_supported(adapter->ena_dev)) {\n@@ -57,7 +57,7 @@ void ena_devlink_disable_phc_param(struct devlink *devlink)\n \tvalue.vbool = false;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_ENABLE_PHC,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \tdevl_unlock(devlink);\n }\n \n@@ -151,7 +151,7 @@ static int ena_devlink_configure_params(struct devlink *devlink)\n \tvalue.vbool = ena_phc_is_enabled(adapter);\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_ENABLE_PHC,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \tdevl_unlock(devlink);\n \n \treturn 0;\ndiff --git a/drivers/net/ethernet/amd/pds_core/core.h b/drivers/net/ethernet/amd/pds_core/core.h\nindex 4a6b35c84dab..b7fe9ad73349 100644\n--- a/drivers/net/ethernet/amd/pds_core/core.h\n+++ b/drivers/net/ethernet/amd/pds_core/core.h\n@@ -261,7 +261,7 @@ int pdsc_dl_enable_set(struct devlink *dl, u32 id,\n \t\t struct devlink_param_gset_ctx *ctx,\n \t\t struct netlink_ext_ack *extack);\n int pdsc_dl_enable_validate(struct devlink *dl, u32 id,\n-\t\t\t union devlink_param_value val,\n+\t\t\t union devlink_param_value *val,\n \t\t\t struct netlink_ext_ack *extack);\n \n void __iomem *pdsc_map_dbpage(struct pdsc *pdsc, int page_num);\ndiff --git a/drivers/net/ethernet/amd/pds_core/devlink.c b/drivers/net/ethernet/amd/pds_core/devlink.c\nindex b576be626a29..fe0595d31683 100644\n--- a/drivers/net/ethernet/amd/pds_core/devlink.c\n+++ b/drivers/net/ethernet/amd/pds_core/devlink.c\n@@ -68,7 +68,7 @@ int pdsc_dl_enable_set(struct devlink *dl, u32 id,\n }\n \n int pdsc_dl_enable_validate(struct devlink *dl, u32 id,\n-\t\t\t union devlink_param_value val,\n+\t\t\t union devlink_param_value *val,\n \t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct pdsc *pdsc = devlink_priv(dl);\ndiff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c\nindex 835f2b413931..eb17a3454b4c 100644\n--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c\n+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c\n@@ -1123,7 +1123,7 @@ static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,\n }\n \n static int bnxt_dl_roce_validate(struct devlink *dl, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n \tconst struct bnxt_dl_nvm_param nvm_roce_cap = {0, NVM_OFF_RDMA_CAPABLE,\n@@ -1149,7 +1149,7 @@ static int bnxt_dl_roce_validate(struct devlink *dl, u32 id,\n }\n \n static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n \tint max_val = -1;\n@@ -1160,7 +1160,7 @@ static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,\n \tif (id == DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN)\n \t\tmax_val = BNXT_MSIX_VEC_MIN_MAX;\n \n-\tif (val.vu32 > max_val) {\n+\tif (val->vu32 > max_val) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"MSIX value is exceeding the range\");\n \t\treturn -EINVAL;\n \t}\ndiff --git a/drivers/net/ethernet/intel/ice/devlink/devlink.c b/drivers/net/ethernet/intel/ice/devlink/devlink.c\nindex 641d6e289d5c..22b7d8e6bd9e 100644\n--- a/drivers/net/ethernet/intel/ice/devlink/devlink.c\n+++ b/drivers/net/ethernet/intel/ice/devlink/devlink.c\n@@ -671,10 +671,10 @@ static int ice_devlink_tx_sched_layers_set(struct devlink *devlink, u32 id,\n * error.\n */\n static int ice_devlink_tx_sched_layers_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t\tunion devlink_param_value val,\n+\t\t\t\t\t\tunion devlink_param_value *val,\n \t\t\t\t\t\tstruct netlink_ext_ack *extack)\n {\n-\tif (val.vu8 != ICE_SCHED_5_LAYERS && val.vu8 != ICE_SCHED_9_LAYERS) {\n+\tif (val->vu8 != ICE_SCHED_5_LAYERS && val->vu8 != ICE_SCHED_9_LAYERS) {\n \t\tNL_SET_ERR_MSG_MOD(extack,\n \t\t\t\t \"Wrong number of tx scheduler layers provided.\");\n \t\treturn -EINVAL;\n@@ -1398,7 +1398,7 @@ static int ice_devlink_enable_roce_set(struct devlink *devlink, u32 id,\n \n static int\n ice_devlink_enable_roce_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct ice_pf *pf = devlink_priv(devlink);\n@@ -1465,7 +1465,7 @@ static int ice_devlink_enable_iw_set(struct devlink *devlink, u32 id,\n \n static int\n ice_devlink_enable_iw_validate(struct devlink *devlink, u32 id,\n-\t\t\t union devlink_param_value val,\n+\t\t\t union devlink_param_value *val,\n \t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct ice_pf *pf = devlink_priv(devlink);\n@@ -1591,10 +1591,10 @@ static int ice_devlink_local_fwd_set(struct devlink *devlink, u32 id,\n * error.\n */\n static int ice_devlink_local_fwd_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n-\tif (ice_devlink_local_fwd_str_to_mode(val.vstr) < 0) {\n+\tif (ice_devlink_local_fwd_str_to_mode(val->vstr) < 0) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"Error: Requested value is not supported.\");\n \t\treturn -EINVAL;\n \t}\n@@ -1604,12 +1604,12 @@ static int ice_devlink_local_fwd_validate(struct devlink *devlink, u32 id,\n \n static int\n ice_devlink_msix_max_pf_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct ice_pf *pf = devlink_priv(devlink);\n \n-\tif (val.vu32 > pf->hw.func_caps.common_cap.num_msix_vectors)\n+\tif (val->vu32 > pf->hw.func_caps.common_cap.num_msix_vectors)\n \t\treturn -EINVAL;\n \n \treturn 0;\n@@ -1617,21 +1617,21 @@ ice_devlink_msix_max_pf_validate(struct devlink *devlink, u32 id,\n \n static int\n ice_devlink_msix_min_pf_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n-\tif (val.vu32 < ICE_MIN_MSIX)\n+\tif (val->vu32 < ICE_MIN_MSIX)\n \t\treturn -EINVAL;\n \n \treturn 0;\n }\n \n static int ice_devlink_enable_rdma_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct ice_pf *pf = devlink_priv(devlink);\n-\tbool new_state = val.vbool;\n+\tbool new_state = val->vbool;\n \n \tif (new_state && !test_bit(ICE_FLAG_RDMA_ENA, pf->flags))\n \t\treturn -EOPNOTSUPP;\n@@ -1791,16 +1791,16 @@ int ice_devlink_register_params(struct ice_pf *pf)\n \tvalue.vu32 = pf->msix.max;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \tvalue.vu32 = pf->msix.min;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n \tvalue.vbool = test_bit(ICE_FLAG_RDMA_ENA, pf->flags);\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n \treturn 0;\n \ndiff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c\nindex 6494a9ee2f0d..a42404e6db7c 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c\n@@ -1180,12 +1180,12 @@ static void rvu_health_reporters_destroy(struct rvu *rvu)\n \n /* Devlink Params APIs */\n static int rvu_af_dl_dwrr_mtu_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct rvu_devlink *rvu_dl = devlink_priv(devlink);\n \tstruct rvu *rvu = rvu_dl->rvu;\n-\tint dwrr_mtu = val.vu32;\n+\tint dwrr_mtu = val->vu32;\n \tstruct nix_txsch *txsch;\n \tstruct nix_hw *nix_hw;\n \n@@ -1295,14 +1295,14 @@ static int rvu_af_npc_defrag(struct devlink *devlink, u32 id,\n }\n \n static int rvu_af_npc_defrag_feature_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct rvu_devlink *rvu_dl = devlink_priv(devlink);\n \tstruct rvu *rvu = rvu_dl->rvu;\n \tu64 enable;\n \n-\tif (kstrtoull(val.vstr, 10, &enable)) {\n+\tif (kstrtoull(val->vstr, 10, &enable)) {\n \t\tNL_SET_ERR_MSG_MOD(extack,\n \t\t\t\t \"Only 1 value is supported\");\n \t\treturn -EINVAL;\n@@ -1351,14 +1351,14 @@ static int rvu_af_npc_exact_feature_disable(struct devlink *devlink, u32 id,\n }\n \n static int rvu_af_npc_exact_feature_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct rvu_devlink *rvu_dl = devlink_priv(devlink);\n \tstruct rvu *rvu = rvu_dl->rvu;\n \tu64 enable;\n \n-\tif (kstrtoull(val.vstr, 10, &enable)) {\n+\tif (kstrtoull(val->vstr, 10, &enable)) {\n \t\tNL_SET_ERR_MSG_MOD(extack,\n \t\t\t\t \"Only 1 value is supported\");\n \t\treturn -EINVAL;\n@@ -1414,7 +1414,7 @@ static int rvu_af_dl_npc_mcam_high_zone_percent_set(struct devlink *devlink, u32\n }\n \n static int rvu_af_dl_npc_mcam_high_zone_percent_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct rvu_devlink *rvu_dl = devlink_priv(devlink);\n@@ -1422,7 +1422,7 @@ static int rvu_af_dl_npc_mcam_high_zone_percent_validate(struct devlink *devlink\n \tstruct npc_mcam *mcam;\n \n \t/* The percent of high prio zone must range from 12% to 100% of unreserved mcam space */\n-\tif (val.vu8 < 12 || val.vu8 > 100) {\n+\tif (val->vu8 < 12 || val->vu8 > 100) {\n \t\tNL_SET_ERR_MSG_MOD(extack,\n \t\t\t\t \"mcam high zone percent must be between 12% to 100%\");\n \t\treturn -EINVAL;\n@@ -1504,7 +1504,7 @@ static int rvu_af_dl_nix_maxlf_set(struct devlink *devlink, u32 id,\n }\n \n static int rvu_af_dl_nix_maxlf_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\tunion devlink_param_value val,\n+\t\t\t\t\tunion devlink_param_value *val,\n \t\t\t\t\tstruct netlink_ext_ack *extack)\n {\n \tstruct rvu_devlink *rvu_dl = devlink_priv(devlink);\n@@ -1528,13 +1528,13 @@ static int rvu_af_dl_nix_maxlf_validate(struct devlink *devlink, u32 id,\n \t\treturn -EPERM;\n \t}\n \n-\tif (max_nix0_lf && val.vu16 > max_nix0_lf) {\n+\tif (max_nix0_lf && val->vu16 > max_nix0_lf) {\n \t\tNL_SET_ERR_MSG_MOD(extack,\n \t\t\t\t \"requested nixlf is greater than the max supported nix0_lf\");\n \t\treturn -EPERM;\n \t}\n \n-\tif (max_nix1_lf && val.vu16 > max_nix1_lf) {\n+\tif (max_nix1_lf && val->vu16 > max_nix1_lf) {\n \t\tNL_SET_ERR_MSG_MOD(extack,\n \t\t\t\t \"requested nixlf is greater than the max supported nix1_lf\");\n \t\treturn -EINVAL;\ndiff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c\nindex a72694219df4..4a5ce0e67dda 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c\n@@ -8,7 +8,7 @@\n \n /* Devlink Params APIs */\n static int otx2_dl_mcam_count_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct otx2_devlink *otx2_dl = devlink_priv(devlink);\n@@ -97,7 +97,7 @@ static int otx2_dl_ucast_flt_cnt_get(struct devlink *devlink, u32 id,\n }\n \n static int otx2_dl_ucast_flt_cnt_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct otx2_devlink *otx2_dl = devlink_priv(devlink);\ndiff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c\nindex e6b7e75894ff..401bef135a90 100644\n--- a/drivers/net/ethernet/mellanox/mlx4/main.c\n+++ b/drivers/net/ethernet/mellanox/mlx4/main.c\n@@ -213,10 +213,10 @@ static int mlx4_devlink_crdump_snapshot_set(struct devlink *devlink, u32 id,\n \n static int\n mlx4_devlink_max_macs_validate(struct devlink *devlink, u32 id,\n-\t\t\t union devlink_param_value val,\n+\t\t\t union devlink_param_value *val,\n \t\t\t struct netlink_ext_ack *extack)\n {\n-\tu32 value = val.vu32;\n+\tu32 value = val->vu32;\n \n \tif (value < 1 || value > 128)\n \t\treturn -ERANGE;\n@@ -266,27 +266,27 @@ static void mlx4_devlink_set_params_init_values(struct devlink *devlink)\n \tvalue.vbool = !!mlx4_internal_err_reset;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_INT_ERR_RESET,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n \tvalue.vu32 = 1UL << log_num_mac;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_MAX_MACS,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n \tvalue.vbool = enable_64b_cqe_eqe;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tMLX4_DEVLINK_PARAM_ID_ENABLE_64B_CQE_EQE,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n \tvalue.vbool = enable_4k_uar;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tMLX4_DEVLINK_PARAM_ID_ENABLE_4K_UAR,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n \tvalue.vbool = false;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_REGION_SNAPSHOT,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n }\n \n static inline void mlx4_set_num_reserved_uars(struct mlx4_dev *dev,\ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c\nindex 73cf0321bb86..c31e05529fc4 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c\n@@ -459,11 +459,11 @@ void mlx5_devlink_free(struct devlink *devlink)\n }\n \n static int mlx5_devlink_enable_roce_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct mlx5_core_dev *dev = devlink_priv(devlink);\n-\tbool new_state = val.vbool;\n+\tbool new_state = val->vbool;\n \n \tif (new_state && !MLX5_CAP_GEN(dev, roce) &&\n \t !(MLX5_CAP_GEN(dev, roce_rw_supported) && MLX5_CAP_GEN_MAX(dev, roce))) {\n@@ -480,10 +480,10 @@ static int mlx5_devlink_enable_roce_validate(struct devlink *devlink, u32 id,\n \n #ifdef CONFIG_MLX5_ESWITCH\n static int mlx5_devlink_large_group_num_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t\t struct netlink_ext_ack *extack)\n {\n-\tint group_num = val.vu32;\n+\tint group_num = val->vu32;\n \n \tif (group_num < 1 || group_num > 1024) {\n \t\tNL_SET_ERR_MSG_MOD(extack,\n@@ -496,27 +496,27 @@ static int mlx5_devlink_large_group_num_validate(struct devlink *devlink, u32 id\n #endif\n \n static int mlx5_devlink_eq_depth_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n-\treturn (val.vu32 >= 64 && val.vu32 <= 4096) ? 0 : -EINVAL;\n+\treturn (val->vu32 >= 64 && val->vu32 <= 4096) ? 0 : -EINVAL;\n }\n \n static int\n mlx5_devlink_hairpin_num_queues_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n-\treturn val.vu32 ? 0 : -EINVAL;\n+\treturn val->vu32 ? 0 : -EINVAL;\n }\n \n static int\n mlx5_devlink_hairpin_queue_size_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct mlx5_core_dev *dev = devlink_priv(devlink);\n-\tu32 val32 = val.vu32;\n+\tu32 val32 = val->vu32;\n \n \tif (!is_power_of_2(val32)) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"Value is not power of two\");\n@@ -534,11 +534,11 @@ mlx5_devlink_hairpin_queue_size_validate(struct devlink *devlink, u32 id,\n }\n \n static int mlx5_devlink_num_doorbells_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct mlx5_core_dev *mdev = devlink_priv(devlink);\n-\tu32 val32 = val.vu32;\n+\tu32 val32 = val->vu32;\n \tu32 max_num_channels;\n \n \tmax_num_channels = mlx5e_get_max_num_channels(mdev);\n@@ -567,13 +567,13 @@ static void mlx5_devlink_hairpin_params_init_values(struct devlink *devlink)\n \n \tvalue.vu32 = link_speed64;\n \tdevl_param_driverinit_value_set(\n-\t\tdevlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES, value);\n+\t\tdevlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES, &value);\n \n \tvalue.vu32 =\n \t\tBIT(min_t(u32, 16 - MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(dev),\n \t\t\t MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));\n \tdevl_param_driverinit_value_set(\n-\t\tdevlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE, value);\n+\t\tdevlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE, &value);\n }\n \n static const struct devlink_param mlx5_devlink_params[] = {\n@@ -600,24 +600,24 @@ static void mlx5_devlink_set_params_init_values(struct devlink *devlink)\n \tvalue.vbool = MLX5_CAP_GEN(dev, roce) && !mlx5_dev_is_lightweight(dev);\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_ENABLE_ROCE,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n #ifdef CONFIG_MLX5_ESWITCH\n \tvalue.vu32 = ESW_OFFLOADS_DEFAULT_NUM_GROUPS;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tMLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n #endif\n \n \tvalue.vu32 = MLX5_COMP_EQ_SIZE;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_IO_EQ_SIZE,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n \tvalue.vu32 = MLX5_NUM_ASYNC_EQE;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_EVENT_EQ_SIZE,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n }\n \n static const struct devlink_param mlx5_devlink_eth_params[] = {\n@@ -653,14 +653,14 @@ static int mlx5_devlink_eth_params_register(struct devlink *devlink)\n \tvalue.vbool = !mlx5_dev_is_lightweight(dev);\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_ENABLE_ETH,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \n \tmlx5_devlink_hairpin_params_init_values(devlink);\n \n \tvalue.vu32 = MLX5_DEFAULT_NUM_DOORBELLS;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_NUM_DOORBELLS,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \treturn 0;\n }\n \n@@ -681,12 +681,12 @@ static void mlx5_devlink_eth_params_unregister(struct devlink *devlink)\n \n static int\n mlx5_devlink_pcie_cong_thresh_validate(struct devlink *devl, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n-\tif (val.vu16 > MLX5_PCIE_CONG_THRESH_MAX) {\n+\tif (val->vu16 > MLX5_PCIE_CONG_THRESH_MAX) {\n \t\tNL_SET_ERR_MSG_FMT_MOD(extack, \"Value %u > max supported (%u)\",\n-\t\t\t\t val.vu16, MLX5_PCIE_CONG_THRESH_MAX);\n+\t\t\t\t val->vu16, MLX5_PCIE_CONG_THRESH_MAX);\n \n \t\treturn -EINVAL;\n \t}\n@@ -711,19 +711,19 @@ static void mlx5_devlink_pcie_cong_init_values(struct devlink *devlink)\n \n \tvalue.vu16 = MLX5_PCIE_CONG_THRESH_DEF_LOW;\n \tid = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_LOW;\n-\tdevl_param_driverinit_value_set(devlink, id, value);\n+\tdevl_param_driverinit_value_set(devlink, id, &value);\n \n \tvalue.vu16 = MLX5_PCIE_CONG_THRESH_DEF_HIGH;\n \tid = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_HIGH;\n-\tdevl_param_driverinit_value_set(devlink, id, value);\n+\tdevl_param_driverinit_value_set(devlink, id, &value);\n \n \tvalue.vu16 = MLX5_PCIE_CONG_THRESH_DEF_LOW;\n \tid = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_LOW;\n-\tdevl_param_driverinit_value_set(devlink, id, value);\n+\tdevl_param_driverinit_value_set(devlink, id, &value);\n \n \tvalue.vu16 = MLX5_PCIE_CONG_THRESH_DEF_HIGH;\n \tid = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_HIGH;\n-\tdevl_param_driverinit_value_set(devlink, id, value);\n+\tdevl_param_driverinit_value_set(devlink, id, &value);\n }\n \n static const struct devlink_param mlx5_devlink_pcie_cong_params[] = {\n@@ -775,11 +775,11 @@ static void mlx5_devlink_pcie_cong_params_unregister(struct devlink *devlink)\n }\n \n static int mlx5_devlink_enable_rdma_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct mlx5_core_dev *dev = devlink_priv(devlink);\n-\tbool new_state = val.vbool;\n+\tbool new_state = val->vbool;\n \n \tif (new_state && !mlx5_rdma_supported(dev))\n \t\treturn -EOPNOTSUPP;\n@@ -808,7 +808,7 @@ static int mlx5_devlink_rdma_params_register(struct devlink *devlink)\n \tvalue.vbool = !mlx5_dev_is_lightweight(dev);\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \treturn 0;\n }\n \n@@ -843,7 +843,7 @@ static int mlx5_devlink_vnet_params_register(struct devlink *devlink)\n \tvalue.vbool = !mlx5_dev_is_lightweight(dev);\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_ENABLE_VNET,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \treturn 0;\n }\n \n@@ -890,22 +890,22 @@ static void mlx5_devlink_auxdev_params_unregister(struct devlink *devlink)\n }\n \n static int mlx5_devlink_max_uc_list_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct mlx5_core_dev *dev = devlink_priv(devlink);\n \n-\tif (val.vu32 == 0) {\n+\tif (val->vu32 == 0) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"max_macs value must be greater than 0\");\n \t\treturn -EINVAL;\n \t}\n \n-\tif (!is_power_of_2(val.vu32)) {\n+\tif (!is_power_of_2(val->vu32)) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"Only power of 2 values are supported for max_macs\");\n \t\treturn -EINVAL;\n \t}\n \n-\tif (ilog2(val.vu32) >\n+\tif (ilog2(val->vu32) >\n \t MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list)) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"max_macs value is out of the supported range\");\n \t\treturn -EINVAL;\n@@ -936,7 +936,7 @@ static int mlx5_devlink_max_uc_list_params_register(struct devlink *devlink)\n \tvalue.vu32 = 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list);\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_MAX_MACS,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \treturn 0;\n }\n \ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c\nindex dea5647de548..c46c3a462a40 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c\n@@ -2728,7 +2728,7 @@ static int esw_port_metadata_get(struct devlink *devlink, u32 id,\n }\n \n static int esw_port_metadata_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct mlx5_core_dev *dev = devlink_priv(devlink);\ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c\nindex 61a6ba1e49dd..c8f6adae6f51 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c\n@@ -3765,11 +3765,11 @@ static int init_egress_root_ns(struct mlx5_flow_steering *steering)\n }\n \n static int mlx5_fs_mode_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct mlx5_core_dev *dev = devlink_priv(devlink);\n-\tchar *value = val.vstr;\n+\tchar *value = val->vstr;\n \tu8 eswitch_mode;\n \n \teswitch_mode = mlx5_eswitch_mode(dev);\ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c\nindex 19bb620b7436..4a7275e8b62e 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c\n@@ -270,13 +270,13 @@ mlx5_nv_param_devlink_cqe_compress_get(struct devlink *devlink, u32 id,\n \n static int\n mlx5_nv_param_devlink_cqe_compress_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tint i;\n \n \tfor (i = 0; i < ARRAY_SIZE(cqe_compress_str); i++) {\n-\t\tif (!strcmp(val.vstr, cqe_compress_str[i]))\n+\t\tif (!strcmp(val->vstr, cqe_compress_str[i]))\n \t\t\treturn 0;\n \t}\n \n@@ -374,7 +374,7 @@ mlx5_devlink_swp_l4_csum_mode_get(struct devlink *devlink, u32 id,\n \n static int\n mlx5_devlink_swp_l4_csum_mode_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t union devlink_param_value val,\n+\t\t\t\t union devlink_param_value *val,\n \t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct mlx5_core_dev *dev = devlink_priv(devlink);\n@@ -383,7 +383,7 @@ mlx5_devlink_swp_l4_csum_mode_validate(struct devlink *devlink, u32 id,\n \tint err, i;\n \n \tfor (i = 0; i < ARRAY_SIZE(swp_l4_csum_mode_str); i++) {\n-\t\tif (!strcmp(val.vstr, swp_l4_csum_mode_str[i]))\n+\t\tif (!strcmp(val->vstr, swp_l4_csum_mode_str[i]))\n \t\t\tbreak;\n \t}\n \n@@ -727,7 +727,7 @@ static int mlx5_devlink_total_vfs_set(struct devlink *devlink, u32 id,\n }\n \n static int mlx5_devlink_total_vfs_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t struct netlink_ext_ack *extack)\n {\n \tstruct mlx5_core_dev *dev = devlink_priv(devlink);\n@@ -746,7 +746,7 @@ static int mlx5_devlink_total_vfs_validate(struct devlink *devlink, u32 id,\n \t\treturn 0; /* optimistic, but set might fail later */\n \n \tmax = MLX5_GET(nv_global_pci_cap, data, max_vfs_per_pf);\n-\tif (val.vu16 > max) {\n+\tif (val->vu16 > max) {\n \t\tNL_SET_ERR_MSG_FMT_MOD(extack,\n \t\t\t\t \"Max allowed by device is %u\", max);\n \t\treturn -EINVAL;\ndiff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c\nindex d76246301f67..308d8a94865f 100644\n--- a/drivers/net/ethernet/mellanox/mlxsw/core.c\n+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c\n@@ -1306,11 +1306,11 @@ static int mlxsw_core_fw_flash_update(struct mlxsw_core *mlxsw_core,\n }\n \n static int mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink *devlink, u32 id,\n-\t\t\t\t\t\t\t union devlink_param_value val,\n+\t\t\t\t\t\t\t union devlink_param_value *val,\n \t\t\t\t\t\t\t struct netlink_ext_ack *extack)\n {\n-\tif (val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER &&\n-\t val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) {\n+\tif (val->vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER &&\n+\t val->vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"'fw_load_policy' must be 'driver' or 'flash'\");\n \t\treturn -EINVAL;\n \t}\n@@ -1337,7 +1337,7 @@ static int mlxsw_core_fw_params_register(struct mlxsw_core *mlxsw_core)\n \tvalue.vu8 = DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \treturn 0;\n }\n \ndiff --git a/drivers/net/ethernet/netronome/nfp/devlink_param.c b/drivers/net/ethernet/netronome/nfp/devlink_param.c\nindex 85e3b19e6165..826527992e4a 100644\n--- a/drivers/net/ethernet/netronome/nfp/devlink_param.c\n+++ b/drivers/net/ethernet/netronome/nfp/devlink_param.c\n@@ -170,7 +170,7 @@ nfp_devlink_param_u8_set(struct devlink *devlink, u32 id,\n \n static int\n nfp_devlink_param_u8_validate(struct devlink *devlink, u32 id,\n-\t\t\t union devlink_param_value val,\n+\t\t\t union devlink_param_value *val,\n \t\t\t struct netlink_ext_ack *extack)\n {\n \tconst struct nfp_devlink_param_u8_arg *arg;\n@@ -180,12 +180,12 @@ nfp_devlink_param_u8_validate(struct devlink *devlink, u32 id,\n \n \targ = &nfp_devlink_u8_args[id];\n \n-\tif (val.vu8 > arg->max_dl_val) {\n+\tif (val->vu8 > arg->max_dl_val) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"parameter out of range\");\n \t\treturn -EINVAL;\n \t}\n \n-\tif (val.vu8 == arg->invalid_dl_val) {\n+\tif (val->vu8 == arg->invalid_dl_val) {\n \t\tNL_SET_ERR_MSG_MOD(extack, \"unknown/invalid value specified\");\n \t\treturn -EINVAL;\n \t}\ndiff --git a/drivers/net/netdevsim/dev.c b/drivers/net/netdevsim/dev.c\nindex f00fc2f9ebde..aed9ad5f1b43 100644\n--- a/drivers/net/netdevsim/dev.c\n+++ b/drivers/net/netdevsim/dev.c\n@@ -597,11 +597,11 @@ static void nsim_devlink_set_params_init_values(struct nsim_dev *nsim_dev,\n \tvalue.vu32 = nsim_dev->max_macs;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tDEVLINK_PARAM_GENERIC_ID_MAX_MACS,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n \tvalue.vbool = nsim_dev->test1;\n \tdevl_param_driverinit_value_set(devlink,\n \t\t\t\t\tNSIM_DEVLINK_PARAM_ID_TEST1,\n-\t\t\t\t\tvalue);\n+\t\t\t\t\t&value);\n }\n \n static void nsim_devlink_param_load_driverinit_values(struct devlink *devlink)\ndiff --git a/include/net/devlink.h b/include/net/devlink.h\nindex bcd31de1f890..5f4083dc4345 100644\n--- a/include/net/devlink.h\n+++ b/include/net/devlink.h\n@@ -501,7 +501,7 @@ struct devlink_param {\n \t\t struct devlink_param_gset_ctx *ctx,\n \t\t struct netlink_ext_ack *extack);\n \tint (*validate)(struct devlink *devlink, u32 id,\n-\t\t\tunion devlink_param_value val,\n+\t\t\tunion devlink_param_value *val,\n \t\t\tstruct netlink_ext_ack *extack);\n \tint (*get_default)(struct devlink *devlink, u32 id,\n \t\t\t struct devlink_param_gset_ctx *ctx,\n@@ -1923,7 +1923,7 @@ void devlink_params_unregister(struct devlink *devlink,\n int devl_param_driverinit_value_get(struct devlink *devlink, u32 param_id,\n \t\t\t\t union devlink_param_value *val);\n void devl_param_driverinit_value_set(struct devlink *devlink, u32 param_id,\n-\t\t\t\t union devlink_param_value init_val);\n+\t\t\t\t union devlink_param_value *init_val);\n void devl_param_value_changed(struct devlink *devlink, u32 param_id);\n struct devlink_region *devl_region_create(struct devlink *devlink,\n \t\t\t\t\t const struct devlink_region_ops *ops,\ndiff --git a/net/devlink/param.c b/net/devlink/param.c\nindex cf95268da5b0..1a196d3a843d 100644\n--- a/net/devlink/param.c\n+++ b/net/devlink/param.c\n@@ -216,28 +216,28 @@ static int devlink_param_reset_default(struct devlink *devlink,\n \n static int\n devlink_nl_param_value_put(struct sk_buff *msg, enum devlink_param_type type,\n-\t\t\t int nla_type, union devlink_param_value val,\n+\t\t\t int nla_type, union devlink_param_value *val,\n \t\t\t bool flag_as_u8)\n {\n \tswitch (type) {\n \tcase DEVLINK_PARAM_TYPE_U8:\n-\t\tif (nla_put_u8(msg, nla_type, val.vu8))\n+\t\tif (nla_put_u8(msg, nla_type, val->vu8))\n \t\t\treturn -EMSGSIZE;\n \t\tbreak;\n \tcase DEVLINK_PARAM_TYPE_U16:\n-\t\tif (nla_put_u16(msg, nla_type, val.vu16))\n+\t\tif (nla_put_u16(msg, nla_type, val->vu16))\n \t\t\treturn -EMSGSIZE;\n \t\tbreak;\n \tcase DEVLINK_PARAM_TYPE_U32:\n-\t\tif (nla_put_u32(msg, nla_type, val.vu32))\n+\t\tif (nla_put_u32(msg, nla_type, val->vu32))\n \t\t\treturn -EMSGSIZE;\n \t\tbreak;\n \tcase DEVLINK_PARAM_TYPE_U64:\n-\t\tif (devlink_nl_put_u64(msg, nla_type, val.vu64))\n+\t\tif (devlink_nl_put_u64(msg, nla_type, val->vu64))\n \t\t\treturn -EMSGSIZE;\n \t\tbreak;\n \tcase DEVLINK_PARAM_TYPE_STRING:\n-\t\tif (nla_put_string(msg, nla_type, val.vstr))\n+\t\tif (nla_put_string(msg, nla_type, val->vstr))\n \t\t\treturn -EMSGSIZE;\n \t\tbreak;\n \tcase DEVLINK_PARAM_TYPE_BOOL:\n@@ -245,10 +245,10 @@ devlink_nl_param_value_put(struct sk_buff *msg, enum devlink_param_type type,\n \t\t * false can be distinguished from not present\n \t\t */\n \t\tif (flag_as_u8) {\n-\t\t\tif (nla_put_u8(msg, nla_type, val.vbool))\n+\t\t\tif (nla_put_u8(msg, nla_type, val->vbool))\n \t\t\t\treturn -EMSGSIZE;\n \t\t} else {\n-\t\t\tif (val.vbool && nla_put_flag(msg, nla_type))\n+\t\t\tif (val->vbool && nla_put_flag(msg, nla_type))\n \t\t\t\treturn -EMSGSIZE;\n \t\t}\n \t\tbreak;\n@@ -260,8 +260,8 @@ static int\n devlink_nl_param_value_fill_one(struct sk_buff *msg,\n \t\t\t\tenum devlink_param_type type,\n \t\t\t\tenum devlink_param_cmode cmode,\n-\t\t\t\tunion devlink_param_value val,\n-\t\t\t\tunion devlink_param_value default_val,\n+\t\t\t\tunion devlink_param_value *val,\n+\t\t\t\tunion devlink_param_value *default_val,\n \t\t\t\tbool has_default)\n {\n \tstruct nlattr *param_value_attr;\n@@ -383,8 +383,8 @@ static int devlink_nl_param_fill(struct sk_buff *msg, struct devlink *devlink,\n \t\tif (!param_value_set[i])\n \t\t\tcontinue;\n \t\terr = devlink_nl_param_value_fill_one(msg, param->type,\n-\t\t\t\t\t\t i, param_value[i],\n-\t\t\t\t\t\t default_value[i],\n+\t\t\t\t\t\t i, ¶m_value[i],\n+\t\t\t\t\t\t &default_value[i],\n \t\t\t\t\t\t default_value_set[i]);\n \t\tif (err)\n \t\t\tgoto values_list_nest_cancel;\n@@ -621,7 +621,7 @@ static int __devlink_nl_cmd_param_set_doit(struct devlink *devlink,\n \t\tif (err)\n \t\t\treturn err;\n \t\tif (param->validate) {\n-\t\t\terr = param->validate(devlink, param->id, value,\n+\t\t\terr = param->validate(devlink, param->id, &value,\n \t\t\t\t\t info->extack);\n \t\t\tif (err)\n \t\t\t\treturn err;\n@@ -888,7 +888,7 @@ EXPORT_SYMBOL_GPL(devl_param_driverinit_value_get);\n *\tconfiguration mode default value.\n */\n void devl_param_driverinit_value_set(struct devlink *devlink, u32 param_id,\n-\t\t\t\t union devlink_param_value init_val)\n+\t\t\t\t union devlink_param_value *init_val)\n {\n \tstruct devlink_param_item *param_item;\n \n@@ -902,9 +902,9 @@ void devl_param_driverinit_value_set(struct devlink *devlink, u32 param_id,\n \t\t\t\t\t\t DEVLINK_PARAM_CMODE_DRIVERINIT)))\n \t\treturn;\n \n-\tparam_item->driverinit_value = init_val;\n+\tparam_item->driverinit_value = *init_val;\n \tparam_item->driverinit_value_valid = true;\n-\tparam_item->driverinit_default = init_val;\n+\tparam_item->driverinit_default = *init_val;\n \n \tdevlink_param_notify(devlink, 0, param_item, DEVLINK_CMD_PARAM_NEW);\n }\n", "prefixes": [ "v12", "net-next", "3/9" ] }