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GET /api/1.2/patches/2235214/?format=api
{ "id": 2235214, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2235214/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508034912.4082520-9-rkannoth@marvell.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/1.2/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260508034912.4082520-9-rkannoth@marvell.com>", "list_archive_url": null, "date": "2026-05-08T03:49:11", "name": "[v12,net-next,8/9] octeontx2: cn20k: Respect NPC MCAM X2/X4 profile in flows and DFT alloc", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "1a774ae8e251e4e5114049020c018ecf6ee0dc30", "submitter": { "id": 86908, "url": "http://patchwork.ozlabs.org/api/1.2/people/86908/?format=api", "name": "Ratheesh Kannoth", "email": "rkannoth@marvell.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508034912.4082520-9-rkannoth@marvell.com/mbox/", "series": [ { "id": 503453, "url": "http://patchwork.ozlabs.org/api/1.2/series/503453/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=503453", "date": "2026-05-08T03:49:12", "name": "octeontx2-af: npc: Enhancements.", "version": 12, "mbox": "http://patchwork.ozlabs.org/series/503453/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2235214/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2235214/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=kHpj4iwD;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.137; 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client-ip=67.231.148.174;\n helo=mx0a-0016f401.pphosted.com;\n envelope-from=prvs=65883a0750=rkannoth@marvell.com; receiver=<UNKNOWN>", "From": "Ratheesh Kannoth <rkannoth@marvell.com>", "To": "<intel-wired-lan@lists.osuosl.org>, <linux-kernel@vger.kernel.org>,\n <linux-rdma@vger.kernel.org>, <netdev@vger.kernel.org>,\n <oss-drivers@corigine.com>", "CC": "<akiyano@amazon.com>, <andrew+netdev@lunn.ch>,\n <anthony.l.nguyen@intel.com>, <arkadiusz.kubalewski@intel.com>,\n <brett.creeley@amd.com>, <darinzon@amazon.com>, <davem@davemloft.net>,\n <donald.hunter@gmail.com>, <edumazet@google.com>, <horms@kernel.org>,\n <idosch@nvidia.com>, <ivecera@redhat.com>, <jiri@resnulli.us>,\n <kuba@kernel.org>, <leon@kernel.org>, <mbloch@nvidia.com>,\n <michael.chan@broadcom.com>, <pabeni@redhat.com>,\n <pavan.chebbi@broadcom.com>, <petrm@nvidia.com>,\n <Prathosh.Satish@microchip.com>, <przemyslaw.kitszel@intel.com>,\n <saeedm@nvidia.com>, <sgoutham@marvell.com>, <tariqt@nvidia.com>,\n <vadim.fedorenko@linux.dev>, Ratheesh Kannoth <rkannoth@marvell.com>", "Date": "Fri, 8 May 2026 09:19:11 +0530", "Message-ID": "<20260508034912.4082520-9-rkannoth@marvell.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260508034912.4082520-1-rkannoth@marvell.com>", "References": "<20260508034912.4082520-1-rkannoth@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "FTNooMr8ErdFQGPZZS9IDnCp-Ir7iW4f", "X-Proofpoint-GUID": "FTNooMr8ErdFQGPZZS9IDnCp-Ir7iW4f", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNTA4MDAzNCBTYWx0ZWRfXw6yoZbvbhxMT\n jBcv3aeT+Cx1LUxbSooqwLZuy364ZV4HSt5BSLDXtBc3OkjEjUVFQxcFC8bV26tbx+qiRv+6FzN\n ezAORFmEK+v5EEDHnvoSQeqikJLOHXLscXAIjvncZe0Z7sPo2mcQLW3Wt9YaR3dNiWM/U1D9F7b\n IIKle81xsnDsxIwgWehz5xpigt+VegDdPYymOqu1VOZhpAZqegBpvoQyK8zWBDJ5RrJHVKMoqe1\n VijfeIYcT7OESRynDe/6L5+H8wezKq503ejZ85DSw78W3rde7xS4hzNm8HbzHPHlChM71mG36NI\n g/KcUHLued2nfgrIf/4m9FMr2waZmqXtc3mBxY3MStO1fSAMYBe7b7xqmx+1J2tPukcjREJ/TfV\n aksTkKFfPrliXIbSDQnzV3SUjOiBRe4LHC7MivBicyfrB/m0uOJNWFnK8YMV+pG+lFLKZ9isOgF\n DjKhAB5kAxQoDf38ZAg==", "X-Authority-Analysis": "v=2.4 cv=WZ48rUhX c=1 sm=1 tr=0 ts=69fd5da4 cx=c_pps\n a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17\n a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22\n a=TtqV-g6YmW1Jfm2GSLaY:22 a=M5GUcnROAAAA:8 a=3zpKOMqohp-RhpYd6ikA:9\n a=OBjm3rFKGHvpk9ecZwUJ:22", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-05-07_02,2026-05-06_01,2025-10-01_01", "X-Mailman-Approved-At": "Fri, 08 May 2026 22:09:04 +0000", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=marvell.com; h=\n cc:content-transfer-encoding:content-type:date:from:in-reply-to\n :message-id:mime-version:references:subject:to; s=pfpt0220; bh=V\n 903CU/pY9yv4iRB1if3alixQru5XV3AKpyDVYJnJao=; b=fbTdhW1nXzwO9qwaL\n U6iPj+T0sg49cdHp2kuvqcYXKHOaYpFSfoapljRextNuO8keMCA5uVIvYFjXqO0Z\n chaBrv+c5bv4AuR9KpFmhJYPpuil8u6k5TSIzh0ED4kTuPf/CC6qYm6Y4gExY/ar\n vQUOD2Q9cobMRv0KOblr8bBtEUziwVHx7xGjoVprXl/TVtjw+KfqriX4FnxlrIxV\n b9h/znZt8td6nj8dWgWHUhLk63i+VRWYUpgDAElhT3zfo+UrjA0oImCDr4EOmhRi\n VlhT2SWeeLsYwYdWbJ22tgydHcuIueDGvEt2AymC8Hkt02lUd693y7ZJ30u3JqtF\n AWPVA==", "X-Mailman-Original-Authentication-Results": [ "smtp4.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=marvell.com", "smtp4.osuosl.org;\n dkim=pass (2048-bit key,\n unprotected) header.d=marvell.com header.i=@marvell.com header.a=rsa-sha256\n header.s=pfpt0220 header.b=fbTdhW1n" ], "Subject": "[Intel-wired-lan] [PATCH v12 net-next 8/9] octeontx2: cn20k:\n Respect NPC MCAM X2/X4 profile in flows and DFT alloc", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Default CN20K NPC rule allocation now keys off the active MCAM keyword\nwidth: use X4 with a bank-masked reference index when the silicon uses\nX4 keys, and X2 with the raw index otherwise (replacing the previous\nalways-X2 / eidx + 1 behaviour).\n\nIn the AF flow-install path, flows that need more than 256 key bits\nquery the NPC profile; if the platform is fixed to X2 entries, fail\nwith -EOPNOTSUPP instead of requesting X4. Otherwise select X4 for the\nMCAM alloc.\n\nOn the PF, cache and pass the profile kw_type from npc_get_pfl_info\nthrough otx2_mcam_pfl_info_get(), and use it when allocating MCAM\nentries for RSS/defaults and when installing ethtool flows on CN20K,\nincluding masking the reference index for X4 slot layout.\n\nSigned-off-by: Ratheesh Kannoth <rkannoth@marvell.com>\n---\n .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 11 ++++-\n .../marvell/octeontx2/af/rvu_npc_fs.c | 12 ++++-\n .../marvell/octeontx2/nic/otx2_flows.c | 48 +++++++++++++------\n 3 files changed, 53 insertions(+), 18 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c\nindex 67dfbe5ca903..15b3f29d60ee 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c\n@@ -4467,11 +4467,18 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc)\n \t * as NPC_DFT_RULE_PRIO - 1 (higher hw priority)\n \t */\n \treq.contig = false;\n-\treq.kw_type = NPC_MCAM_KEY_X2;\n \treq.count = cnt;\n \treq.hdr.pcifunc = pcifunc;\n \treq.ref_prio = NPC_MCAM_LOWER_PRIO;\n-\treq.ref_entry = eidx + 1;\n+\n+\tif (npc_priv.kw == NPC_MCAM_KEY_X4) {\n+\t\treq.kw_type = NPC_MCAM_KEY_X4;\n+\t\treq.ref_entry = eidx & (npc_priv.bank_depth - 1);\n+\t} else {\n+\t\treq.kw_type = NPC_MCAM_KEY_X2;\n+\t\treq.ref_entry = eidx;\n+\t}\n+\n \tret = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, &req, &rsp);\n \tif (ret) {\n \t\tdev_err(rvu->dev,\ndiff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c\nindex 6ae9cdcb608b..d20eb0e47d7d 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c\n@@ -1671,9 +1671,11 @@ rvu_npc_alloc_entry_for_flow_install(struct rvu *rvu,\n {\n \tstruct npc_mcam_alloc_entry_req entry_req;\n \tstruct npc_mcam_alloc_entry_rsp entry_rsp;\n+\tstruct npc_get_pfl_info_rsp rsp = { 0 };\n \tstruct npc_get_num_kws_req kws_req;\n \tstruct npc_get_num_kws_rsp kws_rsp;\n \tint off, kw_bits, rc;\n+\tstruct msg_req req;\n \tu8 *src, *dst;\n \n \tif (!is_cn20k(rvu->pdev)) {\n@@ -1697,8 +1699,16 @@ rvu_npc_alloc_entry_for_flow_install(struct rvu *rvu,\n \tkw_bits = kws_rsp.kws * 64;\n \n \t*kw_type = NPC_MCAM_KEY_X2;\n-\tif (kw_bits > 256)\n+\tif (kw_bits > 256) {\n+\t\trvu_mbox_handler_npc_get_pfl_info(rvu, &req, &rsp);\n+\t\tif (rsp.kw_type == NPC_MCAM_KEY_X2) {\n+\t\t\tdev_err(rvu->dev,\n+\t\t\t\t\"Only X2 entries are supported in X2 profile\\n\");\n+\t\t\treturn -EOPNOTSUPP;\n+\t\t}\n+\n \t\t*kw_type = NPC_MCAM_KEY_X4;\n+\t}\n \n \tmemset(&entry_req, 0, sizeof(entry_req));\n \tmemset(&entry_rsp, 0, sizeof(entry_rsp));\ndiff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c\nindex 38cc539d724d..5dd0591fed99 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c\n@@ -37,14 +37,13 @@ static void otx2_clear_ntuple_flow_info(struct otx2_nic *pfvf, struct otx2_flow_\n \tflow_cfg->max_flows = 0;\n }\n \n-static int otx2_mcam_pfl_info_get(struct otx2_nic *pfvf, bool *is_x2,\n-\t\t\t\t u16 *x4_slots)\n+static int otx2_mcam_pfl_info_get(struct otx2_nic *pfvf, u16 *x4_slots, u8 *kw_type)\n {\n \tstruct npc_get_pfl_info_rsp *rsp;\n \tstruct msg_req *req;\n \tstatic struct {\n \t\tbool is_set;\n-\t\tbool is_x2;\n+\t\tu8 kw_type;\n \t\tu16 x4_slots;\n \t} pfl_info;\n \n@@ -53,8 +52,8 @@ static int otx2_mcam_pfl_info_get(struct otx2_nic *pfvf, bool *is_x2,\n \t */\n \tmutex_lock(&pfvf->mbox.lock);\n \tif (pfl_info.is_set) {\n-\t\t*is_x2 = pfl_info.is_x2;\n \t\t*x4_slots = pfl_info.x4_slots;\n+\t\t*kw_type = pfl_info.kw_type;\n \t\tmutex_unlock(&pfvf->mbox.lock);\n \t\treturn 0;\n \t}\n@@ -79,16 +78,16 @@ static int otx2_mcam_pfl_info_get(struct otx2_nic *pfvf, bool *is_x2,\n \t\treturn -EFAULT;\n \t}\n \n-\t*is_x2 = (rsp->kw_type == NPC_MCAM_KEY_X2);\n-\tif (*is_x2)\n-\t\t*x4_slots = 0;\n+\tpfl_info.kw_type = rsp->kw_type;\n+\tif (rsp->kw_type == NPC_MCAM_KEY_X2)\n+\t\tpfl_info.x4_slots = 0;\n \telse\n-\t\t*x4_slots = rsp->x4_slots;\n-\n-\tpfl_info.is_x2 = *is_x2;\n-\tpfl_info.x4_slots = *x4_slots;\n+\t\tpfl_info.x4_slots = rsp->x4_slots;\n \tpfl_info.is_set = true;\n \n+\t*x4_slots = pfl_info.x4_slots;\n+\t*kw_type = pfl_info.kw_type;\n+\n \tmutex_unlock(&pfvf->mbox.lock);\n \treturn 0;\n }\n@@ -164,6 +163,7 @@ int otx2_alloc_mcam_entries(struct otx2_nic *pfvf, u16 count)\n \tu16 dft_idx = 0, x4_slots = 0;\n \tint ent, allocated = 0, ref;\n \tbool is_x2 = false;\n+\tu8 kw_type = 0;\n \tint rc;\n \n \t/* Free current ones and allocate new ones with requested count */\n@@ -182,12 +182,14 @@ int otx2_alloc_mcam_entries(struct otx2_nic *pfvf, u16 count)\n \t}\n \n \tif (is_cn20k(pfvf->pdev)) {\n-\t\trc = otx2_mcam_pfl_info_get(pfvf, &is_x2, &x4_slots);\n+\t\trc = otx2_mcam_pfl_info_get(pfvf, &x4_slots, &kw_type);\n \t\tif (rc) {\n \t\t\tnetdev_err(pfvf->netdev, \"Error to retrieve profile info\\n\");\n \t\t\treturn rc;\n \t\t}\n \n+\t\tis_x2 = kw_type == NPC_MCAM_KEY_X2;\n+\n \t\trc = otx2_get_dft_rl_idx(pfvf, &dft_idx);\n \t\tif (rc) {\n \t\t\tnetdev_err(pfvf->netdev,\n@@ -289,6 +291,8 @@ int otx2_mcam_entry_init(struct otx2_nic *pfvf)\n \tstruct npc_mcam_alloc_entry_rsp *rsp;\n \tint vf_vlan_max_flows, count;\n \tint rc, ref, prio, ent;\n+\tu8 kw_type = 0;\n+\tu16 x4_slots;\n \tu16 dft_idx;\n \n \tref = 0;\n@@ -315,6 +319,16 @@ int otx2_mcam_entry_init(struct otx2_nic *pfvf)\n \tif (!flow_cfg->def_ent)\n \t\treturn -ENOMEM;\n \n+\tkw_type = NPC_MCAM_KEY_X2;\n+\tif (is_cn20k(pfvf->pdev)) {\n+\t\trc = otx2_mcam_pfl_info_get(pfvf, &x4_slots, &kw_type);\n+\t\tif (rc) {\n+\t\t\tnetdev_err(pfvf->netdev,\n+\t\t\t\t \"Error to get pfl info\\n\");\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n \tmutex_lock(&pfvf->mbox.lock);\n \n \treq = otx2_mbox_alloc_msg_npc_mcam_alloc_entry(&pfvf->mbox);\n@@ -324,6 +338,10 @@ int otx2_mcam_entry_init(struct otx2_nic *pfvf)\n \t}\n \n \treq->kw_type = NPC_MCAM_KEY_X2;\n+\tif (is_cn20k(pfvf->pdev) && kw_type == NPC_MCAM_KEY_X4) {\n+\t\treq->kw_type = NPC_MCAM_KEY_X4;\n+\t\tref &= (x4_slots - 1);\n+\t}\n \treq->contig = false;\n \treq->count = count;\n \treq->ref_prio = prio;\n@@ -1174,15 +1192,14 @@ static int otx2_add_flow_msg(struct otx2_nic *pfvf, struct otx2_flow *flow)\n #ifdef CONFIG_DCB\n \tint vlan_prio, qidx, pfc_rule = 0;\n #endif\n+\tbool modify = false, is_x2;\n \tint err, vf = 0, off, sz;\n-\tbool modify = false;\n \tu8 kw_type = 0;\n \tu8 *src, *dst;\n \tu16 x4_slots;\n-\tbool is_x2;\n \n \tif (is_cn20k(pfvf->pdev)) {\n-\t\terr = otx2_mcam_pfl_info_get(pfvf, &is_x2, &x4_slots);\n+\t\terr = otx2_mcam_pfl_info_get(pfvf, &x4_slots, &kw_type);\n \t\tif (err) {\n \t\t\tnetdev_err(pfvf->netdev,\n \t\t\t\t \"Error to retrieve NPC profile info, pcifunc=%#x\\n\",\n@@ -1190,6 +1207,7 @@ static int otx2_add_flow_msg(struct otx2_nic *pfvf, struct otx2_flow *flow)\n \t\t\treturn -EFAULT;\n \t\t}\n \n+\t\tis_x2 = kw_type == NPC_MCAM_KEY_X2;\n \t\tif (!is_x2) {\n \t\t\terr = otx2_prepare_flow_request(&flow->flow_spec,\n \t\t\t\t\t\t\t&treq);\n", "prefixes": [ "v12", "net-next", "8/9" ] }