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GET /api/1.2/patches/2235213/?format=api
{ "id": 2235213, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2235213/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508034912.4082520-2-rkannoth@marvell.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/1.2/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260508034912.4082520-2-rkannoth@marvell.com>", "list_archive_url": null, "date": "2026-05-08T03:49:04", "name": "[v12,net-next,1/9] octeontx2-af: npc: cn20k: debugfs enhancements", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2bbab4d355cf06d8807ff2306d1b52e9217cd6fe", "submitter": { "id": 86908, "url": "http://patchwork.ozlabs.org/api/1.2/people/86908/?format=api", "name": "Ratheesh Kannoth", "email": "rkannoth@marvell.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508034912.4082520-2-rkannoth@marvell.com/mbox/", "series": [ { "id": 503453, "url": "http://patchwork.ozlabs.org/api/1.2/series/503453/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=503453", "date": "2026-05-08T03:49:12", "name": "octeontx2-af: npc: Enhancements.", "version": 12, "mbox": "http://patchwork.ozlabs.org/series/503453/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2235213/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2235213/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=2aC3wl5s;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.138; helo=smtp1.osuosl.org;\n envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from smtp1.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gC3Dl74jKz1yCg\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 09 May 2026 08:09:11 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby smtp1.osuosl.org (Postfix) with ESMTP id C560584A9F;\n\tFri, 8 May 2026 22:09:09 +0000 (UTC)", "from smtp1.osuosl.org ([127.0.0.1])\n by localhost (smtp1.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id etaItI4exXGT; Fri, 8 May 2026 22:09:08 +0000 (UTC)", "from lists1.osuosl.org (lists1.osuosl.org [140.211.166.142])\n\tby smtp1.osuosl.org (Postfix) with ESMTP id 63F7484A9E;\n\tFri, 8 May 2026 22:09:08 +0000 (UTC)", "from smtp3.osuosl.org (smtp3.osuosl.org [IPv6:2605:bc80:3010::136])\n by lists1.osuosl.org (Postfix) with ESMTP id E3096272\n for <intel-wired-lan@lists.osuosl.org>; Fri, 8 May 2026 04:04:51 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n by smtp3.osuosl.org (Postfix) with ESMTP id E12FA61286\n for <intel-wired-lan@lists.osuosl.org>; Fri, 8 May 2026 04:04:51 +0000 (UTC)", "from smtp3.osuosl.org ([127.0.0.1])\n by localhost (smtp3.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id Jyts17PBDnQ0 for <intel-wired-lan@lists.osuosl.org>;\n Fri, 8 May 2026 04:04:51 +0000 (UTC)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by smtp3.osuosl.org (Postfix) with ESMTPS id CF5D46121C\n for <intel-wired-lan@lists.osuosl.org>; Fri, 8 May 2026 04:04:50 +0000 (UTC)", "from pps.filterd (m0431383.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 647NVKJX2841681; Thu, 7 May 2026 20:49:41 -0700", "from dc6wp-exch02.marvell.com ([4.21.29.225])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 4e14g0gjd9-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Thu, 07 May 2026 20:49:40 -0700 (PDT)", "from DC6WP-EXCH02.marvell.com (10.76.176.209) by\n DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1544.25; Thu, 7 May 2026 20:49:40 -0700", "from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com\n (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.25 via Frontend\n Transport; Thu, 7 May 2026 20:49:40 -0700", "from rkannoth-OptiPlex-7090.. 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client-ip=67.231.156.173;\n helo=mx0b-0016f401.pphosted.com;\n envelope-from=prvs=65883a0750=rkannoth@marvell.com; receiver=<UNKNOWN>", "DMARC-Filter": "OpenDMARC Filter v1.4.2 smtp3.osuosl.org CF5D46121C", "From": "Ratheesh Kannoth <rkannoth@marvell.com>", "To": "<intel-wired-lan@lists.osuosl.org>, <linux-kernel@vger.kernel.org>,\n <linux-rdma@vger.kernel.org>, <netdev@vger.kernel.org>,\n <oss-drivers@corigine.com>", "CC": "<akiyano@amazon.com>, <andrew+netdev@lunn.ch>,\n <anthony.l.nguyen@intel.com>, <arkadiusz.kubalewski@intel.com>,\n <brett.creeley@amd.com>, <darinzon@amazon.com>, <davem@davemloft.net>,\n <donald.hunter@gmail.com>, <edumazet@google.com>, <horms@kernel.org>,\n <idosch@nvidia.com>, <ivecera@redhat.com>, <jiri@resnulli.us>,\n <kuba@kernel.org>, <leon@kernel.org>, <mbloch@nvidia.com>,\n <michael.chan@broadcom.com>, <pabeni@redhat.com>,\n <pavan.chebbi@broadcom.com>, <petrm@nvidia.com>,\n <Prathosh.Satish@microchip.com>, <przemyslaw.kitszel@intel.com>,\n <saeedm@nvidia.com>, <sgoutham@marvell.com>, <tariqt@nvidia.com>,\n <vadim.fedorenko@linux.dev>, Ratheesh Kannoth <rkannoth@marvell.com>", "Date": "Fri, 8 May 2026 09:19:04 +0530", "Message-ID": "<20260508034912.4082520-2-rkannoth@marvell.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260508034912.4082520-1-rkannoth@marvell.com>", "References": "<20260508034912.4082520-1-rkannoth@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "_eoGeqS0d4l6TwKeN7i2iiQxY7-wfsY5", "X-Authority-Analysis": "v=2.4 cv=bMUm5v+Z c=1 sm=1 tr=0 ts=69fd5d55 cx=c_pps\n a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17\n a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22\n a=qit2iCtTFQkLgVSMPQTB:22 a=M5GUcnROAAAA:8 a=Ci00bJMBAOu-zhm_1uQA:9\n a=OBjm3rFKGHvpk9ecZwUJ:22", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNTA4MDAzMyBTYWx0ZWRfX4I/ATAgyQFpp\n w5ylPHsXo3S0u5oH0s7rsnrPTQTJ4y7M51GsDZWiBcJkIqgjS+c76KEa2mwBd9GNuPv0V7ToH+3\n tdeGQRsc3L38AxDfPKAIxgkLk8TYscIGehbdy0LWbBbVN2VA7Ml+IiL7YEV6Zp3nbqWFYBjl5sj\n XOOP90gbz3AOZx7TGG/WjtcWrGBu56ySeOHPoM5LCXG1vR6raxVDeXmM799rKsjkr9HMgL+vbhX\n avrtS9CNI3ykDaUhpkec8t0WnC2pl5y7VUHotctghm5cxsxGPwuNjpht2XKc4yiyNsMiJdjp1Hp\n ZXB5undlDe5VBk+Md0Pw/OLQla3DM9qm+HH9Sp26p4jzvF7itauQZMrwqDjXKWfdXlQPsDhfUGy\n LcresW3CiC1Mn+fcSk4v0AV3qMh2XUTurAVJKMOlq3fTcyJXBoSdw7W6dSBruxzmB2jVd8PdWcf\n TbQxldHt+FKY56h0CwA==", "X-Proofpoint-GUID": "_eoGeqS0d4l6TwKeN7i2iiQxY7-wfsY5", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-05-07_02,2026-05-06_01,2025-10-01_01", "X-Mailman-Approved-At": "Fri, 08 May 2026 22:09:04 +0000", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=marvell.com; h=\n cc:content-transfer-encoding:content-type:date:from:in-reply-to\n :message-id:mime-version:references:subject:to; s=pfpt0220; bh=r\n UaGwj/5EfqjboI6zl6shS2RseKdRrZ9a6Rr/qljoKQ=; b=hyLhHuzUvhqsrNYbz\n 49yfZhWeiKGxdr6v4Mt8FA+bl84ohlY5yY/Qimt/+Jyp3SDC1AKqWzUlTpENLYOp\n unUARSbKMi5ogAjZtgoUauZuz9ieZ5LrmgZEuX0WvEXIBX71T5D+TK6VMeJn/kde\n Uwrv2wC7B9Ee+99EjHlvFiVnxOfy+IHv9M8+CTUSaVmj2LJEvORYdV/AYkwN5A7c\n stUlE9vERPPhPtGy0kCjJ/AXeiNLzL7vX7IzemXLpQANhO4ey4cST+oAIsFLjKbs\n xFR9iki2o8iw1rh6h5Joqi8R8dZvYwEb6dGBy1WbfZPrx0ZgVJGt6diFanI+t+H3\n C2BJQ==", "X-Mailman-Original-Authentication-Results": [ "smtp3.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=marvell.com", "smtp3.osuosl.org;\n dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com\n header.a=rsa-sha256 header.s=pfpt0220 header.b=hyLhHuzU" ], "Subject": "[Intel-wired-lan] [PATCH v12 net-next 1/9] octeontx2-af: npc:\n cn20k: debugfs enhancements", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Improve MCAM visibility and field debugging for CN20K NPC.\n\n- Extend \"mcam_layout\" to show enabled (+) or disabled state per entry\n so status can be verified without parsing the full \"mcam_entry\" dump.\n- Add \"dstats\" debugfs entry: reports recently hit MCAM indices with\n packet counts; stats are cleared on read so each read shows deltas.\n- Add \"mismatch\" debugfs entry: lists MCAM entries that are enabled\n but not explicitly allocated, helping diagnose allocation/field issues.\n\nSigned-off-by: Ratheesh Kannoth <rkannoth@marvell.com>\n---\n .../marvell/octeontx2/af/cn20k/debugfs.c | 157 +++++++++++++++++-\n .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 16 +-\n .../ethernet/marvell/octeontx2/af/cn20k/npc.h | 7 +\n 3 files changed, 169 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c\nindex 6f13296303cb..9a4c2ea5b19e 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c\n@@ -13,6 +13,7 @@\n #include \"struct.h\"\n #include \"rvu.h\"\n #include \"debugfs.h\"\n+#include \"cn20k/reg.h\"\n #include \"cn20k/npc.h\"\n \n static int npc_mcam_layout_show(struct seq_file *s, void *unused)\n@@ -58,7 +59,8 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)\n \t\t\t\t\t\t \"v:%u\", vidx0);\n \t\t\t\t}\n \n-\t\t\t\tseq_printf(s, \"\\t%u(%#x) %s\\n\", idx0, pf1,\n+\t\t\t\tseq_printf(s, \"\\t%u(%#x)%c %s\\n\", idx0, pf1,\n+\t\t\t\t\t test_bit(idx0, npc_priv->en_map) ? '+' : ' ',\n \t\t\t\t\t map ? buf0 : \" \");\n \t\t\t}\n \t\t\tgoto next;\n@@ -101,9 +103,13 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)\n \t\t\t\t\t\t vidx1);\n \t\t\t\t}\n \n-\t\t\t\tseq_printf(s, \"%05u(%#x) %s\\t\\t%05u(%#x) %s\\n\",\n-\t\t\t\t\t idx1, pf2, v1 ? buf1 : \" \",\n-\t\t\t\t\t idx0, pf1, v0 ? buf0 : \" \");\n+\t\t\t\tseq_printf(s, \"%05u(%#x)%c %s\\t\\t%05u(%#x)%c %s\\n\",\n+\t\t\t\t\t idx1, pf2,\n+\t\t\t\t\t test_bit(idx1, npc_priv->en_map) ? '+' : ' ',\n+\t\t\t\t\t v1 ? buf1 : \" \",\n+\t\t\t\t\t idx0, pf1,\n+\t\t\t\t\t test_bit(idx0, npc_priv->en_map) ? '+' : ' ',\n+\t\t\t\t\t v0 ? buf0 : \" \");\n \n \t\t\t\tcontinue;\n \t\t\t}\n@@ -120,8 +126,9 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)\n \t\t\t\t\t\t vidx0);\n \t\t\t\t}\n \n-\t\t\t\tseq_printf(s, \"\\t\\t \\t\\t%05u(%#x) %s\\n\", idx0,\n-\t\t\t\t\t pf1, map ? buf0 : \" \");\n+\t\t\t\tseq_printf(s, \"\\t\\t \\t\\t%05u(%#x)%c %s\\n\", idx0, pf1,\n+\t\t\t\t\t test_bit(idx0, npc_priv->en_map) ? '+' : ' ',\n+\t\t\t\t\t map ? buf0 : \" \");\n \t\t\t\tcontinue;\n \t\t\t}\n \n@@ -134,7 +141,8 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)\n \t\t\t\tsnprintf(buf1, sizeof(buf1), \"v:%05u\", vidx1);\n \t\t\t}\n \n-\t\t\tseq_printf(s, \"%05u(%#x) %s\\n\", idx1, pf1,\n+\t\t\tseq_printf(s, \"%05u(%#x)%c %s\\n\", idx1, pf1,\n+\t\t\t\t test_bit(idx1, npc_priv->en_map) ? '+' : ' ',\n \t\t\t\t map ? buf1 : \" \");\n \t\t}\n next:\n@@ -145,6 +153,135 @@ static int npc_mcam_layout_show(struct seq_file *s, void *unused)\n \n DEFINE_SHOW_ATTRIBUTE(npc_mcam_layout);\n \n+#define __OCTEONTX2_DEBUGFS_ATTRIBUTE_FOPS(__name)\t\t\t\\\n+static const struct file_operations __name ## _fops = {\t\t\t\\\n+\t.owner = THIS_MODULE,\t\t\t\t\t\t\\\n+\t.open = __name ## _open,\t\t\t\t\t\\\n+\t.read = seq_read,\t\t\t\t\t\t\\\n+\t.llseek = seq_lseek,\t\t\t\t\t\t\\\n+\t.release = single_release,\t\t\t\t\t\\\n+}\n+\n+#define DEFINE_OCTEONTX2_DEBUGFS_ATTRIBUTE_WITH_SIZE(__name, __size)\t\t\\\n+static int __name ## _open(struct inode *inode, struct file *file)\t\t\\\n+{\t\t\t\t\t\t\t\t\t\t\\\n+\treturn single_open_size(file, __name ## _show, inode->i_private,\t\\\n+\t\t\t\t__size);\t\t\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\t\\\n+__OCTEONTX2_DEBUGFS_ATTRIBUTE_FOPS(__name)\n+\n+static DEFINE_MUTEX(stats_lock);\n+\n+static u64 dstats[MAX_NUM_BANKS][MAX_SUBBANK_DEPTH * MAX_NUM_SUB_BANKS] = {};\n+static int npc_mcam_dstats_show(struct seq_file *s, void *unused)\n+{\n+\tstruct npc_priv_t *npc_priv;\n+\tint blkaddr, pf, mcam_idx;\n+\tu64 stats, delta;\n+\tstruct rvu *rvu;\n+\tchar buff[64];\n+\tu8 key_type;\n+\tvoid *map;\n+\n+\tnpc_priv = npc_priv_get();\n+\trvu = s->private;\n+\tblkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);\n+\tif (blkaddr < 0)\n+\t\treturn 0;\n+\n+\tmutex_lock(&stats_lock);\n+\tseq_puts(s, \"idx\\tpfunc\\tstats\\n\");\n+\tfor (int bank = npc_priv->num_banks - 1; bank >= 0; bank--) {\n+\t\tfor (int idx = npc_priv->bank_depth - 1; idx >= 0; idx--) {\n+\t\t\tmcam_idx = bank * npc_priv->bank_depth + idx;\n+\n+\t\t\tnpc_mcam_idx_2_key_type(rvu, mcam_idx, &key_type);\n+\t\t\tif (key_type == NPC_MCAM_KEY_X4 && bank != 0)\n+\t\t\t\tcontinue;\n+\n+\t\t\tif (!test_bit(mcam_idx, npc_priv->en_map))\n+\t\t\t\tcontinue;\n+\n+\t\t\tstats = rvu_read64(rvu, blkaddr,\n+\t\t\t\t\t NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(idx, bank));\n+\t\t\tif (!stats)\n+\t\t\t\tcontinue;\n+\t\t\tif (stats == dstats[bank][idx])\n+\t\t\t\tcontinue;\n+\n+\t\t\tif (stats < dstats[bank][idx])\n+\t\t\t\tdstats[bank][idx] = 0;\n+\n+\t\t\tpf = 0xFFFF;\n+\t\t\tmap = xa_load(&npc_priv->xa_idx2pf_map, mcam_idx);\n+\t\t\tif (map)\n+\t\t\t\tpf = xa_to_value(map);\n+\n+\t\t\tif (stats > dstats[bank][idx])\n+\t\t\t\tdelta = stats - dstats[bank][idx];\n+\t\t\telse\n+\t\t\t\tdelta = stats;\n+\n+\t\t\tsnprintf(buff, sizeof(buff), \"%u\\t%#04x\\t%llu\\n\",\n+\t\t\t\t mcam_idx, pf, delta);\n+\t\t\tseq_puts(s, buff);\n+\n+\t\t\tdstats[bank][idx] = stats;\n+\t\t}\n+\t}\n+\n+\tmutex_unlock(&stats_lock);\n+\treturn 0;\n+}\n+\n+/* \"%u\\t%#04x\\t%llu\\n\" needs less than 64 characters to print */\n+#define TOTAL_SZ (MAX_NUM_BANKS * MAX_NUM_SUB_BANKS * MAX_SUBBANK_DEPTH * 64)\n+DEFINE_OCTEONTX2_DEBUGFS_ATTRIBUTE_WITH_SIZE(npc_mcam_dstats, TOTAL_SZ);\n+\n+static int npc_mcam_mismatch_show(struct seq_file *s, void *unused)\n+{\n+\tstruct npc_priv_t *npc_priv;\n+\tstruct npc_subbank *sb;\n+\tint mcam_idx, sb_off;\n+\tstruct rvu *rvu;\n+\tchar buff[64];\n+\tvoid *map;\n+\tint rc;\n+\n+\tnpc_priv = npc_priv_get();\n+\trvu = s->private;\n+\n+\tseq_puts(s, \"index\\tsb idx\\tkw type\\n\");\n+\tmutex_lock(&stats_lock);\n+\tfor (int bank = npc_priv->num_banks - 1; bank >= 0; bank--) {\n+\t\tfor (int idx = npc_priv->bank_depth - 1; idx >= 0; idx--) {\n+\t\t\tmcam_idx = bank * npc_priv->bank_depth + idx;\n+\n+\t\t\tif (!test_bit(mcam_idx, npc_priv->en_map))\n+\t\t\t\tcontinue;\n+\n+\t\t\tmap = xa_load(&npc_priv->xa_idx2pf_map, mcam_idx);\n+\t\t\tif (map)\n+\t\t\t\tcontinue;\n+\n+\t\t\trc = npc_mcam_idx_2_subbank_idx(rvu, mcam_idx,\n+\t\t\t\t\t\t\t&sb, &sb_off);\n+\t\t\tif (rc)\n+\t\t\t\tcontinue;\n+\n+\t\t\tsnprintf(buff, sizeof(buff), \"%u\\t%d\\t%u\\n\",\n+\t\t\t\t mcam_idx, sb->idx, sb->key_type);\n+\n+\t\t\tseq_puts(s, buff);\n+\t\t}\n+\t}\n+\tmutex_unlock(&stats_lock);\n+\treturn 0;\n+}\n+\n+/* \"%u\\t%d\\t%u\\n\" needs less than 64 characters to print. */\n+DEFINE_OCTEONTX2_DEBUGFS_ATTRIBUTE_WITH_SIZE(npc_mcam_mismatch, TOTAL_SZ);\n+\n static int npc_mcam_default_show(struct seq_file *s, void *unused)\n {\n \tstruct npc_priv_t *npc_priv;\n@@ -259,6 +396,12 @@ int npc_cn20k_debugfs_init(struct rvu *rvu)\n \tdebugfs_create_file(\"vidx2idx\", 0444, rvu->rvu_dbg.npc,\n \t\t\t npc_priv, &npc_vidx2idx_map_fops);\n \n+\tdebugfs_create_file(\"dstats\", 0444, rvu->rvu_dbg.npc, rvu,\n+\t\t\t &npc_mcam_dstats_fops);\n+\n+\tdebugfs_create_file(\"mismatch\", 0444, rvu->rvu_dbg.npc, rvu,\n+\t\t\t &npc_mcam_mismatch_fops);\n+\n \tdebugfs_create_file(\"idx2vidx\", 0444, rvu->rvu_dbg.npc,\n \t\t\t npc_priv, &npc_idx2vidx_map_fops);\n \ndiff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c\nindex 6b3f453fd500..e9aad0ad3fa6 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c\n@@ -824,7 +824,7 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,\n \t\trvu_write64(rvu, blkaddr,\n \t\t\t NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, bank),\n \t\t\t cfg);\n-\t\treturn 0;\n+\t\tgoto update_en_map;\n \t}\n \n \t/* For NPC_CN20K_MCAM_KEY_X4 keys, both the banks\n@@ -842,6 +842,12 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,\n \t\t\t cfg);\n \t}\n \n+update_en_map:\n+\tif (enable)\n+\t\tset_bit(index, npc_priv.en_map);\n+\telse\n+\t\tclear_bit(index, npc_priv.en_map);\n+\n \treturn 0;\n }\n \n@@ -1789,9 +1795,9 @@ static int npc_subbank_idx_2_mcam_idx(struct rvu *rvu, struct npc_subbank *sb,\n \treturn 0;\n }\n \n-static int npc_mcam_idx_2_subbank_idx(struct rvu *rvu, u16 mcam_idx,\n-\t\t\t\t struct npc_subbank **sb,\n-\t\t\t\t int *sb_off)\n+int npc_mcam_idx_2_subbank_idx(struct rvu *rvu, u16 mcam_idx,\n+\t\t\t struct npc_subbank **sb,\n+\t\t\t int *sb_off)\n {\n \tint bank_off, sb_id;\n \n@@ -4605,6 +4611,8 @@ void npc_cn20k_deinit(struct rvu *rvu)\n \t */\n \tkfree(npc_priv.sb);\n \tkfree(subbank_srch_order);\n+\tbitmap_clear(npc_priv.en_map, 0, MAX_NUM_BANKS * MAX_NUM_SUB_BANKS *\n+\t\t MAX_SUBBANK_DEPTH);\n }\n \n static int npc_setup_mcam_section(struct rvu *rvu, int key_type)\ndiff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h\nindex 3d5eb952cc07..9567a2d80b58 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h\n@@ -170,6 +170,7 @@ struct npc_defrag_show_node {\n * @num_banks:\t\tNumber of banks.\n * @num_subbanks:\tNumber of subbanks.\n * @subbank_depth:\tDepth of subbank.\n+ * @en_map:\t\tEnable/disable status.\n * @kw:\t\t\tKex configured key type.\n * @sb:\t\t\tSubbank array.\n * @xa_sb_used:\t\tArray of used subbanks.\n@@ -193,6 +194,9 @@ struct npc_priv_t {\n \tconst int num_banks;\n \tint num_subbanks;\n \tint subbank_depth;\n+\tDECLARE_BITMAP(en_map, MAX_NUM_BANKS *\n+\t\t MAX_NUM_SUB_BANKS *\n+\t\t MAX_SUBBANK_DEPTH);\n \tu8 kw;\n \tstruct npc_subbank *sb;\n \tstruct xarray xa_sb_used;\n@@ -336,5 +340,8 @@ u16 npc_cn20k_vidx2idx(u16 index);\n u16 npc_cn20k_idx2vidx(u16 idx);\n int npc_cn20k_defrag(struct rvu *rvu);\n bool npc_is_cgx_or_lbk(struct rvu *rvu, u16 pcifunc);\n+int npc_mcam_idx_2_subbank_idx(struct rvu *rvu, u16 mcam_idx,\n+\t\t\t struct npc_subbank **sb,\n+\t\t\t int *sb_off);\n \n #endif /* NPC_CN20K_H */\n", "prefixes": [ "v12", "net-next", "1/9" ] }