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GET /api/1.2/patches/2235212/?format=api
{ "id": 2235212, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2235212/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508034912.4082520-10-rkannoth@marvell.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/1.2/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260508034912.4082520-10-rkannoth@marvell.com>", "list_archive_url": null, "date": "2026-05-08T03:49:12", "name": "[v12,net-next,9/9] octeontx2-af: npc: cn20k: Allocate npc_priv and dstats dynamically.", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "483127eda2749c3de8a877ae5226370306cd2b8c", "submitter": { "id": 86908, "url": "http://patchwork.ozlabs.org/api/1.2/people/86908/?format=api", "name": "Ratheesh Kannoth", "email": "rkannoth@marvell.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508034912.4082520-10-rkannoth@marvell.com/mbox/", "series": [ { "id": 503453, "url": "http://patchwork.ozlabs.org/api/1.2/series/503453/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=503453", "date": "2026-05-08T03:49:12", "name": "octeontx2-af: npc: Enhancements.", "version": 12, "mbox": "http://patchwork.ozlabs.org/series/503453/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2235212/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2235212/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=M4QofJvd;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::137; 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client-ip=67.231.156.173;\n helo=mx0b-0016f401.pphosted.com;\n envelope-from=prvs=65883a0750=rkannoth@marvell.com; receiver=<UNKNOWN>", "From": "Ratheesh Kannoth <rkannoth@marvell.com>", "To": "<intel-wired-lan@lists.osuosl.org>, <linux-kernel@vger.kernel.org>,\n <linux-rdma@vger.kernel.org>, <netdev@vger.kernel.org>,\n <oss-drivers@corigine.com>", "CC": "<akiyano@amazon.com>, <andrew+netdev@lunn.ch>,\n <anthony.l.nguyen@intel.com>, <arkadiusz.kubalewski@intel.com>,\n <brett.creeley@amd.com>, <darinzon@amazon.com>, <davem@davemloft.net>,\n <donald.hunter@gmail.com>, <edumazet@google.com>, <horms@kernel.org>,\n <idosch@nvidia.com>, <ivecera@redhat.com>, <jiri@resnulli.us>,\n <kuba@kernel.org>, <leon@kernel.org>, <mbloch@nvidia.com>,\n <michael.chan@broadcom.com>, <pabeni@redhat.com>,\n <pavan.chebbi@broadcom.com>, <petrm@nvidia.com>,\n <Prathosh.Satish@microchip.com>, <przemyslaw.kitszel@intel.com>,\n <saeedm@nvidia.com>, <sgoutham@marvell.com>, <tariqt@nvidia.com>,\n <vadim.fedorenko@linux.dev>, Ratheesh Kannoth <rkannoth@marvell.com>", "Date": "Fri, 8 May 2026 09:19:12 +0530", "Message-ID": "<20260508034912.4082520-10-rkannoth@marvell.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260508034912.4082520-1-rkannoth@marvell.com>", "References": "<20260508034912.4082520-1-rkannoth@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "rI-KDjl03ndfDIa2Wb2UVS7WbCinYztz", "X-Authority-Analysis": "v=2.4 cv=bMUm5v+Z c=1 sm=1 tr=0 ts=69fd5daf cx=c_pps\n a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17\n a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22\n a=qit2iCtTFQkLgVSMPQTB:22 a=M5GUcnROAAAA:8 a=PMOnpqzA8kekim0Jo-0A:9\n a=jzFzRQuv5CvcdMS1:21 a=OBjm3rFKGHvpk9ecZwUJ:22", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNTA4MDAzNCBTYWx0ZWRfX5oQEfFJy/PZX\n KRP37rwt6spY9veYXExQM4yctNf6qGT9CYL2DgEdz7jk23s/7v8q2X2C4vW6Rj+2NN8/nP2vFSR\n 8Wmix8IBfynPCbCEzVJMSprJrL3ELIXxbxD1Wli70/U07DJ65EEHdcm4LPY2dP/EnCygbAbeWQw\n /ris17BGkKXDFXXQN045sPo+VTU2En2vpdJzAzSPhroSiVyJFefGxR+56iQymlHdMk2ZDlPe0m3\n naXHyeBL/7LylHsBfOPePZpGK6EiRDXyHw2U1Sc4TIt7SoHblWH83l+TIO+EcBvuI2J617BZoJj\n qZQt4xYSYaVojzZ8lfxVwz8x+sq38vT8gkF/LIqelvtomoWN9IKl36MHWAmGNFRdyJFaGGctHz9\n LK/gmbfEkGAc3dVlkVOOEMmf28bkqPVf9OEjno1+kxqaxK/wPGWm01MHRfFaB42OVDIJzxFc/YQ\n dTNIeVYlgTm9Z9CcgSA==", "X-Proofpoint-GUID": "rI-KDjl03ndfDIa2Wb2UVS7WbCinYztz", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-05-07_02,2026-05-06_01,2025-10-01_01", "X-Mailman-Approved-At": "Fri, 08 May 2026 22:09:04 +0000", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=marvell.com; h=\n cc:content-transfer-encoding:content-type:date:from:in-reply-to\n :message-id:mime-version:references:subject:to; s=pfpt0220; bh=u\n Ds6YvbJynsatiyDJ9hMwEeXPDI4Kw6VjHooDUs+hxM=; b=impxk+CmMoj4ZEmRM\n JWEzx2gfk5FrCNx3iv1klqzUnSv4sTo9/JOc0YyDM2jBQ3PZKsTVuQntZsbzC2Q2\n stluJh8TMrSEnFDcJy9aYWL7W8Hhas7Msic1iBdGxwVyBY96kbOrj2l+IHK79l7i\n D7JY+NQlcC7CU6XuoABDVxEmlk0tFJgB5RGd11AnCf+g1bWltnG7NiPWuMltmhBI\n Q+1NSgeqPwWZoocBOmUD1CieOTsY26FfnmqOdDrsz/Z8ItpLb+AzsK6e/dylIkUb\n uBXCWll2NKgiSvVE+Kwgx+NiXAdVxkHqLOvWg6ycMLSlxusIqUsvZ8vUHqgkRtMb\n /67xA==", "X-Mailman-Original-Authentication-Results": [ "smtp3.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=marvell.com", "smtp3.osuosl.org;\n dkim=pass (2048-bit key,\n unprotected) header.d=marvell.com header.i=@marvell.com header.a=rsa-sha256\n header.s=pfpt0220 header.b=impxk+Cm" ], "Subject": "[Intel-wired-lan] [PATCH v12 net-next 9/9] octeontx2-af: npc:\n cn20k: Allocate npc_priv and dstats dynamically.", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Replace the file-scope static npc_priv with a kcalloc'd struct filled\nfrom hardware bank/subbank geometry at init (num_banks is no longer a\nconst compile-time constant; drop init_done and use a non-NULL\nnpc_priv pointer for liveness). Thread npc_priv_get() / pointer access\nthrough the CN20K NPC code paths, extend teardown to kfree the root\nstruct on failure and in npc_cn20k_deinit, and adjust MCAM section\nsetup to use the discovered subbank count.\n\nAllocate MCAM debugfs dstats via devm_kzalloc instead of a static matrix,\nand use the allocated backing store consistently when computing deltas\n(including the counter rollover compare).\n\nSigned-off-by: Ratheesh Kannoth <rkannoth@marvell.com>\n---\n .../marvell/octeontx2/af/cn20k/debugfs.c | 18 +-\n .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 407 +++++++++---------\n .../ethernet/marvell/octeontx2/af/cn20k/npc.h | 3 +-\n 3 files changed, 220 insertions(+), 208 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c\nindex 9a4c2ea5b19e..15af7b0ccea6 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c\n@@ -172,7 +172,7 @@ __OCTEONTX2_DEBUGFS_ATTRIBUTE_FOPS(__name)\n \n static DEFINE_MUTEX(stats_lock);\n \n-static u64 dstats[MAX_NUM_BANKS][MAX_SUBBANK_DEPTH * MAX_NUM_SUB_BANKS] = {};\n+static u64 (*dstats)[MAX_NUM_BANKS][MAX_SUBBANK_DEPTH * MAX_NUM_SUB_BANKS];\n static int npc_mcam_dstats_show(struct seq_file *s, void *unused)\n {\n \tstruct npc_priv_t *npc_priv;\n@@ -206,19 +206,19 @@ static int npc_mcam_dstats_show(struct seq_file *s, void *unused)\n \t\t\t\t\t NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(idx, bank));\n \t\t\tif (!stats)\n \t\t\t\tcontinue;\n-\t\t\tif (stats == dstats[bank][idx])\n+\t\t\tif (stats == dstats[0][bank][idx])\n \t\t\t\tcontinue;\n \n-\t\t\tif (stats < dstats[bank][idx])\n-\t\t\t\tdstats[bank][idx] = 0;\n+\t\t\tif (stats < dstats[0][bank][idx])\n+\t\t\t\tdstats[0][bank][idx] = 0;\n \n \t\t\tpf = 0xFFFF;\n \t\t\tmap = xa_load(&npc_priv->xa_idx2pf_map, mcam_idx);\n \t\t\tif (map)\n \t\t\t\tpf = xa_to_value(map);\n \n-\t\t\tif (stats > dstats[bank][idx])\n-\t\t\t\tdelta = stats - dstats[bank][idx];\n+\t\t\tif (stats > dstats[0][bank][idx])\n+\t\t\t\tdelta = stats - dstats[0][bank][idx];\n \t\t\telse\n \t\t\t\tdelta = stats;\n \n@@ -226,7 +226,7 @@ static int npc_mcam_dstats_show(struct seq_file *s, void *unused)\n \t\t\t\t mcam_idx, pf, delta);\n \t\t\tseq_puts(s, buff);\n \n-\t\t\tdstats[bank][idx] = stats;\n+\t\t\tdstats[0][bank][idx] = stats;\n \t\t}\n \t}\n \n@@ -396,6 +396,10 @@ int npc_cn20k_debugfs_init(struct rvu *rvu)\n \tdebugfs_create_file(\"vidx2idx\", 0444, rvu->rvu_dbg.npc,\n \t\t\t npc_priv, &npc_vidx2idx_map_fops);\n \n+\tdstats = devm_kzalloc(rvu->dev, sizeof(*dstats), GFP_KERNEL);\n+\tif (!dstats)\n+\t\treturn -ENOMEM;\n+\n \tdebugfs_create_file(\"dstats\", 0444, rvu->rvu_dbg.npc, rvu,\n \t\t\t &npc_mcam_dstats_fops);\n \ndiff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c\nindex 15b3f29d60ee..ea8fc43df090 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c\n@@ -16,9 +16,7 @@\n #include \"cn20k/reg.h\"\n #include \"rvu_npc_fs.h\"\n \n-static struct npc_priv_t npc_priv = {\n-\t.num_banks = MAX_NUM_BANKS,\n-};\n+static struct npc_priv_t *npc_priv;\n \n static const char *npc_kw_name[NPC_MCAM_KEY_MAX] = {\n \t[NPC_MCAM_KEY_DYN] = \"DYNAMIC\",\n@@ -226,7 +224,7 @@ static u16 npc_idx2vidx(u16 idx)\n \tvidx = idx;\n \tindex = idx;\n \n-\tmap = xa_load(&npc_priv.xa_idx2vidx_map, index);\n+\tmap = xa_load(&npc_priv->xa_idx2vidx_map, index);\n \tif (!map)\n \t\tgoto done;\n \n@@ -242,7 +240,7 @@ static u16 npc_idx2vidx(u16 idx)\n \n static bool npc_is_vidx(u16 vidx)\n {\n-\treturn vidx >= npc_priv.bank_depth * 2;\n+\treturn vidx >= npc_priv->bank_depth * 2;\n }\n \n static u16 npc_vidx2idx(u16 vidx)\n@@ -256,7 +254,7 @@ static u16 npc_vidx2idx(u16 vidx)\n \tidx = vidx;\n \tindex = vidx;\n \n-\tmap = xa_load(&npc_priv.xa_vidx2idx_map, index);\n+\tmap = xa_load(&npc_priv->xa_vidx2idx_map, index);\n \tif (!map)\n \t\tgoto done;\n \n@@ -272,7 +270,7 @@ static u16 npc_vidx2idx(u16 vidx)\n \n u16 npc_cn20k_vidx2idx(u16 idx)\n {\n-\tif (!npc_priv.init_done)\n+\tif (!npc_priv)\n \t\treturn idx;\n \n \tif (!npc_is_vidx(idx))\n@@ -283,7 +281,7 @@ u16 npc_cn20k_vidx2idx(u16 idx)\n \n u16 npc_cn20k_idx2vidx(u16 idx)\n {\n-\tif (!npc_priv.init_done)\n+\tif (!npc_priv)\n \t\treturn idx;\n \n \tif (npc_is_vidx(idx))\n@@ -306,7 +304,7 @@ static int npc_vidx_maps_del_entry(struct rvu *rvu, u16 vidx, u16 *old_midx)\n \n \tmcam_idx = npc_vidx2idx(vidx);\n \n-\tmap = xa_erase(&npc_priv.xa_vidx2idx_map, vidx);\n+\tmap = xa_erase(&npc_priv->xa_vidx2idx_map, vidx);\n \tif (!map) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: vidx(%u) does not map to proper mcam idx\\n\",\n@@ -314,7 +312,7 @@ static int npc_vidx_maps_del_entry(struct rvu *rvu, u16 vidx, u16 *old_midx)\n \t\treturn -ESRCH;\n \t}\n \n-\tmap = xa_erase(&npc_priv.xa_idx2vidx_map, mcam_idx);\n+\tmap = xa_erase(&npc_priv->xa_idx2vidx_map, mcam_idx);\n \tif (!map) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: vidx(%u) is not valid\\n\",\n@@ -341,7 +339,7 @@ static int npc_vidx_maps_modify(struct rvu *rvu, u16 vidx, u16 new_midx)\n \t\treturn -ESRCH;\n \t}\n \n-\tmap = xa_erase(&npc_priv.xa_vidx2idx_map, vidx);\n+\tmap = xa_erase(&npc_priv->xa_vidx2idx_map, vidx);\n \tif (!map) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: vidx(%u) could not be deleted from vidx2idx map\\n\",\n@@ -351,7 +349,7 @@ static int npc_vidx_maps_modify(struct rvu *rvu, u16 vidx, u16 new_midx)\n \n \told_midx = xa_to_value(map);\n \n-\trc = xa_insert(&npc_priv.xa_vidx2idx_map, vidx,\n+\trc = xa_insert(&npc_priv->xa_vidx2idx_map, vidx,\n \t\t xa_mk_value(new_midx), GFP_KERNEL);\n \tif (rc) {\n \t\tdev_err(rvu->dev,\n@@ -360,7 +358,7 @@ static int npc_vidx_maps_modify(struct rvu *rvu, u16 vidx, u16 new_midx)\n \t\tgoto fail1;\n \t}\n \n-\tmap = xa_erase(&npc_priv.xa_idx2vidx_map, old_midx);\n+\tmap = xa_erase(&npc_priv->xa_idx2vidx_map, old_midx);\n \tif (!map) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: old_midx(%u, vidx(%u)) cannot be added to idx2vidx map\\n\",\n@@ -369,7 +367,7 @@ static int npc_vidx_maps_modify(struct rvu *rvu, u16 vidx, u16 new_midx)\n \t\tgoto fail2;\n \t}\n \n-\trc = xa_insert(&npc_priv.xa_idx2vidx_map, new_midx,\n+\trc = xa_insert(&npc_priv->xa_idx2vidx_map, new_midx,\n \t\t xa_mk_value(vidx), GFP_KERNEL);\n \tif (rc) {\n \t\tdev_err(rvu->dev,\n@@ -382,21 +380,21 @@ static int npc_vidx_maps_modify(struct rvu *rvu, u16 vidx, u16 new_midx)\n \n fail3:\n \t/* Restore vidx at old_midx location */\n-\tif (xa_insert(&npc_priv.xa_idx2vidx_map, old_midx,\n+\tif (xa_insert(&npc_priv->xa_idx2vidx_map, old_midx,\n \t\t xa_mk_value(vidx), GFP_KERNEL))\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: Error to roll back idx2vidx old_midx=%u vidx=%u\\n\",\n \t\t\t__func__, old_midx, vidx);\n fail2:\n \t/* Erase new_midx inserted at vidx */\n-\tif (!xa_erase(&npc_priv.xa_vidx2idx_map, vidx))\n+\tif (!xa_erase(&npc_priv->xa_vidx2idx_map, vidx))\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: Failed to roll back vidx2idx vidx=%u\\n\",\n \t\t\t__func__, vidx);\n \n fail1:\n \t/* Restore old_midx at vidx location */\n-\tif (xa_insert(&npc_priv.xa_vidx2idx_map, vidx,\n+\tif (xa_insert(&npc_priv->xa_vidx2idx_map, vidx,\n \t\t xa_mk_value(old_midx), GFP_KERNEL))\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: Failed to roll back vidx2idx to old_midx=%u, vidx=%u\\n\",\n@@ -412,10 +410,10 @@ static int npc_vidx_maps_add_entry(struct rvu *rvu, u16 mcam_idx, int pcifunc,\n \tu32 id;\n \n \t/* Virtual index start from maximum mcam index + 1 */\n-\tmax = npc_priv.bank_depth * 2 * 2 - 1;\n-\tmin = npc_priv.bank_depth * 2;\n+\tmax = npc_priv->bank_depth * 2 * 2 - 1;\n+\tmin = npc_priv->bank_depth * 2;\n \n-\trc = xa_alloc(&npc_priv.xa_vidx2idx_map, &id,\n+\trc = xa_alloc(&npc_priv->xa_vidx2idx_map, &id,\n \t\t xa_mk_value(mcam_idx),\n \t\t XA_LIMIT(min, max), GFP_KERNEL);\n \tif (rc) {\n@@ -425,7 +423,7 @@ static int npc_vidx_maps_add_entry(struct rvu *rvu, u16 mcam_idx, int pcifunc,\n \t\tgoto fail1;\n \t}\n \n-\trc = xa_insert(&npc_priv.xa_idx2vidx_map, mcam_idx,\n+\trc = xa_insert(&npc_priv->xa_idx2vidx_map, mcam_idx,\n \t\t xa_mk_value(id), GFP_KERNEL);\n \tif (rc) {\n \t\tdev_err(rvu->dev,\n@@ -440,7 +438,7 @@ static int npc_vidx_maps_add_entry(struct rvu *rvu, u16 mcam_idx, int pcifunc,\n \treturn 0;\n \n fail2:\n-\txa_erase(&npc_priv.xa_vidx2idx_map, id);\n+\txa_erase(&npc_priv->xa_vidx2idx_map, id);\n fail1:\n \treturn rc;\n }\n@@ -691,7 +689,7 @@ void npc_cn20k_parser_profile_init(struct rvu *rvu, int blkaddr)\n \n struct npc_priv_t *npc_priv_get(void)\n {\n-\treturn &npc_priv;\n+\treturn npc_priv;\n }\n \n static void npc_program_mkex_rx(struct rvu *rvu, int blkaddr,\n@@ -860,9 +858,9 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,\n \n update_en_map:\n \tif (enable)\n-\t\tset_bit(index, npc_priv.en_map);\n+\t\tset_bit(index, npc_priv->en_map);\n \telse\n-\t\tclear_bit(index, npc_priv.en_map);\n+\t\tclear_bit(index, npc_priv->en_map);\n \n \treturn 0;\n }\n@@ -1751,28 +1749,28 @@ int npc_mcam_idx_2_key_type(struct rvu *rvu, u16 mcam_idx, u8 *key_type)\n \tint bank_off, sb_id;\n \n \t/* mcam_idx should be less than (2 * bank depth) */\n-\tif (mcam_idx >= npc_priv.bank_depth * 2) {\n+\tif (mcam_idx >= npc_priv->bank_depth * 2) {\n \t\tdev_err(rvu->dev, \"%s: bad params\\n\",\n \t\t\t__func__);\n \t\treturn -EINVAL;\n \t}\n \n \t/* find mcam offset per bank */\n-\tbank_off = mcam_idx & (npc_priv.bank_depth - 1);\n+\tbank_off = mcam_idx & (npc_priv->bank_depth - 1);\n \n \t/* Find subbank id */\n-\tsb_id = bank_off / npc_priv.subbank_depth;\n+\tsb_id = bank_off / npc_priv->subbank_depth;\n \n \t/* Check if subbank id is more than maximum\n \t * number of subbanks available\n \t */\n-\tif (sb_id >= npc_priv.num_subbanks) {\n+\tif (sb_id >= npc_priv->num_subbanks) {\n \t\tdev_err(rvu->dev, \"%s: invalid subbank %d\\n\",\n \t\t\t__func__, sb_id);\n \t\treturn -EINVAL;\n \t}\n \n-\tsb = &npc_priv.sb[sb_id];\n+\tsb = &npc_priv->sb[sb_id];\n \n \t*key_type = sb->key_type;\n \n@@ -1788,7 +1786,7 @@ static int npc_subbank_idx_2_mcam_idx(struct rvu *rvu, struct npc_subbank *sb,\n \t * subsection depth - 1\n \t */\n \tif (sb->key_type == NPC_MCAM_KEY_X4 &&\n-\t sub_off >= npc_priv.subbank_depth) {\n+\t sub_off >= npc_priv->subbank_depth) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: Failed to get mcam idx (x4) sb->idx=%u sub_off=%u\",\n \t\t\t__func__, sb->idx, sub_off);\n@@ -1799,7 +1797,7 @@ static int npc_subbank_idx_2_mcam_idx(struct rvu *rvu, struct npc_subbank *sb,\n \t * 2 * subsection depth - 1\n \t */\n \tif (sb->key_type == NPC_MCAM_KEY_X2 &&\n-\t sub_off >= npc_priv.subbank_depth * 2) {\n+\t sub_off >= npc_priv->subbank_depth * 2) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: Failed to get mcam idx (x2) sb->idx=%u sub_off=%u\",\n \t\t\t__func__, sb->idx, sub_off);\n@@ -1807,12 +1805,12 @@ static int npc_subbank_idx_2_mcam_idx(struct rvu *rvu, struct npc_subbank *sb,\n \t}\n \n \t/* Find subbank offset from respective subbank (w.r.t bank) */\n-\toff = sub_off & (npc_priv.subbank_depth - 1);\n+\toff = sub_off & (npc_priv->subbank_depth - 1);\n \n \t/* if subsection idx is in bank1, add bank depth,\n \t * which is part of sb->b1b\n \t */\n-\tbot = sub_off >= npc_priv.subbank_depth ? sb->b1b : sb->b0b;\n+\tbot = sub_off >= npc_priv->subbank_depth ? sb->b1b : sb->b0b;\n \n \t*mcam_idx = bot + off;\n \treturn 0;\n@@ -1825,37 +1823,37 @@ int npc_mcam_idx_2_subbank_idx(struct rvu *rvu, u16 mcam_idx,\n \tint bank_off, sb_id;\n \n \t/* mcam_idx should be less than (2 * bank depth) */\n-\tif (mcam_idx >= npc_priv.bank_depth * 2) {\n+\tif (mcam_idx >= npc_priv->bank_depth * 2) {\n \t\tdev_err(rvu->dev, \"%s: Invalid mcam idx %u\\n\",\n \t\t\t__func__, mcam_idx);\n \t\treturn -EINVAL;\n \t}\n \n \t/* find mcam offset per bank */\n-\tbank_off = mcam_idx & (npc_priv.bank_depth - 1);\n+\tbank_off = mcam_idx & (npc_priv->bank_depth - 1);\n \n \t/* Find subbank id */\n-\tsb_id = bank_off / npc_priv.subbank_depth;\n+\tsb_id = bank_off / npc_priv->subbank_depth;\n \n \t/* Check if subbank id is more than maximum\n \t * number of subbanks available\n \t */\n-\tif (sb_id >= npc_priv.num_subbanks) {\n+\tif (sb_id >= npc_priv->num_subbanks) {\n \t\tdev_err(rvu->dev, \"%s: invalid subbank %d\\n\",\n \t\t\t__func__, sb_id);\n \t\treturn -EINVAL;\n \t}\n \n-\t*sb = &npc_priv.sb[sb_id];\n+\t*sb = &npc_priv->sb[sb_id];\n \n \t/* Subbank offset per bank */\n-\t*sb_off = bank_off % npc_priv.subbank_depth;\n+\t*sb_off = bank_off % npc_priv->subbank_depth;\n \n \t/* Index in a subbank should add subbank depth\n \t * if it is in bank1\n \t */\n-\tif (mcam_idx >= npc_priv.bank_depth)\n-\t\t*sb_off += npc_priv.subbank_depth;\n+\tif (mcam_idx >= npc_priv->bank_depth)\n+\t\t*sb_off += npc_priv->subbank_depth;\n \n \treturn 0;\n }\n@@ -1871,9 +1869,9 @@ static int __npc_subbank_contig_alloc(struct rvu *rvu,\n \tint k, offset, delta = 0;\n \tint cnt = 0, sbd;\n \n-\tsbd = npc_priv.subbank_depth;\n+\tsbd = npc_priv->subbank_depth;\n \n-\tif (sidx >= npc_priv.bank_depth)\n+\tif (sidx >= npc_priv->bank_depth)\n \t\tdelta = sbd;\n \n \tswitch (prio) {\n@@ -1940,8 +1938,8 @@ static int __npc_subbank_non_contig_alloc(struct rvu *rvu,\n \tint cnt = 0, delta;\n \tint k, sbd;\n \n-\tsbd = npc_priv.subbank_depth;\n-\tdelta = sidx >= npc_priv.bank_depth ? sbd : 0;\n+\tsbd = npc_priv->subbank_depth;\n+\tdelta = sidx >= npc_priv->bank_depth ? sbd : 0;\n \n \tswitch (prio) {\n \t\t/* Find an area of size 'count' from sidx to eidx */\n@@ -2002,7 +2000,7 @@ static void __npc_subbank_sboff_2_off(struct rvu *rvu, struct npc_subbank *sb,\n {\n \tint sbd;\n \n-\tsbd = npc_priv.subbank_depth;\n+\tsbd = npc_priv->subbank_depth;\n \n \t*off = sb_off & (sbd - 1);\n \t*bmap = (sb_off >= sbd) ? sb->b1map : sb->b0map;\n@@ -2051,20 +2049,20 @@ static int __npc_subbank_mark_free(struct rvu *rvu, struct npc_subbank *sb)\n \tsb->flags = NPC_SUBBANK_FLAG_FREE;\n \tsb->key_type = 0;\n \n-\tbitmap_clear(sb->b0map, 0, npc_priv.subbank_depth);\n-\tbitmap_clear(sb->b1map, 0, npc_priv.subbank_depth);\n+\tbitmap_clear(sb->b0map, 0, npc_priv->subbank_depth);\n+\tbitmap_clear(sb->b1map, 0, npc_priv->subbank_depth);\n \n-\tif (!xa_erase(&npc_priv.xa_sb_used, sb->arr_idx)) {\n+\tif (!xa_erase(&npc_priv->xa_sb_used, sb->arr_idx)) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: Error to delete from xa_sb_used array\\n\",\n \t\t\t__func__);\n \t\treturn -EFAULT;\n \t}\n \n-\trc = xa_insert(&npc_priv.xa_sb_free, sb->arr_idx,\n+\trc = xa_insert(&npc_priv->xa_sb_free, sb->arr_idx,\n \t\t xa_mk_value(sb->idx), GFP_KERNEL);\n \tif (rc) {\n-\t\trc = xa_insert(&npc_priv.xa_sb_used, sb->arr_idx,\n+\t\trc = xa_insert(&npc_priv->xa_sb_used, sb->arr_idx,\n \t\t\t xa_mk_value(sb->idx), GFP_KERNEL);\n \t\tif (rc)\n \t\t\tdev_err(rvu->dev,\n@@ -2093,21 +2091,21 @@ static int __npc_subbank_mark_used(struct rvu *rvu, struct npc_subbank *sb,\n \tsb->flags = NPC_SUBBANK_FLAG_USED;\n \tsb->key_type = key_type;\n \tif (key_type == NPC_MCAM_KEY_X4)\n-\t\tsb->free_cnt = npc_priv.subbank_depth;\n+\t\tsb->free_cnt = npc_priv->subbank_depth;\n \telse\n-\t\tsb->free_cnt = 2 * npc_priv.subbank_depth;\n+\t\tsb->free_cnt = 2 * npc_priv->subbank_depth;\n \n-\tbitmap_clear(sb->b0map, 0, npc_priv.subbank_depth);\n-\tbitmap_clear(sb->b1map, 0, npc_priv.subbank_depth);\n+\tbitmap_clear(sb->b0map, 0, npc_priv->subbank_depth);\n+\tbitmap_clear(sb->b1map, 0, npc_priv->subbank_depth);\n \n-\tif (!xa_erase(&npc_priv.xa_sb_free, sb->arr_idx)) {\n+\tif (!xa_erase(&npc_priv->xa_sb_free, sb->arr_idx)) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: Error to delete from xa_sb_free array\\n\",\n \t\t\t__func__);\n \t\treturn -EFAULT;\n \t}\n \n-\trc = xa_insert(&npc_priv.xa_sb_used, sb->arr_idx,\n+\trc = xa_insert(&npc_priv->xa_sb_used, sb->arr_idx,\n \t\t xa_mk_value(sb->idx), GFP_KERNEL);\n \tif (rc)\n \t\tdev_err(rvu->dev,\n@@ -2131,10 +2129,10 @@ static bool __npc_subbank_free(struct rvu *rvu, struct npc_subbank *sb,\n \n \t/* Check whether we can mark whole subbank as free */\n \tif (sb->key_type == NPC_MCAM_KEY_X4) {\n-\t\tif (sb->free_cnt < npc_priv.subbank_depth)\n+\t\tif (sb->free_cnt < npc_priv->subbank_depth)\n \t\t\tgoto done;\n \t} else {\n-\t\tif (sb->free_cnt < 2 * npc_priv.subbank_depth)\n+\t\tif (sb->free_cnt < 2 * npc_priv->subbank_depth)\n \t\t\tgoto done;\n \t}\n \n@@ -2213,7 +2211,7 @@ static int __npc_subbank_alloc(struct rvu *rvu, struct npc_subbank *sb,\n \n \t/* x4 indexes are from 0 to bank size as it combines two x2 banks */\n \tif (key_type == NPC_MCAM_KEY_X4 &&\n-\t (ref >= npc_priv.bank_depth || limit >= npc_priv.bank_depth)) {\n+\t (ref >= npc_priv->bank_depth || limit >= npc_priv->bank_depth)) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: Wrong ref_enty(%d) or limit(%d) for x4\\n\",\n \t\t\t__func__, ref, limit);\n@@ -2223,8 +2221,8 @@ static int __npc_subbank_alloc(struct rvu *rvu, struct npc_subbank *sb,\n \t/* This function is called either bank0 or bank1 portion of a subbank.\n \t * so ref and limit should be on same bank.\n \t */\n-\tdiffbank = !!((ref & npc_priv.bank_depth) ^\n-\t\t (limit & npc_priv.bank_depth));\n+\tdiffbank = !!((ref & npc_priv->bank_depth) ^\n+\t\t (limit & npc_priv->bank_depth));\n \tif (diffbank) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: request ref and limit should be from same bank\\n\",\n@@ -2248,7 +2246,7 @@ static int __npc_subbank_alloc(struct rvu *rvu, struct npc_subbank *sb,\n \t * or equal to mcam entries available in the subbank if contig.\n \t */\n \tif (sb->flags & NPC_SUBBANK_FLAG_FREE) {\n-\t\tif (contig && count > npc_priv.subbank_depth) {\n+\t\tif (contig && count > npc_priv->subbank_depth) {\n \t\t\tdev_err(rvu->dev, \"%s: Less number of entries\\n\",\n \t\t\t\t__func__);\n \t\t\treturn -ENOSPC;\n@@ -2271,10 +2269,10 @@ static int __npc_subbank_alloc(struct rvu *rvu, struct npc_subbank *sb,\n \t}\n \n process:\n-\t/* if ref or limit >= npc_priv.bank_depth, index are in bank1.\n+\t/* if ref or limit >= npc_priv->bank_depth, index are in bank1.\n \t * else bank0.\n \t */\n-\tif (ref >= npc_priv.bank_depth) {\n+\tif (ref >= npc_priv->bank_depth) {\n \t\tbmap = sb->b1map;\n \t\tt = sb->b1t;\n \t\tb = sb->b1b;\n@@ -2285,8 +2283,8 @@ static int __npc_subbank_alloc(struct rvu *rvu, struct npc_subbank *sb,\n \t}\n \n \t/* Calculate free slots */\n-\tbw = bitmap_weight(bmap, npc_priv.subbank_depth);\n-\tbfree = npc_priv.subbank_depth - bw;\n+\tbw = bitmap_weight(bmap, npc_priv->subbank_depth);\n+\tbfree = npc_priv->subbank_depth - bw;\n \n \tif (!bfree) {\n \t\tdev_dbg(rvu->dev, \"%s: subbank is full\\n\", __func__);\n@@ -2415,7 +2413,7 @@ npc_del_from_pf_maps(struct rvu *rvu, u16 mcam_idx)\n \tint pcifunc, idx;\n \tvoid *map;\n \n-\tmap = xa_erase(&npc_priv.xa_idx2pf_map, mcam_idx);\n+\tmap = xa_erase(&npc_priv->xa_idx2pf_map, mcam_idx);\n \tif (!map) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: failed to erase mcam_idx(%u) from xa_idx2pf map\\n\",\n@@ -2424,7 +2422,7 @@ npc_del_from_pf_maps(struct rvu *rvu, u16 mcam_idx)\n \t}\n \n \tpcifunc = xa_to_value(map);\n-\tmap = xa_load(&npc_priv.xa_pf_map, pcifunc);\n+\tmap = xa_load(&npc_priv->xa_pf_map, pcifunc);\n \tif (!map) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: failed to find entry for (%u) from xa_pf_map, mcam=%u\\n\",\n@@ -2434,7 +2432,7 @@ npc_del_from_pf_maps(struct rvu *rvu, u16 mcam_idx)\n \n \tidx = xa_to_value(map);\n \n-\tmap = xa_erase(&npc_priv.xa_pf2idx_map[idx], mcam_idx);\n+\tmap = xa_erase(&npc_priv->xa_pf2idx_map[idx], mcam_idx);\n \tif (!map) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: failed to erase mcam_idx(%u) from xa_pf2idx_map map\\n\",\n@@ -2454,18 +2452,18 @@ npc_add_to_pf_maps(struct rvu *rvu, u16 mcam_idx, int pcifunc)\n \t\t\"%s: add2maps mcam_idx(%u) to xa_idx2pf map pcifunc=%#x\\n\",\n \t\t__func__, mcam_idx, pcifunc);\n \n-\trc = xa_insert(&npc_priv.xa_idx2pf_map, mcam_idx,\n+\trc = xa_insert(&npc_priv->xa_idx2pf_map, mcam_idx,\n \t\t xa_mk_value(pcifunc), GFP_KERNEL);\n \n \tif (rc) {\n-\t\tmap = xa_load(&npc_priv.xa_idx2pf_map, mcam_idx);\n+\t\tmap = xa_load(&npc_priv->xa_idx2pf_map, mcam_idx);\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: failed to insert mcam_idx(%u) to xa_idx2pf map, existing value=%lu\\n\",\n \t\t\t__func__, mcam_idx, xa_to_value(map));\n \t\treturn -EFAULT;\n \t}\n \n-\tmap = xa_load(&npc_priv.xa_pf_map, pcifunc);\n+\tmap = xa_load(&npc_priv->xa_pf_map, pcifunc);\n \tif (!map) {\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: failed to find pf map entry for pcifunc=%#x, mcam=%u\\n\",\n@@ -2475,12 +2473,12 @@ npc_add_to_pf_maps(struct rvu *rvu, u16 mcam_idx, int pcifunc)\n \n \tidx = xa_to_value(map);\n \n-\trc = xa_insert(&npc_priv.xa_pf2idx_map[idx], mcam_idx,\n+\trc = xa_insert(&npc_priv->xa_pf2idx_map[idx], mcam_idx,\n \t\t xa_mk_value(pcifunc), GFP_KERNEL);\n \n \tif (rc) {\n-\t\tmap = xa_load(&npc_priv.xa_pf2idx_map[idx], mcam_idx);\n-\t\txa_erase(&npc_priv.xa_idx2pf_map, mcam_idx);\n+\t\tmap = xa_load(&npc_priv->xa_pf2idx_map[idx], mcam_idx);\n+\t\txa_erase(&npc_priv->xa_idx2pf_map, mcam_idx);\n \t\tdev_err(rvu->dev,\n \t\t\t\"%s: failed to insert mcam_idx(%u) to xa_pf2idx_map map, earlier value=%lu idx=%u\\n\",\n \t\t\t__func__, mcam_idx, xa_to_value(map), idx);\n@@ -2510,9 +2508,9 @@ npc_subbank_suits(struct npc_subbank *sb, int key_type)\n \treturn false;\n }\n \n-#define SB_ALIGN_UP(val) (((val) + npc_priv.subbank_depth) & \\\n-\t\t\t ~((npc_priv.subbank_depth) - 1))\n-#define SB_ALIGN_DOWN(val) ALIGN_DOWN((val), npc_priv.subbank_depth)\n+#define SB_ALIGN_UP(val) (((val) + npc_priv->subbank_depth) & \\\n+\t\t\t ~((npc_priv->subbank_depth) - 1))\n+#define SB_ALIGN_DOWN(val) ALIGN_DOWN((val), npc_priv->subbank_depth)\n \n static void npc_subbank_iter_down(struct rvu *rvu,\n \t\t\t\t int ref, int limit,\n@@ -2538,7 +2536,7 @@ static void npc_subbank_iter_down(struct rvu *rvu,\n \t}\n \n \t*cur_ref = *cur_limit - 1;\n-\talign = *cur_ref - npc_priv.subbank_depth + 1;\n+\talign = *cur_ref - npc_priv->subbank_depth + 1;\n \tif (align <= limit) {\n \t\t*stop = true;\n \t\t*cur_limit = limit;\n@@ -2578,7 +2576,7 @@ static void npc_subbank_iter_up(struct rvu *rvu,\n \t}\n \n \t*cur_ref = *cur_limit + 1;\n-\talign = *cur_ref + npc_priv.subbank_depth - 1;\n+\talign = *cur_ref + npc_priv->subbank_depth - 1;\n \n \tif (align >= limit) {\n \t\t*stop = true;\n@@ -2606,17 +2604,17 @@ npc_subbank_iter(struct rvu *rvu, int key_type,\n \n \t/* limit and ref should < bank_depth for x4 */\n \tif (key_type == NPC_MCAM_KEY_X4) {\n-\t\tif (*cur_ref >= npc_priv.bank_depth)\n+\t\tif (*cur_ref >= npc_priv->bank_depth)\n \t\t\treturn -EINVAL;\n \n-\t\tif (*cur_limit >= npc_priv.bank_depth)\n+\t\tif (*cur_limit >= npc_priv->bank_depth)\n \t\t\treturn -EINVAL;\n \t}\n \t/* limit and ref should < 2 * bank_depth, for x2 */\n-\tif (*cur_ref >= 2 * npc_priv.bank_depth)\n+\tif (*cur_ref >= 2 * npc_priv->bank_depth)\n \t\treturn -EINVAL;\n \n-\tif (*cur_limit >= 2 * npc_priv.bank_depth)\n+\tif (*cur_limit >= 2 * npc_priv->bank_depth)\n \t\treturn -EINVAL;\n \n \treturn 0;\n@@ -2651,7 +2649,7 @@ static int npc_idx_free(struct rvu *rvu, u16 *mcam_idx, int count,\n \t\t\tvidx = npc_idx2vidx(midx);\n \t\t}\n \n-\t\tif (midx >= npc_priv.bank_depth * npc_priv.num_banks) {\n+\t\tif (midx >= npc_priv->bank_depth * npc_priv->num_banks) {\n \t\t\tdev_err(rvu->dev,\n \t\t\t\t\"%s: Invalid mcam_idx=%u cannot be deleted\\n\",\n \t\t\t\t__func__, mcam_idx[i]);\n@@ -2846,7 +2844,7 @@ static int npc_subbank_free_cnt(struct rvu *rvu, struct npc_subbank *sb,\n {\n \tint cnt, spd;\n \n-\tspd = npc_priv.subbank_depth;\n+\tspd = npc_priv->subbank_depth;\n \tmutex_lock(&sb->lock);\n \n \tif (sb->flags & NPC_SUBBANK_FLAG_FREE)\n@@ -3005,7 +3003,7 @@ static int npc_subbank_noref_alloc(struct rvu *rvu, int key_type, bool contig,\n \tmax_alloc = !contig;\n \n \t/* Check used subbanks for free slots */\n-\txa_for_each(&npc_priv.xa_sb_used, index, val) {\n+\txa_for_each(&npc_priv->xa_sb_used, index, val) {\n \t\tidx = xa_to_value(val);\n \n \t\t/* Minimize allocation from restricted subbanks\n@@ -3014,7 +3012,7 @@ static int npc_subbank_noref_alloc(struct rvu *rvu, int key_type, bool contig,\n \t\tif (npc_subbank_restrict_usage(rvu, idx))\n \t\t\tcontinue;\n \n-\t\tsb = &npc_priv.sb[idx];\n+\t\tsb = &npc_priv->sb[idx];\n \n \t\t/* Skip if not suitable subbank */\n \t\tif (!npc_subbank_suits(sb, key_type))\n@@ -3071,9 +3069,9 @@ static int npc_subbank_noref_alloc(struct rvu *rvu, int key_type, bool contig,\n \t}\n \n \t/* Allocate in free subbanks */\n-\txa_for_each(&npc_priv.xa_sb_free, index, val) {\n+\txa_for_each(&npc_priv->xa_sb_free, index, val) {\n \t\tidx = xa_to_value(val);\n-\t\tsb = &npc_priv.sb[idx];\n+\t\tsb = &npc_priv->sb[idx];\n \n \t\t/* Minimize allocation from restricted subbanks\n \t\t * in noref allocations.\n@@ -3129,7 +3127,7 @@ static int npc_subbank_noref_alloc(struct rvu *rvu, int key_type, bool contig,\n \tfor (i = 0; restrict_valid &&\n \t (i < ARRAY_SIZE(npc_subbank_restricted_idxs)); i++) {\n \t\tidx = npc_subbank_restricted_idxs[i];\n-\t\tsb = &npc_priv.sb[idx];\n+\t\tsb = &npc_priv->sb[idx];\n \n \t\t/* Skip if not suitable subbank */\n \t\tif (!npc_subbank_suits(sb, key_type))\n@@ -3209,7 +3207,7 @@ int npc_cn20k_ref_idx_alloc(struct rvu *rvu, int pcifunc, int key_type,\n \tbool ref_valid;\n \tu16 vidx;\n \n-\tbd = npc_priv.bank_depth;\n+\tbd = npc_priv->bank_depth;\n \n \t/* Special case: ref == 0 && limit= 0 && prio == HIGH && count == 1\n \t * Here user wants to allocate 0th entry\n@@ -3227,7 +3225,7 @@ int npc_cn20k_ref_idx_alloc(struct rvu *rvu, int pcifunc, int key_type,\n \tref_valid = !!(limit || ref);\n \tdefrag_candidate = !ref_valid && !contig && virt;\n \tif (!ref_valid) {\n-\t\tif (contig && count > npc_priv.subbank_depth)\n+\t\tif (contig && count > npc_priv->subbank_depth)\n \t\t\tgoto try_noref_multi_subbank;\n \n \t\trc = npc_subbank_noref_alloc(rvu, key_type, contig,\n@@ -3272,7 +3270,7 @@ int npc_cn20k_ref_idx_alloc(struct rvu *rvu, int pcifunc, int key_type,\n \t\treturn -EINVAL;\n \t}\n \n-\tif (contig && count > npc_priv.subbank_depth)\n+\tif (contig && count > npc_priv->subbank_depth)\n \t\tgoto try_ref_multi_subbank;\n \n \trc = npc_subbank_ref_alloc(rvu, key_type, ref, limit,\n@@ -3334,8 +3332,8 @@ void npc_cn20k_subbank_calc_free(struct rvu *rvu, int *x2_free,\n \t*x4_free = 0;\n \t*sb_free = 0;\n \n-\tfor (i = 0; i < npc_priv.num_subbanks; i++) {\n-\t\tsb = &npc_priv.sb[i];\n+\tfor (i = 0; i < npc_priv->num_subbanks; i++) {\n+\t\tsb = &npc_priv->sb[i];\n \t\tmutex_lock(&sb->lock);\n \n \t\t/* Count number of free subbanks */\n@@ -3433,11 +3431,11 @@ static void npc_subbank_init(struct rvu *rvu, struct npc_subbank *sb, int idx)\n {\n \tmutex_init(&sb->lock);\n \n-\tsb->b0b = idx * npc_priv.subbank_depth;\n-\tsb->b0t = sb->b0b + npc_priv.subbank_depth - 1;\n+\tsb->b0b = idx * npc_priv->subbank_depth;\n+\tsb->b0t = sb->b0b + npc_priv->subbank_depth - 1;\n \n-\tsb->b1b = npc_priv.bank_depth + idx * npc_priv.subbank_depth;\n-\tsb->b1t = sb->b1b + npc_priv.subbank_depth - 1;\n+\tsb->b1b = npc_priv->bank_depth + idx * npc_priv->subbank_depth;\n+\tsb->b1t = sb->b1b + npc_priv->subbank_depth - 1;\n \n \tsb->flags = NPC_SUBBANK_FLAG_FREE;\n \tsb->idx = idx;\n@@ -3449,7 +3447,7 @@ static void npc_subbank_init(struct rvu *rvu, struct npc_subbank *sb, int idx)\n \t/* Keep first and last subbank at end of free array; so that\n \t * it will be used at last\n \t */\n-\txa_store(&npc_priv.xa_sb_free, sb->arr_idx,\n+\txa_store(&npc_priv->xa_sb_free, sb->arr_idx,\n \t\t xa_mk_value(sb->idx), GFP_KERNEL);\n }\n \n@@ -3474,7 +3472,7 @@ static int npc_pcifunc_map_create(struct rvu *rvu)\n \n \t\tpcifunc = pf << 9;\n \n-\t\txa_store(&npc_priv.xa_pf_map, (unsigned long)pcifunc,\n+\t\txa_store(&npc_priv->xa_pf_map, (unsigned long)pcifunc,\n \t\t\t xa_mk_value(cnt), GFP_KERNEL);\n \n \t\tcnt++;\n@@ -3483,7 +3481,7 @@ static int npc_pcifunc_map_create(struct rvu *rvu)\n \t\tfor (vf = 0; vf < numvfs; vf++) {\n \t\t\tpcifunc = (pf << 9) | (vf + 1);\n \n-\t\t\txa_store(&npc_priv.xa_pf_map, (unsigned long)pcifunc,\n+\t\t\txa_store(&npc_priv->xa_pf_map, (unsigned long)pcifunc,\n \t\t\t\t xa_mk_value(cnt), GFP_KERNEL);\n \t\t\tcnt++;\n \t\t}\n@@ -3569,7 +3567,7 @@ static int npc_defrag_alloc_free_slots(struct rvu *rvu,\n \tint rc, sb_off, i, err;\n \tbool deleted;\n \n-\tsb = &npc_priv.sb[f->idx];\n+\tsb = &npc_priv->sb[f->idx];\n \n \talloc_cnt1 = 0;\n \talloc_cnt2 = 0;\n@@ -3639,9 +3637,9 @@ static int npc_defrag_add_2_show_list(struct rvu *rvu, u16 old_midx,\n \tnode->vidx = vidx;\n \tINIT_LIST_HEAD(&node->list);\n \n-\tmutex_lock(&npc_priv.lock);\n-\tlist_add_tail(&node->list, &npc_priv.defrag_lh);\n-\tmutex_unlock(&npc_priv.lock);\n+\tmutex_lock(&npc_priv->lock);\n+\tlist_add_tail(&node->list, &npc_priv->defrag_lh);\n+\tmutex_unlock(&npc_priv->lock);\n \n \treturn 0;\n }\n@@ -3745,7 +3743,7 @@ int npc_defrag_move_vdx_to_free(struct rvu *rvu,\n \t\t}\n \n \t\t/* save pcifunc */\n-\t\tmap = xa_load(&npc_priv.xa_idx2pf_map, old_midx);\n+\t\tmap = xa_load(&npc_priv->xa_idx2pf_map, old_midx);\n \t\tpcifunc = xa_to_value(map);\n \n \t\t/* delete from pf maps */\n@@ -3904,29 +3902,29 @@ static void npc_defrag_list_clear(void)\n {\n \tstruct npc_defrag_show_node *node, *next;\n \n-\tmutex_lock(&npc_priv.lock);\n-\tlist_for_each_entry_safe(node, next, &npc_priv.defrag_lh, list) {\n+\tmutex_lock(&npc_priv->lock);\n+\tlist_for_each_entry_safe(node, next, &npc_priv->defrag_lh, list) {\n \t\tlist_del_init(&node->list);\n \t\tkfree(node);\n \t}\n \n-\tmutex_unlock(&npc_priv.lock);\n+\tmutex_unlock(&npc_priv->lock);\n }\n \n static void npc_lock_all_subbank(void)\n {\n \tint i;\n \n-\tfor (i = 0; i < npc_priv.num_subbanks; i++)\n-\t\tmutex_lock(&npc_priv.sb[i].lock);\n+\tfor (i = 0; i < npc_priv->num_subbanks; i++)\n+\t\tmutex_lock(&npc_priv->sb[i].lock);\n }\n \n static void npc_unlock_all_subbank(void)\n {\n \tint i;\n \n-\tfor (i = npc_priv.num_subbanks - 1; i >= 0; i--)\n-\t\tmutex_unlock(&npc_priv.sb[i].lock);\n+\tfor (i = npc_priv->num_subbanks - 1; i >= 0; i--)\n+\t\tmutex_unlock(&npc_priv->sb[i].lock);\n }\n \n int npc_cn20k_search_order_set(struct rvu *rvu,\n@@ -3937,9 +3935,9 @@ int npc_cn20k_search_order_set(struct rvu *rvu,\n \tstruct xarray *xa;\n \tint sb_idx, rc;\n \n-\tif (cnt != npc_priv.num_subbanks) {\n+\tif (cnt != npc_priv->num_subbanks) {\n \t\tdev_err(rvu->dev, \"Number of entries(%u) != %u\\n\",\n-\t\t\tcnt, npc_priv.num_subbanks);\n+\t\t\tcnt, npc_priv->num_subbanks);\n \t\treturn -EINVAL;\n \t}\n \n@@ -3948,11 +3946,11 @@ int npc_cn20k_search_order_set(struct rvu *rvu,\n \trestrict_valid = false;\n \n \tfor (sb_idx = 0; sb_idx < cnt; sb_idx++) {\n-\t\tsb = &npc_priv.sb[sb_idx];\n+\t\tsb = &npc_priv->sb[sb_idx];\n \n-\t\txa = &npc_priv.xa_sb_free;\n+\t\txa = &npc_priv->xa_sb_free;\n \t\tif (sb->flags & NPC_SUBBANK_FLAG_USED)\n-\t\t\txa = &npc_priv.xa_sb_used;\n+\t\t\txa = &npc_priv->xa_sb_used;\n \n \t\tsb->arr_idx = narr[sb_idx];\n \n@@ -3975,7 +3973,7 @@ int npc_cn20k_search_order_set(struct rvu *rvu,\n const u32 *npc_cn20k_search_order_get(bool *restricted_order, u32 *sz)\n {\n \t*restricted_order = restrict_valid;\n-\t*sz = npc_priv.num_subbanks;\n+\t*sz = npc_priv->num_subbanks;\n \treturn subbank_srch_order;\n }\n \n@@ -3999,7 +3997,7 @@ int npc_cn20k_defrag(struct rvu *rvu)\n \tINIT_LIST_HEAD(&x4lh);\n \tINIT_LIST_HEAD(&x2lh);\n \n-\tnode = kcalloc(npc_priv.num_subbanks, sizeof(*node), GFP_KERNEL);\n+\tnode = kcalloc(npc_priv->num_subbanks, sizeof(*node), GFP_KERNEL);\n \tif (!node)\n \t\treturn -ENOMEM;\n \n@@ -4008,13 +4006,13 @@ int npc_cn20k_defrag(struct rvu *rvu)\n \tnpc_lock_all_subbank();\n \n \t/* Fill in node with subbank properties */\n-\tfor (i = 0; i < npc_priv.num_subbanks; i++) {\n-\t\tsb = &npc_priv.sb[i];\n+\tfor (i = 0; i < npc_priv->num_subbanks; i++) {\n+\t\tsb = &npc_priv->sb[i];\n \n \t\tnode[i].idx = i;\n \t\tnode[i].key_type = sb->key_type;\n \t\tnode[i].free_cnt = sb->free_cnt;\n-\t\tnode[i].vidx = kcalloc(npc_priv.subbank_depth * 2,\n+\t\tnode[i].vidx = kcalloc(npc_priv->subbank_depth * 2,\n \t\t\t\t sizeof(*node[i].vidx),\n \t\t\t\t GFP_KERNEL);\n \t\tif (!node[i].vidx) {\n@@ -4044,8 +4042,8 @@ int npc_cn20k_defrag(struct rvu *rvu)\n \t}\n \n \t/* Filling vidx[] array with all vidx in that subbank */\n-\txa_for_each_start(&npc_priv.xa_vidx2idx_map, index, map,\n-\t\t\t npc_priv.bank_depth * 2) {\n+\txa_for_each_start(&npc_priv->xa_vidx2idx_map, index, map,\n+\t\t\t npc_priv->bank_depth * 2) {\n \t\tmidx = xa_to_value(map);\n \t\trc = npc_mcam_idx_2_subbank_idx(rvu, midx,\n \t\t\t\t\t\t &sb, &sb_off);\n@@ -4062,14 +4060,14 @@ int npc_cn20k_defrag(struct rvu *rvu)\n \t}\n \n \t/* Mark all subbank which has ref allocation */\n-\tfor (i = 0; i < npc_priv.num_subbanks; i++) {\n+\tfor (i = 0; i < npc_priv->num_subbanks; i++) {\n \t\ttnode = &node[i];\n \n \t\tif (!tnode->valid)\n \t\t\tcontinue;\n \n \t\ttot = (tnode->key_type == NPC_MCAM_KEY_X2) ?\n-\t\t\tnpc_priv.subbank_depth * 2 : npc_priv.subbank_depth;\n+\t\t\tnpc_priv->subbank_depth * 2 : npc_priv->subbank_depth;\n \n \t\tif (node[i].vidx_cnt != tot - tnode->free_cnt)\n \t\t\ttnode->refs = true;\n@@ -4086,7 +4084,7 @@ int npc_cn20k_defrag(struct rvu *rvu)\n free_vidx:\n \tnpc_unlock_all_subbank();\n \tmutex_unlock(&mcam->lock);\n-\tfor (i = 0; i < npc_priv.num_subbanks; i++)\n+\tfor (i = 0; i < npc_priv->num_subbanks; i++)\n \t\tkfree(node[i].vidx);\n \tkfree(node);\n \treturn rc;\n@@ -4114,7 +4112,7 @@ int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 pcifunc, u16 *bcast,\n \t\t*ptr[i] = USHRT_MAX;\n \t}\n \n-\tif (!npc_priv.init_done)\n+\tif (!npc_priv)\n \t\treturn 0;\n \n \tif (is_lbk_vf(rvu, pcifunc)) {\n@@ -4122,7 +4120,7 @@ int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 pcifunc, u16 *bcast,\n \t\t\treturn -EINVAL;\n \n \t\tidx = NPC_DFT_RULE_ID_MK(pcifunc, NPC_DFT_RULE_PROMISC_ID);\n-\t\tval = xa_load(&npc_priv.xa_pf2dfl_rmap, idx);\n+\t\tval = xa_load(&npc_priv->xa_pf2dfl_rmap, idx);\n \t\tif (!val) {\n \t\t\tpr_debug(\"%s: Failed to find %s index for pcifunc=%#x\\n\",\n \t\t\t\t __func__,\n@@ -4141,7 +4139,7 @@ int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 pcifunc, u16 *bcast,\n \t\t\treturn -EINVAL;\n \n \t\tidx = NPC_DFT_RULE_ID_MK(pcifunc, NPC_DFT_RULE_UCAST_ID);\n-\t\tval = xa_load(&npc_priv.xa_pf2dfl_rmap, idx);\n+\t\tval = xa_load(&npc_priv->xa_pf2dfl_rmap, idx);\n \t\tif (!val) {\n \t\t\tpr_debug(\"%s: Failed to find %s index for pcifunc=%#x\\n\",\n \t\t\t\t __func__,\n@@ -4161,7 +4159,7 @@ int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 pcifunc, u16 *bcast,\n \t\t\tcontinue;\n \n \t\tidx = NPC_DFT_RULE_ID_MK(pcifunc, i);\n-\t\tval = xa_load(&npc_priv.xa_pf2dfl_rmap, idx);\n+\t\tval = xa_load(&npc_priv->xa_pf2dfl_rmap, idx);\n \t\tif (!val) {\n \t\t\tpr_debug(\"%s: Failed to find %s index for pcifunc=%#x\\n\",\n \t\t\t\t __func__,\n@@ -4185,8 +4183,8 @@ int rvu_mbox_handler_npc_get_pfl_info(struct rvu *rvu, struct msg_req *req,\n \t\treturn -EOPNOTSUPP;\n \t}\n \n-\trsp->kw_type = npc_priv.kw;\n-\trsp->x4_slots = npc_priv.bank_depth;\n+\trsp->kw_type = npc_priv->kw;\n+\trsp->x4_slots = npc_priv->bank_depth;\n \treturn 0;\n }\n \n@@ -4276,7 +4274,7 @@ void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 pcifunc)\n \tint blkaddr, rc, i;\n \tvoid *map;\n \n-\tif (!npc_priv.init_done)\n+\tif (!npc_priv)\n \t\treturn;\n \n \tif (!npc_is_cgx_or_lbk(rvu, pcifunc)) {\n@@ -4294,7 +4292,7 @@ void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 pcifunc)\n \t/* LBK */\n \tif (is_lbk_vf(rvu, pcifunc)) {\n \t\tindex = NPC_DFT_RULE_ID_MK(pcifunc, NPC_DFT_RULE_PROMISC_ID);\n-\t\tmap = xa_erase(&npc_priv.xa_pf2dfl_rmap, index);\n+\t\tmap = xa_erase(&npc_priv->xa_pf2dfl_rmap, index);\n \t\tif (!map)\n \t\t\tdev_dbg(rvu->dev,\n \t\t\t\t\"%s: Err from delete %s mcam idx from xarray (pcifunc=%#x\\n\",\n@@ -4308,7 +4306,7 @@ void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 pcifunc)\n \t/* VF */\n \tif (is_vf(pcifunc)) {\n \t\tindex = NPC_DFT_RULE_ID_MK(pcifunc, NPC_DFT_RULE_UCAST_ID);\n-\t\tmap = xa_erase(&npc_priv.xa_pf2dfl_rmap, index);\n+\t\tmap = xa_erase(&npc_priv->xa_pf2dfl_rmap, index);\n \t\tif (!map)\n \t\t\tdev_dbg(rvu->dev,\n \t\t\t\t\"%s: Err from delete %s mcam idx from xarray (pcifunc=%#x\\n\",\n@@ -4322,7 +4320,7 @@ void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 pcifunc)\n \t/* PF */\n \tfor (i = NPC_DFT_RULE_START_ID; i < NPC_DFT_RULE_MAX_ID; i++) {\n \t\tindex = NPC_DFT_RULE_ID_MK(pcifunc, i);\n-\t\tmap = xa_erase(&npc_priv.xa_pf2dfl_rmap, index);\n+\t\tmap = xa_erase(&npc_priv->xa_pf2dfl_rmap, index);\n \t\tif (!map)\n \t\t\tdev_dbg(rvu->dev,\n \t\t\t\t\"%s: Err from delete %s mcam idx from xarray (pcifunc=%#x\\n\",\n@@ -4382,7 +4380,7 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc)\n \tstruct msg_rsp free_rsp;\n \tu16 b, m, p, u;\n \n-\tif (!npc_priv.init_done)\n+\tif (!npc_priv)\n \t\treturn 0;\n \n \tif (!npc_is_cgx_or_lbk(rvu, pcifunc)) {\n@@ -4405,7 +4403,7 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc)\n \t}\n \n \t/* Set ref index as lowest priority index */\n-\teidx = 2 * npc_priv.bank_depth - 1;\n+\teidx = 2 * npc_priv->bank_depth - 1;\n \n \t/* Install only UCAST for VF */\n \tcnt = is_vf(pcifunc) ? 1 : ARRAY_SIZE(mcam_idx);\n@@ -4471,9 +4469,9 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc)\n \treq.hdr.pcifunc = pcifunc;\n \treq.ref_prio = NPC_MCAM_LOWER_PRIO;\n \n-\tif (npc_priv.kw == NPC_MCAM_KEY_X4) {\n+\tif (npc_priv->kw == NPC_MCAM_KEY_X4) {\n \t\treq.kw_type = NPC_MCAM_KEY_X4;\n-\t\treq.ref_entry = eidx & (npc_priv.bank_depth - 1);\n+\t\treq.ref_entry = eidx & (npc_priv->bank_depth - 1);\n \t} else {\n \t\treq.kw_type = NPC_MCAM_KEY_X2;\n \t\treq.ref_entry = eidx;\n@@ -4497,7 +4495,7 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc)\n \t/* LBK */\n \tif (is_lbk_vf(rvu, pcifunc)) {\n \t\tindex = NPC_DFT_RULE_ID_MK(pcifunc, NPC_DFT_RULE_PROMISC_ID);\n-\t\tret = xa_insert(&npc_priv.xa_pf2dfl_rmap, index,\n+\t\tret = xa_insert(&npc_priv->xa_pf2dfl_rmap, index,\n \t\t\t\txa_mk_value(mcam_idx[0]), GFP_KERNEL);\n \t\tif (ret) {\n \t\t\tdev_err(rvu->dev,\n@@ -4514,7 +4512,7 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc)\n \t/* VF */\n \tif (is_vf(pcifunc)) {\n \t\tindex = NPC_DFT_RULE_ID_MK(pcifunc, NPC_DFT_RULE_UCAST_ID);\n-\t\tret = xa_insert(&npc_priv.xa_pf2dfl_rmap, index,\n+\t\tret = xa_insert(&npc_priv->xa_pf2dfl_rmap, index,\n \t\t\t\txa_mk_value(mcam_idx[0]), GFP_KERNEL);\n \t\tif (ret) {\n \t\t\tdev_err(rvu->dev,\n@@ -4532,7 +4530,7 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc)\n \tfor (i = NPC_DFT_RULE_START_ID, k = 0; i < NPC_DFT_RULE_MAX_ID &&\n \t k < cnt; i++, k++) {\n \t\tindex = NPC_DFT_RULE_ID_MK(pcifunc, i);\n-\t\tret = xa_insert(&npc_priv.xa_pf2dfl_rmap, index,\n+\t\tret = xa_insert(&npc_priv->xa_pf2dfl_rmap, index,\n \t\t\t\txa_mk_value(mcam_idx[k]), GFP_KERNEL);\n \t\tif (ret) {\n \t\t\tdev_err(rvu->dev,\n@@ -4541,7 +4539,7 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc)\n \t\t\t\tpcifunc);\n \t\t\tfor (int p = NPC_DFT_RULE_START_ID; p < i; p++) {\n \t\t\t\tindex = NPC_DFT_RULE_ID_MK(pcifunc, p);\n-\t\t\t\txa_erase(&npc_priv.xa_pf2dfl_rmap, index);\n+\t\t\t\txa_erase(&npc_priv->xa_pf2dfl_rmap, index);\n \t\t\t}\n \t\t\tgoto err;\n \t\t}\n@@ -4599,34 +4597,40 @@ static int npc_priv_init(struct rvu *rvu)\n \t\treturn -EINVAL;\n \t}\n \n-\tnpc_priv.num_subbanks = num_subbanks;\n+\tnpc_priv = kcalloc(1, sizeof(*npc_priv), GFP_KERNEL);\n+\tif (!npc_priv)\n+\t\treturn -ENOMEM;\n+\n+\tnpc_priv->num_banks = num_banks;\n+\n+\tnpc_priv->num_subbanks = num_subbanks;\n \n \tsubbank_depth =\tbank_depth / num_subbanks;\n \n-\tnpc_priv.bank_depth = bank_depth;\n-\tnpc_priv.subbank_depth = subbank_depth;\n+\tnpc_priv->bank_depth = bank_depth;\n+\tnpc_priv->subbank_depth = subbank_depth;\n \n \t/* Get kex configured key size */\n \tcfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(0));\n-\tnpc_priv.kw = FIELD_GET(GENMASK_ULL(34, 32), cfg);\n+\tnpc_priv->kw = FIELD_GET(GENMASK_ULL(34, 32), cfg);\n \n \tdev_info(rvu->dev,\n \t\t \"banks=%u depth=%u, subbanks=%u depth=%u, key type=%s\\n\",\n \t\t num_banks, bank_depth, num_subbanks, subbank_depth,\n-\t\t npc_kw_name[npc_priv.kw]);\n+\t\t npc_kw_name[npc_priv->kw]);\n \n-\tnpc_priv.sb = kcalloc(num_subbanks, sizeof(struct npc_subbank),\n-\t\t\t GFP_KERNEL);\n-\tif (!npc_priv.sb)\n+\tnpc_priv->sb = kcalloc(num_subbanks, sizeof(struct npc_subbank),\n+\t\t\t GFP_KERNEL);\n+\tif (!npc_priv->sb)\n \t\treturn -ENOMEM;\n \n-\txa_init_flags(&npc_priv.xa_sb_used, XA_FLAGS_ALLOC);\n-\txa_init_flags(&npc_priv.xa_sb_free, XA_FLAGS_ALLOC);\n-\txa_init_flags(&npc_priv.xa_idx2pf_map, XA_FLAGS_ALLOC);\n-\txa_init_flags(&npc_priv.xa_pf_map, XA_FLAGS_ALLOC);\n-\txa_init_flags(&npc_priv.xa_pf2dfl_rmap, XA_FLAGS_ALLOC);\n-\txa_init_flags(&npc_priv.xa_idx2vidx_map, XA_FLAGS_ALLOC);\n-\txa_init_flags(&npc_priv.xa_vidx2idx_map, XA_FLAGS_ALLOC);\n+\txa_init_flags(&npc_priv->xa_sb_used, XA_FLAGS_ALLOC);\n+\txa_init_flags(&npc_priv->xa_sb_free, XA_FLAGS_ALLOC);\n+\txa_init_flags(&npc_priv->xa_idx2pf_map, XA_FLAGS_ALLOC);\n+\txa_init_flags(&npc_priv->xa_pf_map, XA_FLAGS_ALLOC);\n+\txa_init_flags(&npc_priv->xa_pf2dfl_rmap, XA_FLAGS_ALLOC);\n+\txa_init_flags(&npc_priv->xa_idx2vidx_map, XA_FLAGS_ALLOC);\n+\txa_init_flags(&npc_priv->xa_vidx2idx_map, XA_FLAGS_ALLOC);\n \n \tif (npc_create_srch_order(num_subbanks))\n \t\tgoto fail1;\n@@ -4634,22 +4638,22 @@ static int npc_priv_init(struct rvu *rvu)\n \tnpc_populate_restricted_idxs(num_subbanks);\n \n \t/* Initialize subbanks */\n-\tfor (i = 0, sb = npc_priv.sb; i < num_subbanks; i++, sb++)\n+\tfor (i = 0, sb = npc_priv->sb; i < num_subbanks; i++, sb++)\n \t\tnpc_subbank_init(rvu, sb, i);\n \n \t/* Get number of pcifuncs in the system */\n-\tnpc_priv.pf_cnt = npc_pcifunc_map_create(rvu);\n-\tnpc_priv.xa_pf2idx_map = kcalloc(npc_priv.pf_cnt,\n-\t\t\t\t\t sizeof(struct xarray),\n-\t\t\t\t\t GFP_KERNEL);\n-\tif (!npc_priv.xa_pf2idx_map)\n+\tnpc_priv->pf_cnt = npc_pcifunc_map_create(rvu);\n+\tnpc_priv->xa_pf2idx_map = kcalloc(npc_priv->pf_cnt,\n+\t\t\t\t\t sizeof(struct xarray),\n+\t\t\t\t\t GFP_KERNEL);\n+\tif (!npc_priv->xa_pf2idx_map)\n \t\tgoto fail2;\n \n-\tfor (i = 0; i < npc_priv.pf_cnt; i++)\n-\t\txa_init_flags(&npc_priv.xa_pf2idx_map[i], XA_FLAGS_ALLOC);\n+\tfor (i = 0; i < npc_priv->pf_cnt; i++)\n+\t\txa_init_flags(&npc_priv->xa_pf2idx_map[i], XA_FLAGS_ALLOC);\n \n-\tINIT_LIST_HEAD(&npc_priv.defrag_lh);\n-\tmutex_init(&npc_priv.lock);\n+\tINIT_LIST_HEAD(&npc_priv->defrag_lh);\n+\tmutex_init(&npc_priv->lock);\n \n \treturn 0;\n \n@@ -4658,15 +4662,17 @@ static int npc_priv_init(struct rvu *rvu)\n \tsubbank_srch_order = NULL;\n \n fail1:\n-\txa_destroy(&npc_priv.xa_sb_used);\n-\txa_destroy(&npc_priv.xa_sb_free);\n-\txa_destroy(&npc_priv.xa_idx2pf_map);\n-\txa_destroy(&npc_priv.xa_pf_map);\n-\txa_destroy(&npc_priv.xa_pf2dfl_rmap);\n-\txa_destroy(&npc_priv.xa_idx2vidx_map);\n-\txa_destroy(&npc_priv.xa_vidx2idx_map);\n-\tkfree(npc_priv.sb);\n-\tnpc_priv.sb = NULL;\n+\txa_destroy(&npc_priv->xa_sb_used);\n+\txa_destroy(&npc_priv->xa_sb_free);\n+\txa_destroy(&npc_priv->xa_idx2pf_map);\n+\txa_destroy(&npc_priv->xa_pf_map);\n+\txa_destroy(&npc_priv->xa_pf2dfl_rmap);\n+\txa_destroy(&npc_priv->xa_idx2vidx_map);\n+\txa_destroy(&npc_priv->xa_vidx2idx_map);\n+\tkfree(npc_priv->sb);\n+\tnpc_priv->sb = NULL;\n+\tkfree(npc_priv);\n+\tnpc_priv = NULL;\n \treturn -ENOMEM;\n }\n \n@@ -4674,25 +4680,30 @@ void npc_cn20k_deinit(struct rvu *rvu)\n {\n \tint i;\n \n-\txa_destroy(&npc_priv.xa_sb_used);\n-\txa_destroy(&npc_priv.xa_sb_free);\n-\txa_destroy(&npc_priv.xa_idx2pf_map);\n-\txa_destroy(&npc_priv.xa_pf_map);\n-\txa_destroy(&npc_priv.xa_pf2dfl_rmap);\n-\txa_destroy(&npc_priv.xa_idx2vidx_map);\n-\txa_destroy(&npc_priv.xa_vidx2idx_map);\n+\tif (!npc_priv)\n+\t\treturn;\n+\n+\txa_destroy(&npc_priv->xa_sb_used);\n+\txa_destroy(&npc_priv->xa_sb_free);\n+\txa_destroy(&npc_priv->xa_idx2pf_map);\n+\txa_destroy(&npc_priv->xa_pf_map);\n+\txa_destroy(&npc_priv->xa_pf2dfl_rmap);\n+\txa_destroy(&npc_priv->xa_idx2vidx_map);\n+\txa_destroy(&npc_priv->xa_vidx2idx_map);\n \n-\tfor (i = 0; i < npc_priv.pf_cnt; i++)\n-\t\txa_destroy(&npc_priv.xa_pf2idx_map[i]);\n+\tfor (i = 0; i < npc_priv->pf_cnt; i++)\n+\t\txa_destroy(&npc_priv->xa_pf2idx_map[i]);\n \n-\tkfree(npc_priv.xa_pf2idx_map);\n+\tkfree(npc_priv->xa_pf2idx_map);\n \t/* No need to destroy mutex lock as it is\n \t * part of subbank structure\n \t */\n-\tkfree(npc_priv.sb);\n+\tkfree(npc_priv->sb);\n \tkfree(subbank_srch_order);\n-\tbitmap_clear(npc_priv.en_map, 0, MAX_NUM_BANKS * MAX_NUM_SUB_BANKS *\n+\tbitmap_clear(npc_priv->en_map, 0, MAX_NUM_BANKS * MAX_NUM_SUB_BANKS *\n \t\t MAX_SUBBANK_DEPTH);\n+\tkfree(npc_priv);\n+\tnpc_priv = NULL;\n }\n \n static int npc_setup_mcam_section(struct rvu *rvu, int key_type)\n@@ -4705,7 +4716,7 @@ static int npc_setup_mcam_section(struct rvu *rvu, int key_type)\n \t\treturn -ENODEV;\n \t}\n \n-\tfor (sec = 0; sec < npc_priv.num_subbanks; sec++)\n+\tfor (sec = 0; sec < npc_priv->num_subbanks; sec++)\n \t\trvu_write64(rvu, blkaddr,\n \t\t\t NPC_AF_MCAM_SECTIONX_CFG_EXT(sec), key_type);\n \n@@ -4730,7 +4741,5 @@ int npc_cn20k_init(struct rvu *rvu)\n \t\treturn err;\n \t}\n \n-\tnpc_priv.init_done = true;\n-\n \treturn 0;\n }\ndiff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h\nindex bf030e40fbf9..ee0bbeba7f25 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h\n@@ -191,7 +191,7 @@ struct npc_defrag_show_node {\n */\n struct npc_priv_t {\n \tint bank_depth;\n-\tconst int num_banks;\n+\tint num_banks;\n \tint num_subbanks;\n \tint subbank_depth;\n \tDECLARE_BITMAP(en_map, MAX_NUM_BANKS *\n@@ -210,7 +210,6 @@ struct npc_priv_t {\n \tstruct list_head defrag_lh;\n \tstruct mutex lock; /* protect defrag nodes */\n \tint pf_cnt;\n-\tbool init_done;\n };\n \n struct npc_kpm_action0 {\n", "prefixes": [ "v12", "net-next", "9/9" ] }