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GET /api/1.2/patches/2234853/?format=api
{ "id": 2234853, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2234853/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260508064053.37529-6-fengchengwen@huawei.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.2/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260508064053.37529-6-fengchengwen@huawei.com>", "list_archive_url": null, "date": "2026-05-08T06:40:51", "name": "[v8,5/7] vfio/pci: Add PCIe TPH enable/disable support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3dbef1000ce7d354d8043ad169939406c4ffc1e5", "submitter": { "id": 92756, "url": "http://patchwork.ozlabs.org/api/1.2/people/92756/?format=api", "name": "fengchengwen", "email": "fengchengwen@huawei.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260508064053.37529-6-fengchengwen@huawei.com/mbox/", "series": [ { "id": 503332, "url": "http://patchwork.ozlabs.org/api/1.2/series/503332/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=503332", "date": "2026-05-08T06:40:48", "name": "vfio/pci: Add PCIe TPH support", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/503332/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2234853/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2234853/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-54232-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=aQY/pdM1;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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Fri, 8 May 2026 14:41:02 +0800" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1778222478; cv=none;\n b=LyQeFngG35DPwgZjN0CaE8WQsRPmB/P/Yzj9IKC9IjgCEXNWIX+4IRM5HqShHWJRlGTY6Tt1eLffzZBZ0smtRU51PZ/ZDQZJsq/gW1VEexuqf1KoJ1my5vsOaebJTdGTLWS4swk6QTUSG0JMuHhrU8bmyAhoYP1B27+JSJHjJzg=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1778222478; c=relaxed/simple;\n\tbh=uVw636mppGZ4F05anmOhNJmOsJa3nbK9IzgbiUdRdqI=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=VikHI+CIdbZbXKyYeGtiLBVafm7523Epg7/Ve8IOlKE2TCR2REjPYlWF3pYW2PP7NiIdELKVF/nZTtDDLIO6CafcAzH3ygwUNta+izMG74L5wBovOgXmVwhLErXI8VQiRHYxThRMZ4tAVR7eZe2R7lwpOqMGCLismC8ifv9+EC8=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com;\n spf=pass smtp.mailfrom=huawei.com;\n dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=aQY/pdM1; arc=none smtp.client-ip=113.46.200.220", "dkim-signature": "v=1; a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=x3tRc/K4B2B0pBiXXNxY6toT0CHoMGbJC5eMm/M1zsM=;\n\tb=aQY/pdM1ntJNXPooXHAnmRhg6vwwV52y6UrMxI7mz6R2mgfGqGU2RlHeRlFot4pfk/9yZ9l5d\n\tY5uBAlg3ZoSh3+RhR6oR10fiXvXGTodfUrIZC6cOnfnxhhmmfBUXHVc33dWVKen8M2QrS8yEcgG\n\tja9jEq2Tvv9ovShe55B5MCU=", "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<alex@shazbot.org>, <jgg@ziepe.ca>", "CC": "<wathsala.vithanage@arm.com>, <helgaas@kernel.org>, <wei.huang2@amd.com>,\n\t<wangzhou1@hisilicon.com>, <wangyushan12@huawei.com>,\n\t<liuyonglong@huawei.com>, <kvm@vger.kernel.org>, <linux-pci@vger.kernel.org>", "Subject": "[PATCH v8 5/7] vfio/pci: Add PCIe TPH enable/disable support", "Date": "Fri, 8 May 2026 14:40:51 +0800", "Message-ID": "<20260508064053.37529-6-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20260508064053.37529-1-fengchengwen@huawei.com>", "References": "<20260508064053.37529-1-fengchengwen@huawei.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-ClientProxiedBy": "kwepems100002.china.huawei.com (7.221.188.206) To\n kwepemk500009.china.huawei.com (7.202.194.94)" }, "content": "Add support to enable and disable TPH function with mode selection.\n\nRestrict unsafe device-specific TPH mode to be allowed only when module\nparameter enable_unsafe_tph_ds_mode=1 is set.\n\nDisable TPH when:\n1) Taking over ownership of the device (before user visibility),\n2) Userspace closes the device FD to clean up state.\n\nSerialize all TPH operations under vdev->igate mutex using scope-based\nautomatic locking to prevent hardware control and bitfield races.\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\n---\n drivers/vfio/pci/vfio_pci_core.c | 48 ++++++++++++++++++++++++++++++++\n 1 file changed, 48 insertions(+)", "diff": "diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c\nindex 0e97b128fd63..bfc7e87d190f 100644\n--- a/drivers/vfio/pci/vfio_pci_core.c\n+++ b/drivers/vfio/pci/vfio_pci_core.c\n@@ -738,6 +738,9 @@ void vfio_pci_core_close_device(struct vfio_device *core_vdev)\n #endif\n \tvfio_pci_dma_buf_cleanup(vdev);\n \n+\t/* Disable TPH when userspace closes the device FD */\n+\tpcie_disable_tph(vdev->pdev);\n+\n \tvfio_pci_core_disable(vdev);\n \n \tmutex_lock(&vdev->igate);\n@@ -1493,18 +1496,60 @@ static int vfio_pci_tph_get_cap(struct vfio_pci_core_device *vdev,\n \treturn 0;\n }\n \n+static int vfio_pci_tph_enable(struct vfio_pci_core_device *vdev,\n+\t\t\t struct vfio_device_pci_tph_op *op,\n+\t\t\t void __user *uarg)\n+{\n+\tstruct pci_dev *pdev = vdev->pdev;\n+\tstruct vfio_pci_tph_ctrl ctrl;\n+\tint mode;\n+\n+\tif (op->argsz < offsetofend(struct vfio_device_pci_tph_op, ctrl))\n+\t\treturn -EINVAL;\n+\n+\tif (copy_from_user(&ctrl, uarg, sizeof(ctrl)))\n+\t\treturn -EFAULT;\n+\n+\tif (ctrl.mode != VFIO_PCI_TPH_MODE_IV &&\n+\t ctrl.mode != VFIO_PCI_TPH_MODE_DS)\n+\t\treturn -EINVAL;\n+\n+\tif (ctrl.mode == VFIO_PCI_TPH_MODE_DS && !enable_unsafe_tph_ds_mode)\n+\t\treturn -EOPNOTSUPP;\n+\n+\t/* Reserved must be zero */\n+\tif (memchr_inv(ctrl.reserved, 0, sizeof(ctrl.reserved)))\n+\t\treturn -EINVAL;\n+\n+\tmode = (ctrl.mode == VFIO_PCI_TPH_MODE_IV) ? PCI_TPH_ST_IV_MODE :\n+\t\t\t\t\t\t PCI_TPH_ST_DS_MODE;\n+\treturn pcie_enable_tph(pdev, mode);\n+}\n+\n+static int vfio_pci_tph_disable(struct vfio_pci_core_device *vdev)\n+{\n+\tpcie_disable_tph(vdev->pdev);\n+\treturn 0;\n+}\n+\n static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\t\t void __user *uarg)\n {\n \tstruct vfio_device_pci_tph_op op = {0};\n \tsize_t minsz = sizeof(op.argsz) + sizeof(op.op);\n \n+\tguard(mutex)(&vdev->igate);\n+\n \tif (copy_from_user(&op, uarg, minsz))\n \t\treturn -EFAULT;\n \n \tswitch (op.op) {\n \tcase VFIO_PCI_TPH_GET_CAP:\n \t\treturn vfio_pci_tph_get_cap(vdev, &op, uarg + minsz);\n+\tcase VFIO_PCI_TPH_ENABLE:\n+\t\treturn vfio_pci_tph_enable(vdev, &op, uarg + minsz);\n+\tcase VFIO_PCI_TPH_DISABLE:\n+\t\treturn vfio_pci_tph_disable(vdev);\n \tdefault:\n \t\t/* Other ops are not implemented yet */\n \t\treturn -EINVAL;\n@@ -2257,6 +2302,9 @@ int vfio_pci_core_register_device(struct vfio_pci_core_device *vdev)\n \tif (!disable_idle_d3)\n \t\tpm_runtime_put(dev);\n \n+\t/* Disable TPH when taking over ownership of the device */\n+\tpcie_disable_tph(pdev);\n+\n \tret = vfio_register_group_dev(&vdev->vdev);\n \tif (ret)\n \t\tgoto out_power;\n", "prefixes": [ "v8", "5/7" ] }