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GET /api/1.2/patches/2234612/?format=api
{ "id": 2234612, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2234612/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260507221717.486023-3-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260507221717.486023-3-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2026-05-07T22:17:01", "name": "[02/18] fpu: Introduce FloatExceptionFlags", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3ba2abcb01435f430e4b8c769626646fed079eb6", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/1.2/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260507221717.486023-3-richard.henderson@linaro.org/mbox/", "series": [ { "id": 503289, "url": "http://patchwork.ozlabs.org/api/1.2/series/503289/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=503289", "date": "2026-05-07T22:16:59", "name": "fpu: Compress float_status", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/503289/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2234612/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2234612/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=J5sdyAa6;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-oi1-x230.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "We have, in the past, used any of uint8_t, uint16_t or int\nto hold the set of exception flags. Use a typedef instead.\n\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n include/fpu/softfloat-helpers.h | 6 ++++--\n include/fpu/softfloat-types.h | 4 +++-\n include/fpu/softfloat.h | 2 +-\n fpu/softfloat.c | 2 +-\n fpu/softfloat-parts.c.inc | 7 ++++---\n 5 files changed, 13 insertions(+), 8 deletions(-)", "diff": "diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helpers.h\nindex 90862f5cd2..745a49f07a 100644\n--- a/include/fpu/softfloat-helpers.h\n+++ b/include/fpu/softfloat-helpers.h\n@@ -64,7 +64,8 @@ static inline void set_float_rounding_mode(FloatRoundMode val,\n status->float_rounding_mode = val;\n }\n \n-static inline void set_float_exception_flags(int val, float_status *status)\n+static inline void\n+set_float_exception_flags(FloatExceptionFlags val, float_status *status)\n {\n status->float_exception_flags = val;\n }\n@@ -146,7 +147,8 @@ static inline FloatRoundMode get_float_rounding_mode(const float_status *status)\n return status->float_rounding_mode;\n }\n \n-static inline int get_float_exception_flags(const float_status *status)\n+static inline FloatExceptionFlags\n+get_float_exception_flags(const float_status *status)\n {\n return status->float_exception_flags;\n }\ndiff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h\nindex ead146c22d..5048faa76f 100644\n--- a/include/fpu/softfloat-types.h\n+++ b/include/fpu/softfloat-types.h\n@@ -181,6 +181,8 @@ enum {\n float_flag_input_denormal_used = 0x4000,\n };\n \n+typedef uint16_t FloatExceptionFlags;\n+\n /*\n * Rounding precision for floatx80.\n */\n@@ -385,7 +387,7 @@ typedef enum __attribute__((__packed__)) {\n */\n \n typedef struct float_status {\n- uint16_t float_exception_flags;\n+ FloatExceptionFlags float_exception_flags;\n FloatRoundMode float_rounding_mode;\n FloatX80RoundPrec floatx80_rounding_precision;\n FloatX80Behaviour floatx80_behaviour;\ndiff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h\nindex 1580d956d5..4ae4ddc799 100644\n--- a/include/fpu/softfloat.h\n+++ b/include/fpu/softfloat.h\n@@ -101,7 +101,7 @@ typedef enum {\n | Routine to raise any or all of the software IEC/IEEE floating-point\n | exception flags.\n *----------------------------------------------------------------------------*/\n-static inline void float_raise(uint16_t flags, float_status *status)\n+static inline void float_raise(FloatExceptionFlags flags, float_status *status)\n {\n status->float_exception_flags |= flags;\n }\ndiff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex a6ab3ee0f8..9fc0b83cd1 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -2964,7 +2964,7 @@ static int64_t float128_to_int64_scalbn(float128 a, FloatRoundMode rmode,\n static Int128 float128_to_int128_scalbn(float128 a, FloatRoundMode rmode,\n int scale, float_status *s)\n {\n- int flags = 0;\n+ FloatExceptionFlags flags = 0;\n Int128 r;\n FloatParts128 p = float128_unpack_canonical(a, s);\n \ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex 789a41d24e..8253d480f5 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -297,7 +297,8 @@ static void partsN(uncanon_normal)(FloatPartsN *p, float_status *s,\n const uint64_t roundeven_mask = round_mask | frac_lsb;\n uint64_t inc;\n bool overflow_norm = saturate;\n- int exp, flags = 0;\n+ int exp;\n+ FloatExceptionFlags flags = 0;\n \n switch (s->float_rounding_mode) {\n case float_round_nearest_even_max:\n@@ -1265,7 +1266,7 @@ static int64_t partsN(float_to_sint)(FloatPartsN *p, FloatRoundMode rmode,\n int scale, int64_t min, int64_t max,\n float_status *s)\n {\n- int flags = 0;\n+ FloatExceptionFlags flags = 0;\n uint64_t r;\n \n switch (p->cls) {\n@@ -1333,7 +1334,7 @@ static int64_t partsN(float_to_sint)(FloatPartsN *p, FloatRoundMode rmode,\n static uint64_t partsN(float_to_uint)(FloatPartsN *p, FloatRoundMode rmode,\n int scale, uint64_t max, float_status *s)\n {\n- int flags = 0;\n+ FloatExceptionFlags flags = 0;\n uint64_t r;\n \n switch (p->cls) {\n", "prefixes": [ "02/18" ] }