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GET /api/1.2/patches/2234220/?format=api
{ "id": 2234220, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2234220/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260507120524.111056-3-npiggin@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260507120524.111056-3-npiggin@gmail.com>", "list_archive_url": null, "date": "2026-05-07T12:05:20", "name": "[2/4,RFC] hw/i2c/designware_i2c: Switch to Fifo8", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "721098eee8230c998bcec79ed3a81d3cc6b8f7c0", "submitter": { "id": 69518, "url": "http://patchwork.ozlabs.org/api/1.2/people/69518/?format=api", "name": "Nicholas Piggin", "email": "npiggin@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260507120524.111056-3-npiggin@gmail.com/mbox/", "series": [ { "id": 503171, "url": "http://patchwork.ozlabs.org/api/1.2/series/503171/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=503171", "date": "2026-05-07T12:05:18", "name": "hw/i2c: Add designware i2c controller", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/503171/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2234220/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2234220/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com 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"[PATCH 2/4] [RFC] hw/i2c/designware_i2c: Switch to Fifo8", "Date": "Thu, 7 May 2026 22:05:20 +1000", "Message-ID": "<20260507120524.111056-3-npiggin@gmail.com>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260507120524.111056-1-npiggin@gmail.com>", "References": "<20260507120524.111056-1-npiggin@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2607:f8b0:4864:20::62f;\n envelope-from=npiggin@gmail.com; helo=mail-pl1-x62f.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Alistair suggested moving to Fifo8, which I think is\na good improvement.\n\nBroken out for individual review, but IMO we should\nsquash before merge since it changes VMState format.\n\nSigned-off-by: Nicholas Piggin <npiggin@gmail.com>\n---\n hw/i2c/designware_i2c.c | 37 ++++++++++++++++++++-------------\n include/hw/i2c/designware_i2c.h | 7 +++----\n 2 files changed, 25 insertions(+), 19 deletions(-)", "diff": "diff --git a/hw/i2c/designware_i2c.c b/hw/i2c/designware_i2c.c\nindex 1e5505f571..83d0968580 100644\n--- a/hw/i2c/designware_i2c.c\n+++ b/hw/i2c/designware_i2c.c\n@@ -208,10 +208,8 @@ static void dw_i2c_update_irq(DesignWareI2CState *s)\n qemu_set_irq(s->irq, level);\n }\n \n-static uint32_t dw_i2c_read_ic_data_cmd(DesignWareI2CState *s)\n+static uint8_t dw_i2c_read_ic_data_cmd(DesignWareI2CState *s)\n {\n- uint32_t value = s->rx_fifo[s->rx_cur];\n-\n if (s->status != DW_I2C_STATUS_RECEIVING) {\n qemu_log_mask(LOG_GUEST_ERROR,\n \"%s: Attempted to read from RX fifo when not in receive \"\n@@ -223,22 +221,21 @@ static uint32_t dw_i2c_read_ic_data_cmd(DesignWareI2CState *s)\n return 0;\n }\n \n- s->rx_cur = (s->rx_cur + 1) % DESIGNWARE_I2C_RX_FIFO_SIZE;\n+ g_assert(s->ic_rxflr == fifo8_num_used(&s->rx_fifo));\n \n- if (s->ic_rxflr > 0) {\n- s->ic_rxflr--;\n- } else {\n+ if (fifo8_is_empty(&s->rx_fifo)) {\n s->ic_raw_intr_stat |= DW_IC_INTR_RX_UNDER;\n dw_i2c_update_irq(s);\n return 0;\n }\n \n+ s->ic_rxflr--;\n if (s->ic_rxflr <= s->ic_rx_tl) {\n s->ic_raw_intr_stat &= ~DW_IC_INTR_RX_FULL;\n dw_i2c_update_irq(s);\n }\n \n- return value;\n+ return fifo8_pop(&s->rx_fifo);\n }\n \n static uint64_t dw_i2c_read(void *opaque, hwaddr offset, unsigned size)\n@@ -445,6 +442,7 @@ static void dw_i2c_reset_to_idle(DesignWareI2CState *s)\n s->ic_raw_intr_stat &= ~DW_IC_INTR_RX_UNDER;\n s->ic_raw_intr_stat &= ~DW_IC_INTR_RX_OVER;\n s->ic_rxflr = 0;\n+ fifo8_reset(&s->rx_fifo);\n s->ic_status &= ~DW_IC_STATUS_ACTIVITY;\n s->status = DW_I2C_STATUS_IDLE;\n dw_i2c_update_irq(s);\n@@ -509,10 +507,10 @@ static void dw_i2c_write_ic_data_cmd(DesignWareI2CState *s, uint32_t value)\n \n /* Receive data */\n if (recv) {\n- uint8_t pos = (s->rx_cur + s->ic_rxflr) % DESIGNWARE_I2C_RX_FIFO_SIZE;\n+ g_assert(s->ic_rxflr == fifo8_num_used(&s->rx_fifo));\n \n- if (s->ic_rxflr < DESIGNWARE_I2C_RX_FIFO_SIZE) {\n- s->rx_fifo[pos] = i2c_recv(s->bus);\n+ if (!fifo8_is_full(&s->rx_fifo)) {\n+ fifo8_push(&s->rx_fifo, i2c_recv(s->bus));\n s->ic_rxflr++;\n } else {\n s->ic_raw_intr_stat |= DW_IC_INTR_RX_OVER;\n@@ -738,7 +736,8 @@ static void designware_i2c_enter_reset(Object *obj, ResetType type)\n s->ic_comp_version = DW_IC_COMP_VERSION_INIT_VAL;\n s->ic_comp_type = DW_IC_COMP_TYPE_INIT_VAL;\n \n- s->rx_cur = 0;\n+ fifo8_reset(&s->rx_fifo);\n+\n s->status = DW_I2C_STATUS_IDLE;\n }\n \n@@ -777,10 +776,8 @@ static const VMStateDescription vmstate_designware_i2c = {\n VMSTATE_UINT32(ic_comp_param_1, DesignWareI2CState),\n VMSTATE_UINT32(ic_comp_version, DesignWareI2CState),\n VMSTATE_UINT32(ic_comp_type, DesignWareI2CState),\n+ VMSTATE_FIFO8(rx_fifo, DesignWareI2CState),\n VMSTATE_UINT32(status, DesignWareI2CState),\n- VMSTATE_UINT8_ARRAY(rx_fifo, DesignWareI2CState,\n- DESIGNWARE_I2C_RX_FIFO_SIZE),\n- VMSTATE_UINT8(rx_cur, DesignWareI2CState),\n VMSTATE_END_OF_LIST(),\n },\n };\n@@ -790,6 +787,8 @@ static void designware_i2c_smbus_init(Object *obj)\n DesignWareI2CState *s = DESIGNWARE_I2C(obj);\n SysBusDevice *sbd = SYS_BUS_DEVICE(obj);\n \n+ fifo8_create(&s->rx_fifo, DESIGNWARE_I2C_RX_FIFO_SIZE);\n+\n sysbus_init_irq(sbd, &s->irq);\n \n memory_region_init_io(&s->iomem, obj, &designware_i2c_ops, s,\n@@ -799,6 +798,13 @@ static void designware_i2c_smbus_init(Object *obj)\n s->bus = i2c_init_bus(DEVICE(s), \"i2c-bus\");\n }\n \n+static void designware_i2c_finalize(Object *obj)\n+{\n+ DesignWareI2CState *s = DESIGNWARE_I2C(obj);\n+\n+ fifo8_destroy(&s->rx_fifo);\n+}\n+\n static void designware_i2c_class_init(ObjectClass *klass, const void *data)\n {\n ResettableClass *rc = RESETTABLE_CLASS(klass);\n@@ -819,6 +825,7 @@ static const TypeInfo designware_i2c_types[] = {\n .instance_size = sizeof(DesignWareI2CState),\n .class_init = designware_i2c_class_init,\n .instance_init = designware_i2c_smbus_init,\n+\t.instance_finalize = designware_i2c_finalize,\n },\n };\n DEFINE_TYPES(designware_i2c_types);\ndiff --git a/include/hw/i2c/designware_i2c.h b/include/hw/i2c/designware_i2c.h\nindex 71d74c9141..affaf983a2 100644\n--- a/include/hw/i2c/designware_i2c.h\n+++ b/include/hw/i2c/designware_i2c.h\n@@ -8,6 +8,7 @@\n #ifndef DESIGNWARE_I2C_H\n #define DESIGNWARE_I2C_H\n \n+#include \"qemu/fifo8.h\"\n #include \"hw/i2c/i2c.h\"\n #include \"hw/core/irq.h\"\n #include \"hw/core/sysbus.h\"\n@@ -53,8 +54,6 @@ typedef enum DesignWareI2CStatus {\n * @ic_comp_version: I2C component version register\n * @ic_comp_type: I2C component type register\n * @rx_fifo: The FIFO buffer for receiving in FIFO mode.\n- * @rx_cur: The current position of rx_fifo.\n- * @status: The current status of the SMBus.\n */\n typedef struct DesignWareI2CState {\n SysBusDevice parent_obj;\n@@ -88,8 +87,8 @@ typedef struct DesignWareI2CState {\n uint32_t ic_comp_version;\n uint32_t ic_comp_type;\n \n- uint8_t rx_fifo[DESIGNWARE_I2C_RX_FIFO_SIZE];\n- uint8_t rx_cur;\n+ /* fifo8_num_used(rx_fifo) should always equal ic_rxflr */\n+ Fifo8 rx_fifo;\n \n DesignWareI2CStatus status;\n } DesignWareI2CState;\n", "prefixes": [ "2/4", "RFC" ] }