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GET /api/1.2/patches/2234205/?format=api
{ "id": 2234205, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2234205/?format=api", "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260507113706.11400-10-fangyu.yu@linux.alibaba.com/", "project": { "id": 70, "url": "http://patchwork.ozlabs.org/api/1.2/projects/70/?format=api", "name": "Linux KVM RISC-V", "link_name": "kvm-riscv", "list_id": "kvm-riscv.lists.infradead.org", "list_email": "kvm-riscv@lists.infradead.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "http://lists.infradead.org/pipermail/kvm-riscv/", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260507113706.11400-10-fangyu.yu@linux.alibaba.com>", "list_archive_url": null, "date": "2026-05-07T11:37:05", "name": "[RFC,v2,09/10] iommu/riscv: Add dirty tracking support for second-stage domains", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "03ff11c377f0e6129d5131e6bb597079385e823a", "submitter": { "id": 91416, "url": "http://patchwork.ozlabs.org/api/1.2/people/91416/?format=api", "name": null, "email": "fangyu.yu@linux.alibaba.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260507113706.11400-10-fangyu.yu@linux.alibaba.com/mbox/", "series": [ { "id": 503164, "url": "http://patchwork.ozlabs.org/api/1.2/series/503164/?format=api", "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/list/?series=503164", "date": "2026-05-07T11:36:57", "name": "iommu/riscv: Add hardware dirty tracking for second-stage domains", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/503164/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2234205/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2234205/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=o4q5nEJ2;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n unprotected) header.d=linux.alibaba.com header.i=@linux.alibaba.com\n header.a=rsa-sha256 header.s=default header.b=dUNgbBRO;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20210309; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=NwpzjoAVkzu122ITdYQBiF8BP8+cugeU6GuEAjxrj+M=; b=o4q5nEJ2yx7AKh\n\t6kKnot0moUdxkDOsNQq5Pyum9+ImI8Vf9OhWmsAjYXx54E+r7zlG8RxvYhwLVjjeibvk2iQlA/eig\n\tR3tpNX6p7ms0tv53TZHYkuALmgz8TJoxvf9RNWzliX2hgBY8mLuOJyGGij9Lz+F2VwieFlZ2BqD2N\n\th9ljQWojoP7c264cK8L5O2Y67mgjuIp94LjGbvFoTtFzwqptvs3BmI9SqFTzS5Kl6kq59NsM52DFY\n\tT+NkMSy3c8608KoUnWrcv1RZVBU8JCSfb7SD8NtjT4HYvvmmWCzEQiDAUQXJtmFSW44atR9dLNvya\n\tdZh7cxLsLFfgrJ6ZtYbw==;", "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=linux.alibaba.com; s=default;\n\tt=1778153849; h=From:To:Subject:Date:Message-Id:MIME-Version;\n\tbh=ymvPBhIqjH6VI2cF6B82ob0998YC79NL7DciLWQChAk=;\n\tb=dUNgbBRO9bSMtaUG0fStJ5qFh509/7KbQpyt6mZksHhscr+wiF/dQfBSuFupao4iS+fsncOVNlvIPQ3J4hEBZ16XC1zpBKTfEzs6S01gWcYFASXEP0oGZ+dpOafEKA3qYcDzWWrAYnmy7q9wc1fpnSLp7scIJCzr53KvzbvNpV4=" ], "X-Alimail-AntiSpam": "\n AC=PASS;BC=-1|-1;BR=01201311R101e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=maildocker-contentspam033037033178;MF=fangyu.yu@linux.alibaba.com;NM=1;PH=DS;RN=24;SR=0;TI=SMTPD_---0X2UVF2E_1778153843;", "From": "fangyu.yu@linux.alibaba.com", "To": "joro@8bytes.org,\n\twill@kernel.org,\n\trobin.murphy@arm.com,\n\tpjw@kernel.org,\n\tpalmer@dabbelt.com,\n\taou@eecs.berkeley.edu,\n\talex@ghiti.fr,\n\ttjeznach@rivosinc.com,\n\tjgg@ziepe.ca,\n\tkevin.tian@intel.com,\n\tbaolu.lu@linux.intel.com,\n\tvasant.hegde@amd.com,\n\tanup@brainfault.org,\n\tatish.patra@linux.dev,\n\tskhawaja@google.com,\n\tjgg@nvidia.com", "Cc": "guoren@kernel.org,\n\tandrew.jones@oss.qualcomm.com,\n\tkvm@vger.kernel.org,\n\tiommu@lists.linux.dev,\n\tkvm-riscv@lists.infradead.org,\n\tlinux-riscv@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org,\n\tFangyu Yu <fangyu.yu@linux.alibaba.com>", "Subject": "[RFC PATCH v2 09/10] iommu/riscv: Add dirty tracking support for\n second-stage domains", "Date": "Thu, 7 May 2026 19:37:05 +0800", "Message-Id": "<20260507113706.11400-10-fangyu.yu@linux.alibaba.com>", "X-Mailer": "git-send-email 2.39.3 (Apple Git-146)", "In-Reply-To": "<20260507113706.11400-1-fangyu.yu@linux.alibaba.com>", "References": "<20260507113706.11400-1-fangyu.yu@linux.alibaba.com>", "MIME-Version": "1.0", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20260507_043732_154984_F8385525 ", "X-CRM114-Status": "GOOD ( 10.23 )", "X-Spam-Score": "-17.6 (-----------------)", "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: From: Fangyu Yu <fangyu.yu@linux.alibaba.com> Add hardware\n dirty tracking support for second-stage (iohgatp) domains used in KVM VFIO\n device pass-through. The RISC-V IOMMU can automatically set the dirty bit\n in PTEs on write access when DC.tc.GADE is set and the hardware has\n AMO_HWAD\n capability. Wire this up to the iommufd dirty tracking interface:\n Content analysis details: (-17.6 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [115.124.30.98 listed in list.dnswl.org]\n -7.5 USER_IN_DEF_DKIM_WL From: address is in the default DKIM welcome-list\n -7.5 USER_IN_DEF_SPF_WL From: address is in the default SPF welcome-list\n -0.0 SPF_PASS SPF: sender matches SPF record\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay\n lines\n -0.5 ENV_AND_HDR_SPF_MATCH Env and Hdr From used in default SPF WL Match\n -0.0 DMARC_PASS DMARC pass policy", "X-BeenThere": "kvm-riscv@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<kvm-riscv.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/kvm-riscv>,\n <mailto:kvm-riscv-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/kvm-riscv/>", "List-Post": "<mailto:kvm-riscv@lists.infradead.org>", "List-Help": "<mailto:kvm-riscv-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/kvm-riscv>,\n <mailto:kvm-riscv-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"kvm-riscv\" <kvm-riscv-bounces@lists.infradead.org>", "Errors-To": "kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "From: Fangyu Yu <fangyu.yu@linux.alibaba.com>\n\nAdd hardware dirty tracking support for second-stage (iohgatp) domains\nused in KVM VFIO device pass-through.\n\nThe RISC-V IOMMU can automatically set the dirty bit in PTEs on write\naccess when DC.tc.GADE is set and the hardware has AMO_HWAD capability.\nWire this up to the iommufd dirty tracking interface:\n\n - riscv_iommu_set_dirty_tracking(): Always enabled dirty tracking for\n second-stage domain.\n\n - riscv_iommu_dirty_ops: Exposes set_dirty_tracking and the generic\n page-table read_and_clear_dirty via IOMMU_PT_DIRTY_OPS(riscv_64).\n\n - domain_alloc_paging_flags: Assigns dirty_ops to second-stage domains\n when AMO_HWAD is advertised in hardware capabilities.\n\n - riscv_iommu_capable: Reports IOMMU_CAP_DIRTY_TRACKING when\n AMO_HWAD is present.\n\nSigned-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>\n---\n drivers/iommu/riscv/iommu.c | 21 +++++++++++++++++++++\n 1 file changed, 21 insertions(+)", "diff": "diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c\nindex 4adf2b6be89b..b7944149dcfe 100644\n--- a/drivers/iommu/riscv/iommu.c\n+++ b/drivers/iommu/riscv/iommu.c\n@@ -1249,6 +1249,21 @@ static int riscv_iommu_attach_paging_domain(struct iommu_domain *iommu_domain,\n \treturn 0;\n }\n \n+static int riscv_iommu_set_dirty_tracking(struct iommu_domain *iommu_domain,\n+\t\t\t\t\t bool enable)\n+{\n+\t/*\n+\t * Always enabled and the dirty bitmap is cleared prior to\n+\t * set_dirty_tracking().\n+\t */\n+\treturn 0;\n+}\n+\n+static const struct iommu_dirty_ops riscv_iommu_dirty_ops = {\n+\tIOMMU_PT_DIRTY_OPS(riscv_64),\n+\t.set_dirty_tracking = riscv_iommu_set_dirty_tracking,\n+};\n+\n static const struct iommu_domain_ops riscv_iommu_paging_domain_ops = {\n \tIOMMU_PT_DOMAIN_OPS(riscv_64),\n \t.attach_dev = riscv_iommu_attach_paging_domain,\n@@ -1336,6 +1351,8 @@ static struct iommu_domain *riscv_iommu_domain_alloc_paging_flags(\n \t\t\tgoto err_free;\n \t\t}\n \t\tcfg.common.features |= BIT(PT_FEAT_RISCV_S2);\n+\t\tif (iommu->caps & RISCV_IOMMU_CAPABILITIES_AMO_HWAD)\n+\t\t\tdomain->domain.dirty_ops = &riscv_iommu_dirty_ops;\n \t\tbreak;\n \tdefault:\n \t\tret = -EOPNOTSUPP;\n@@ -1411,9 +1428,13 @@ static struct iommu_group *riscv_iommu_device_group(struct device *dev)\n \n static bool riscv_iommu_capable(struct device *dev, enum iommu_cap cap)\n {\n+\tstruct riscv_iommu_device *iommu = dev_to_iommu(dev);\n+\n \tswitch (cap) {\n \tcase IOMMU_CAP_CACHE_COHERENCY:\n \t\treturn true;\n+\tcase IOMMU_CAP_DIRTY_TRACKING:\n+\t\treturn !!(iommu->caps & RISCV_IOMMU_CAPABILITIES_AMO_HWAD);\n \tdefault:\n \t\treturn false;\n \t}\n", "prefixes": [ "RFC", "v2", "09/10" ] }