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GET /api/1.2/patches/2233142/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2233142,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/2233142/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260505185028.237207-7-dblanzeanu@linux.microsoft.com/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260505185028.237207-7-dblanzeanu@linux.microsoft.com>",
    "list_archive_url": null,
    "date": "2026-05-05T18:50:27",
    "name": "[v2,6/7] target/i386/mshv: use the register page to set registers",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "a780126a45fd96f9faa826ca4fedbcf5a03fd7ab",
    "submitter": {
        "id": 93106,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/93106/?format=api",
        "name": "Doru Blânzeanu",
        "email": "dblanzeanu@linux.microsoft.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260505185028.237207-7-dblanzeanu@linux.microsoft.com/mbox/",
    "series": [
        {
            "id": 502882,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/502882/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502882",
            "date": "2026-05-05T18:50:22",
            "name": "target/i386/mshv: use hv_vp_register_page for fast register access",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/502882/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2233142/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2233142/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
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        ],
        "Received": [
            "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g970105jgz1yJx\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 06 May 2026 04:51:28 +1000 (AEST)",
            "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wKKrB-0000hT-NX; Tue, 05 May 2026 14:50:57 -0400",
            "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <dblanzeanu@linux.microsoft.com>)\n id 1wKKr7-0000gY-1N\n for qemu-devel@nongnu.org; Tue, 05 May 2026 14:50:53 -0400",
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        ],
        "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com BAFC820B716D",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1778007047;\n bh=CUZ670EjjnbwVhvkgnIWoIYxbki12CoYws+yGVyY4M0=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=KgpnVCSXikkwkUgMZt6tC4863eKM/aUfmUg1DzP3wywoiDvXkGoHMT5F5EgthWOPA\n 5U2+NYv1m0wu/3+HObMnG123rgLfFf0qdO2yOmhQjK8N6Qz/kLQ2BavhMY/j7HKqVo\n e3q8/B5qu20NZdRnCU93EQa0aCmbkoBhLvThxj9Q=",
        "From": "=?utf-8?q?Doru_Bl=C3=A2nzeanu?= <dblanzeanu@linux.microsoft.com>",
        "To": "qemu-devel@nongnu.org",
        "Cc": "=?utf-8?q?Doru_Bl=C3=A2nzeanu?= <dblanzeanu@linux.microsoft.com>,\n Magnus Kulke <magnuskulke@linux.microsoft.com>,\n Zhao Liu <zhao1.liu@intel.com>, Wei Liu <wei.liu@kernel.org>,\n Paolo Bonzini <pbonzini@redhat.com>",
        "Subject": "[PATCH v2 6/7] target/i386/mshv: use the register page to set\n registers",
        "Date": "Tue,  5 May 2026 21:50:27 +0300",
        "Message-ID": "<20260505185028.237207-7-dblanzeanu@linux.microsoft.com>",
        "X-Mailer": "git-send-email 2.53.0",
        "In-Reply-To": "<20260505185028.237207-1-dblanzeanu@linux.microsoft.com>",
        "References": "<20260505185028.237207-1-dblanzeanu@linux.microsoft.com>",
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        "X-Spam_score_int": "-19",
        "X-Spam_score": "-2.0",
        "X-Spam_bar": "--",
        "X-Spam_report": "(-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_NONE=-0.0001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no",
        "X-Spam_action": "no action",
        "X-BeenThere": "qemu-devel@nongnu.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "qemu development <qemu-devel.nongnu.org>",
        "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>",
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        "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"
    },
    "content": "Update mshv_store_regs to use the register page when it is mmapped and\nvalid to set registers.\nOtherwise use the ioctls to set the registers.\n\nSigned-off-by: Doru Blânzeanu <dblanzeanu@linux.microsoft.com>\n---\n target/i386/mshv/mshv-cpu.c | 45 +++++++++++++++++++++++++++++++++----\n 1 file changed, 41 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c\nindex c84d3f76de..0cfac26a5c 100644\n--- a/target/i386/mshv/mshv-cpu.c\n+++ b/target/i386/mshv/mshv-cpu.c\n@@ -285,14 +285,51 @@ static int set_standard_regs(const CPUState *cpu)\n     return 0;\n }\n \n+static void mshv_set_standard_regs_vp_page(CPUState *cpu)\n+{\n+    X86CPU *x86cpu = X86_CPU(cpu);\n+    CPUX86State *env = &x86cpu->env;\n+\n+    env->regs_page->rax = env->regs[R_EAX];\n+    env->regs_page->rbx = env->regs[R_EBX];\n+    env->regs_page->rcx = env->regs[R_ECX];\n+    env->regs_page->rdx = env->regs[R_EDX];\n+    env->regs_page->rsi = env->regs[R_ESI];\n+    env->regs_page->rdi = env->regs[R_EDI];\n+    env->regs_page->rsp = env->regs[R_ESP];\n+    env->regs_page->rbp = env->regs[R_EBP];\n+    env->regs_page->r8  = env->regs[R_R8];\n+    env->regs_page->r9  = env->regs[R_R9];\n+    env->regs_page->r10 = env->regs[R_R10];\n+    env->regs_page->r11 = env->regs[R_R11];\n+    env->regs_page->r12 = env->regs[R_R12];\n+    env->regs_page->r13 = env->regs[R_R13];\n+    env->regs_page->r14 = env->regs[R_R14];\n+    env->regs_page->r15 = env->regs[R_R15];\n+    env->regs_page->rip = env->eip;\n+    lflags_to_rflags(env);\n+    env->regs_page->rflags = env->eflags;\n+\n+    env->regs_page->dirty |= (1u << HV_X64_REGISTER_CLASS_GENERAL)\n+                                | (1u << HV_X64_REGISTER_CLASS_IP)\n+                                | (1u << HV_X64_REGISTER_CLASS_FLAGS);\n+}\n+\n int mshv_store_regs(CPUState *cpu)\n {\n+    X86CPU *x86cpu = X86_CPU(cpu);\n+    CPUX86State *env = &x86cpu->env;\n     int ret;\n \n-    ret = set_standard_regs(cpu);\n-    if (ret < 0) {\n-        error_report(\"Failed to store standard registers\");\n-        return -1;\n+    /* Use register vp page to optimize registers access */\n+    if (env->regs_page && env->regs_page->isvalid != 0) {\n+        mshv_set_standard_regs_vp_page(cpu);\n+    } else {\n+        ret = set_standard_regs(cpu);\n+        if (ret < 0) {\n+            error_report(\"Failed to store standard registers\");\n+            return -1;\n+        }\n     }\n \n     return 0;\n",
    "prefixes": [
        "v2",
        "6/7"
    ]
}