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GET /api/1.2/patches/2232967/?format=api
{ "id": 2232967, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2232967/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260505105928.38457-5-akhilrajeev@nvidia.com/", "project": { "id": 35, "url": "http://patchwork.ozlabs.org/api/1.2/projects/35/?format=api", "name": "Linux I2C development", "link_name": "linux-i2c", "list_id": "linux-i2c.vger.kernel.org", "list_email": "linux-i2c@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260505105928.38457-5-akhilrajeev@nvidia.com>", "list_archive_url": null, "date": "2026-05-05T10:59:28", "name": "[4/4] i2c: tegra: Fix NOIRQ suspend/resume", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "92bdfddb01f90823a71b0e09e91de876f3ae0703", "submitter": { "id": 81965, "url": "http://patchwork.ozlabs.org/api/1.2/people/81965/?format=api", "name": "Akhil R", "email": "akhilrajeev@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260505105928.38457-5-akhilrajeev@nvidia.com/mbox/", "series": [ { "id": 502818, "url": "http://patchwork.ozlabs.org/api/1.2/series/502818/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/list/?series=502818", "date": "2026-05-05T10:59:25", "name": "i2c: tegra: Improve DMA mapping, latency, and power management", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502818/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2232967/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2232967/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-i2c+bounces-17249-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-i2c@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=pPgQhWos;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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pr=C", "From": "Akhil R <akhilrajeev@nvidia.com>", "To": "Laxman Dewangan <ldewangan@nvidia.com>, Dmitry Osipenko\n\t<digetx@gmail.com>, Andi Shyti <andi.shyti@kernel.org>, Thierry Reding\n\t<thierry.reding@kernel.org>, Jonathan Hunter <jonathanh@nvidia.com>, \"Kartik\n Rajput\" <kkartik@nvidia.com>, Wolfram Sang <wsa@kernel.org>,\n\t<linux-i2c@vger.kernel.org>, <linux-tegra@vger.kernel.org>,\n\t<linux-kernel@vger.kernel.org>", "CC": "<mochs@nvidia.com>, Akhil R <akhilrajeev@nvidia.com>", "Subject": "[PATCH 4/4] i2c: tegra: Fix NOIRQ suspend/resume", "Date": "Tue, 5 May 2026 16:29:28 +0530", "Message-ID": "<20260505105928.38457-5-akhilrajeev@nvidia.com>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20260505105928.38457-1-akhilrajeev@nvidia.com>", "References": "<20260505105928.38457-1-akhilrajeev@nvidia.com>", "Precedence": "bulk", "X-Mailing-List": "linux-i2c@vger.kernel.org", "List-Id": "<linux-i2c.vger.kernel.org>", "List-Subscribe": "<mailto:linux-i2c+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-i2c+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-NVConfidentiality": "public", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL02EPF00021F6D:EE_|DS7PR12MB6048:EE_", "X-MS-Office365-Filtering-Correlation-Id": "e75c210d-5b2a-433f-85e9-08deaa95923f", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|921020|18002099003|22082099003|56012099003;", "X-Microsoft-Antispam-Message-Info": "\n\tCvDku6xbHGMdaxDlzKSjmWxUqHKppE2B77+c8bAPeyQ6SsIae5CDcaDexmiaXLTcFcC39zqTClj7e1mPQTkdiIfiJ0cq0Ja59cOuOZ7uw9NTgW0RP8PSrVErACpeP2T9OBLcWwPrJN8ep6n0Agw29dxySrFy2UC7YZOHkOgaTbW8cvz/3ZRd2JkSgLAd6n0Galf298g6D4M1s7m61E81cEQnRWxjz3xLH2ym4G9BFx/AXHWdOyEh7R+aPEvjWgJg1S6OKPeeQiKZqI9S0cBucDdMrL5WWKVe3cPB2Lfk5b9j6io9q9E3pQZtG13sVO7YxgcsJYiUM/Q2Wlg3A3EB90lp47WvBWCx/B9al3x5JEKpnTeEuvTLvUI9zbD1E/+jJW/bYfXoUJlg7reVGq2tKga/ikO/Wq9rcMNfV6zK0tDp0rd4o3e00pUzGStpCr+8p1daMTz/2U3jKV1iDhng3yfLgfTIBG4TZxyPNlw5asqHpdO7bNQGh0ZKsZ06MYdtISZJ7bYF1ewnB6tpjrD381pUIYAzimbGiHTnhQgNSX9kmafZ5T8GJB26weKgWAG+TZgYxN3AlJTQB5i/qvQjaV2qKjRPHLaOPaNrpVdfq4FO1K2n7KhbMS6yWdH78oGwkj/zLoTB5jqCoxNr7BcMxqusoVcS5WrKXjLZaNEDHDRZY7ufuzymq84PKLjH1rsr6qwu04De5kac1h0CfM3h9+Ugr3mawiG81aqFvEUS7jHdYG8KSeX7gO7a9+IFmHUR2AG8bEP9xI1FizMdS6NmZA==", "X-Forefront-Antispam-Report": "\n\tCIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700016)(376014)(921020)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\tWbD5+ZaYAP7QxvMnv2YYoG2xPlVqVXq/QlR463K2gw/vC95etL8ijBtzOy0chE+qcMok6aKICd3Cg26f2eGfNH40pDfJFvcVpMxq5PCCe9PcVpM3aM0XNzLkga3FzlkHD5dD0fIvDg23ZeyWsp10NSg70FmEshSNtaGeKVo+PG7eV3ZD4/0q+DtPOSkR6q4k2oildx8Smr9dD0fwBsu1OmspqYWxUc2q3BPtgnRCwPcZBYkXzolMnu3LFywHjRt3WXD3BDdv/oZY6n48xkUvh09Pia6BguSPAA1D9x+ePL3tgtXtnSXAthdpq4Av9BaMsuirpssrShs5x0J53wyY58YruoGdaGsVI3rw2JaUPomwJoXh1tq22J+NQsLNMGan+aiAsJEwXlZn8sujkUQiuMVZKGx2/Vr5O4CAYMv1XpAlU5R5rINKvzAGxTpLTtrp", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "05 May 2026 11:00:51.1998\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n e75c210d-5b2a-433f-85e9-08deaa95923f", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tBL02EPF00021F6D.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DS7PR12MB6048" }, "content": "The Tegra I2C driver relies on runtime PM to wake up the controller before\neach transfer. However, runtime PM is disabled between the system suspend\nand NOIRQ suspend. If an I2C device initiates a transfer during this\nwindow, the I2C controller fails to wake up and the transfer fails. To\nhandle this, the controller must be kept available for this period to\nallow transfers.\n\nRework the I2C controller's system PM callbacks such that the controller\nis resumed from runtime suspend during system suspend and it stays\nRPM_ACTIVE throughout the suspend-resume cycle until it is runtime\nsuspended back in the system resume. The clocks are disabled in NOIRQ\nsuspend and enabled back in NOIRQ resume by calling the controller's\nruntime PM functions directly.\n\nFixes: 8ebf15e9c869 (\"i2c: tegra: Move suspend handling to NOIRQ phase\")\nSigned-off-by: Akhil R <akhilrajeev@nvidia.com>\nAssisted-by: Cursor:claude-4.6-opus\n---\n drivers/i2c/busses/i2c-tegra.c | 53 +++++++++++++++++++---------------\n 1 file changed, 30 insertions(+), 23 deletions(-)", "diff": "diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c\nindex 0c26139b4721..4fee1d2d81cc 100644\n--- a/drivers/i2c/busses/i2c-tegra.c\n+++ b/drivers/i2c/busses/i2c-tegra.c\n@@ -2425,29 +2425,38 @@ static int __maybe_unused tegra_i2c_runtime_suspend(struct device *dev)\n }\n \n static int __maybe_unused tegra_i2c_suspend(struct device *dev)\n+{\n+\t/*\n+\t * Bring the controller up and hold a usage count so it stays\n+\t * available until the noirq phase.\n+\t */\n+\treturn pm_runtime_resume_and_get(dev);\n+}\n+\n+static int __maybe_unused tegra_i2c_suspend_noirq(struct device *dev)\n {\n \tstruct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev);\n-\tint err;\n \n \ti2c_mark_adapter_suspended(&i2c_dev->adapter);\n \n-\tif (!pm_runtime_status_suspended(dev)) {\n-\t\terr = tegra_i2c_runtime_suspend(dev);\n-\t\tif (err)\n-\t\t\treturn err;\n-\t}\n-\n-\treturn 0;\n+\t/*\n+\t * Runtime PM is already disabled at this point, so invoke the\n+\t * runtime_suspend callback directly to put the controller down.\n+\t */\n+\treturn tegra_i2c_runtime_suspend(dev);\n }\n \n-static int __maybe_unused tegra_i2c_resume(struct device *dev)\n+static int __maybe_unused tegra_i2c_resume_noirq(struct device *dev)\n {\n \tstruct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev);\n \tint err;\n \n \t/*\n-\t * We need to ensure that clocks are enabled so that registers can be\n-\t * restored in tegra_i2c_init().\n+\t * Runtime PM is still disabled at this point, so invoke the\n+\t * runtime_resume callback directly to bring the controller back up\n+\t * before re-initializing the hardware. The adapter is then marked\n+\t * resumed so that consumers can issue transfers from their own\n+\t * resume_noirq() handlers and onwards.\n \t */\n \terr = tegra_i2c_runtime_resume(dev);\n \tif (err)\n@@ -2457,24 +2466,22 @@ static int __maybe_unused tegra_i2c_resume(struct device *dev)\n \tif (err)\n \t\treturn err;\n \n-\t/*\n-\t * In case we are runtime suspended, disable clocks again so that we\n-\t * don't unbalance the clock reference counts during the next runtime\n-\t * resume transition.\n-\t */\n-\tif (pm_runtime_status_suspended(dev)) {\n-\t\terr = tegra_i2c_runtime_suspend(dev);\n-\t\tif (err)\n-\t\t\treturn err;\n-\t}\n-\n \ti2c_mark_adapter_resumed(&i2c_dev->adapter);\n \n \treturn 0;\n }\n \n+static int __maybe_unused tegra_i2c_resume(struct device *dev)\n+{\n+\tpm_runtime_put(dev);\n+\n+\treturn 0;\n+}\n+\n static const struct dev_pm_ops tegra_i2c_pm = {\n-\tSET_NOIRQ_SYSTEM_SLEEP_PM_OPS(tegra_i2c_suspend, tegra_i2c_resume)\n+\tSET_SYSTEM_SLEEP_PM_OPS(tegra_i2c_suspend, tegra_i2c_resume)\n+\tSET_NOIRQ_SYSTEM_SLEEP_PM_OPS(tegra_i2c_suspend_noirq,\n+\t\t\t\t tegra_i2c_resume_noirq)\n \tSET_RUNTIME_PM_OPS(tegra_i2c_runtime_suspend, tegra_i2c_runtime_resume,\n \t\t\t NULL)\n };\n", "prefixes": [ "4/4" ] }