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{
    "id": 2232861,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/2232861/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260505100523.1922388-29-vladimir.oltean@nxp.com/",
    "project": {
        "id": 42,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/42/?format=api",
        "name": "Linux GPIO development",
        "link_name": "linux-gpio",
        "list_id": "linux-gpio.vger.kernel.org",
        "list_email": "linux-gpio@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260505100523.1922388-29-vladimir.oltean@nxp.com>",
    "list_archive_url": null,
    "date": "2026-05-05T10:05:20",
    "name": "[v8,phy-next,28/31] phy: include PHY provider header (1/2)",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "9ef8416685f772f55dd750ec69a079afd4a36a85",
    "submitter": {
        "id": 75582,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/75582/?format=api",
        "name": "Vladimir Oltean",
        "email": "vladimir.oltean@nxp.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260505100523.1922388-29-vladimir.oltean@nxp.com/mbox/",
    "series": [
        {
            "id": 502803,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/502803/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=502803",
            "date": "2026-05-05T10:04:53",
            "name": "Split Generic PHY consumer and provider API",
            "version": 8,
            "mbox": "http://patchwork.ozlabs.org/series/502803/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2232861/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2232861/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Vladimir Oltean <vladimir.oltean@nxp.com>",
        "To": "linux-phy@lists.infradead.org",
        "Cc": "Vinod Koul <vkoul@kernel.org>,\n\tNeil Armstrong <neil.armstrong@linaro.org>,\n\tdri-devel@lists.freedesktop.org,\n\tfreedreno@lists.freedesktop.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-arm-msm@vger.kernel.org,\n\tlinux-can@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org,\n\tlinux-ide@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-media@vger.kernel.org,\n\tlinux-pci@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tlinux-riscv@lists.infradead.org,\n\tlinux-rockchip@lists.infradead.org,\n\tlinux-samsung-soc@vger.kernel.org,\n\tlinux-scsi@vger.kernel.org,\n\tlinux-sunxi@lists.linux.dev,\n\tlinux-tegra@vger.kernel.org,\n\tlinux-usb@vger.kernel.org,\n\tnetdev@vger.kernel.org,\n\tspacemit@lists.linux.dev,\n\tUNGLinuxDriver@microchip.com,\n\tChen-Yu Tsai <wens@kernel.org>",
        "Subject": "[PATCH v8 phy-next 28/31] phy: include PHY provider header (1/2)",
        "Date": "Tue,  5 May 2026 13:05:20 +0300",
        "Message-Id": "<20260505100523.1922388-29-vladimir.oltean@nxp.com>",
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    "content": "The majority of PHY drivers are PHY providers (obviously).\n\nSome are providers *and* consumers (phy-meson-axg-mipi-dphy,\nphy-meson-axg-pcie). These are the Amlogic AXG SoCs, which split the\nphysical layer into two chained PHYs: the digital layer and the analog\nlayer. The DSI or PCIe controller interacts only with the digital PHY,\npresumably for simplicity.\n\nThe rest of PHY drivers which include <linux/phy/phy.h> do so because\nthey call phy_pm_runtime_*(), phy_get_bus_width() or phy_get_mode(),\nnominally consumer functions.\n\nSigned-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>\nAcked-by: Chen-Yu Tsai <wens@kernel.org> # allwinner\n---\nv7->v8:\n- do not include <linux/phy/phy.h> for phy_set_bus_width(); this is\n  actually considered a provider function now\n- mention phy_pm_runtime_*(), phy_get_bus_width() and phy_get_mode() as\n  the actual reason for including the <linux/phy/phy.h> consumer header\n- add more comments for reasons why <linux/phy/phy.h> is included\nv6->v7: removed conflict resolution details, conflicting patches are now\n        in linux-phy/next\nv3->v6: none\nv2->v3: add conflict resolution details\nv1->v2: split in two parts to pass through linux-phy mailing list\nmoderation\n---\n drivers/phy/allwinner/phy-sun4i-usb.c                 | 3 ++-\n drivers/phy/allwinner/phy-sun50i-usb3.c               | 3 ++-\n drivers/phy/allwinner/phy-sun6i-mipi-dphy.c           | 4 ++--\n drivers/phy/allwinner/phy-sun9i-usb.c                 | 3 ++-\n drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c         | 2 ++\n drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c  | 3 ++-\n drivers/phy/amlogic/phy-meson-axg-pcie.c              | 2 ++\n drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c | 3 ++-\n drivers/phy/amlogic/phy-meson-g12a-usb2.c             | 3 ++-\n drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c        | 3 ++-\n drivers/phy/amlogic/phy-meson-gxl-usb2.c              | 3 ++-\n drivers/phy/amlogic/phy-meson8-hdmi-tx.c              | 3 ++-\n drivers/phy/amlogic/phy-meson8b-usb2.c                | 3 ++-\n drivers/phy/apple/atc.c                               | 3 ++-\n drivers/phy/broadcom/phy-bcm-cygnus-pcie.c            | 3 ++-\n drivers/phy/broadcom/phy-bcm-kona-usb2.c              | 3 ++-\n drivers/phy/broadcom/phy-bcm-ns-usb2.c                | 3 ++-\n drivers/phy/broadcom/phy-bcm-ns-usb3.c                | 3 ++-\n drivers/phy/broadcom/phy-bcm-ns2-pcie.c               | 3 ++-\n drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c             | 3 ++-\n drivers/phy/broadcom/phy-bcm-sr-pcie.c                | 3 ++-\n drivers/phy/broadcom/phy-bcm-sr-usb.c                 | 3 ++-\n drivers/phy/broadcom/phy-bcm63xx-usbh.c               | 3 ++-\n drivers/phy/broadcom/phy-brcm-sata.c                  | 3 ++-\n drivers/phy/broadcom/phy-brcm-usb.c                   | 2 +-\n drivers/phy/cadence/cdns-dphy-rx.c                    | 3 ++-\n drivers/phy/cadence/cdns-dphy.c                       | 4 ++--\n drivers/phy/cadence/phy-cadence-salvo.c               | 3 ++-\n drivers/phy/cadence/phy-cadence-sierra.c              | 3 ++-\n drivers/phy/cadence/phy-cadence-torrent.c             | 3 ++-\n drivers/phy/canaan/phy-k230-usb.c                     | 3 ++-\n drivers/phy/eswin/phy-eic7700-sata.c                  | 3 ++-\n drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c        | 3 ++-\n drivers/phy/freescale/phy-fsl-imx8m-pcie.c            | 4 ++--\n drivers/phy/freescale/phy-fsl-imx8mq-usb.c            | 3 ++-\n drivers/phy/freescale/phy-fsl-imx8qm-hsio.c           | 6 +++---\n drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c       | 3 ++-\n drivers/phy/freescale/phy-fsl-lynx-28g.c              | 3 ++-\n drivers/phy/hisilicon/phy-hi3660-usb3.c               | 3 ++-\n drivers/phy/hisilicon/phy-hi3670-pcie.c               | 3 ++-\n drivers/phy/hisilicon/phy-hi3670-usb3.c               | 3 ++-\n drivers/phy/hisilicon/phy-hi6220-usb.c                | 3 ++-\n drivers/phy/hisilicon/phy-hisi-inno-usb2.c            | 3 ++-\n drivers/phy/hisilicon/phy-histb-combphy.c             | 3 ++-\n drivers/phy/hisilicon/phy-hix5hd2-sata.c              | 3 ++-\n drivers/phy/ingenic/phy-ingenic-usb.c                 | 3 ++-\n drivers/phy/intel/phy-intel-keembay-emmc.c            | 3 ++-\n drivers/phy/intel/phy-intel-keembay-usb.c             | 3 ++-\n drivers/phy/intel/phy-intel-lgm-combo.c               | 4 ++--\n drivers/phy/intel/phy-intel-lgm-emmc.c                | 3 ++-\n drivers/phy/lantiq/phy-lantiq-rcu-usb2.c              | 3 ++-\n drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c           | 4 ++--\n drivers/phy/marvell/phy-armada375-usb2.c              | 3 ++-\n drivers/phy/marvell/phy-armada38x-comphy.c            | 3 ++-\n drivers/phy/marvell/phy-berlin-sata.c                 | 3 ++-\n drivers/phy/marvell/phy-berlin-usb.c                  | 3 ++-\n drivers/phy/marvell/phy-mmp3-hsic.c                   | 3 ++-\n drivers/phy/marvell/phy-mmp3-usb.c                    | 3 ++-\n drivers/phy/marvell/phy-mvebu-a3700-comphy.c          | 3 ++-\n drivers/phy/marvell/phy-mvebu-a3700-utmi.c            | 3 ++-\n drivers/phy/marvell/phy-mvebu-cp110-comphy.c          | 3 ++-\n drivers/phy/marvell/phy-mvebu-cp110-utmi.c            | 3 ++-\n drivers/phy/marvell/phy-mvebu-sata.c                  | 3 ++-\n drivers/phy/marvell/phy-pxa-28nm-hsic.c               | 3 ++-\n drivers/phy/marvell/phy-pxa-28nm-usb2.c               | 3 ++-\n drivers/phy/marvell/phy-pxa-usb.c                     | 3 ++-\n drivers/phy/mediatek/phy-mtk-dp.c                     | 3 ++-\n drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c            | 1 -\n drivers/phy/mediatek/phy-mtk-hdmi.h                   | 3 ++-\n drivers/phy/mediatek/phy-mtk-mipi-csi-0-5.c           | 2 +-\n drivers/phy/mediatek/phy-mtk-mipi-dsi.h               | 3 ++-\n drivers/phy/mediatek/phy-mtk-pcie.c                   | 2 +-\n drivers/phy/mediatek/phy-mtk-tphy.c                   | 2 +-\n drivers/phy/mediatek/phy-mtk-ufs.c                    | 2 +-\n drivers/phy/mediatek/phy-mtk-xfi-tphy.c               | 2 +-\n drivers/phy/mediatek/phy-mtk-xsphy.c                  | 2 +-\n drivers/phy/microchip/lan966x_serdes.c                | 4 ++--\n drivers/phy/microchip/sparx5_serdes.c                 | 2 +-\n drivers/phy/motorola/phy-cpcap-usb.c                  | 3 ++-\n drivers/phy/motorola/phy-mapphone-mdm6600.c           | 4 +++-\n drivers/phy/mscc/phy-ocelot-serdes.c                  | 3 ++-\n drivers/phy/nuvoton/phy-ma35d1-usb2.c                 | 3 ++-\n drivers/phy/phy-airoha-pcie.c                         | 2 +-\n drivers/phy/phy-can-transceiver.c                     | 3 ++-\n drivers/phy/phy-core-mipi-dphy.c                      | 4 ++--\n drivers/phy/phy-core.c                                | 2 ++\n drivers/phy/phy-google-usb.c                          | 3 ++-\n drivers/phy/phy-lpc18xx-usb-otg.c                     | 3 ++-\n drivers/phy/phy-nxp-ptn3222.c                         | 3 ++-\n drivers/phy/phy-pistachio-usb.c                       | 4 ++--\n drivers/phy/phy-snps-eusb2.c                          | 2 ++\n drivers/phy/phy-xgene.c                               | 3 ++-\n 92 files changed, 175 insertions(+), 98 deletions(-)",
    "diff": "diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c\nindex e2fbf8ccf99e..9a03b5944b98 100644\n--- a/drivers/phy/allwinner/phy-sun4i-usb.c\n+++ b/drivers/phy/allwinner/phy-sun4i-usb.c\n@@ -23,7 +23,6 @@\n #include <linux/module.h>\n #include <linux/mutex.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/phy/phy-sun4i-usb.h>\n #include <linux/platform_device.h>\n #include <linux/power_supply.h>\n@@ -33,6 +32,8 @@\n #include <linux/usb/of.h>\n #include <linux/workqueue.h>\n \n+#include \"../phy-provider.h\"\n+\n #define REG_ISCR\t\t\t0x00\n #define REG_PHYCTL_A10\t\t\t0x04\n #define REG_PHYBIST\t\t\t0x08\ndiff --git a/drivers/phy/allwinner/phy-sun50i-usb3.c b/drivers/phy/allwinner/phy-sun50i-usb3.c\nindex 363f9a0df503..d38b26e4bf95 100644\n--- a/drivers/phy/allwinner/phy-sun50i-usb3.c\n+++ b/drivers/phy/allwinner/phy-sun50i-usb3.c\n@@ -18,10 +18,11 @@\n #include <linux/io.h>\n #include <linux/mod_devicetable.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/reset.h>\n \n+#include \"../phy-provider.h\"\n+\n /* Interface Status and Control Registers */\n #define SUNXI_ISCR\t\t\t0x00\n #define SUNXI_PIPE_CLOCK_CONTROL\t0x14\ndiff --git a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c\nindex 36eab95271b2..e96162d078eb 100644\n--- a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c\n+++ b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c\n@@ -10,12 +10,12 @@\n #include <linux/clk.h>\n #include <linux/module.h>\n #include <linux/of_address.h>\n+#include <linux/phy/phy-mipi-dphy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n \n-#include <linux/phy/phy.h>\n-#include <linux/phy/phy-mipi-dphy.h>\n+#include \"../phy-provider.h\"\n \n #define SUN6I_DPHY_GCTL_REG\t\t0x00\n #define SUN6I_DPHY_GCTL_LANE_NUM(n)\t\t((((n) - 1) & 3) << 4)\ndiff --git a/drivers/phy/allwinner/phy-sun9i-usb.c b/drivers/phy/allwinner/phy-sun9i-usb.c\nindex 2f9e60c188b8..f667f3f4b307 100644\n--- a/drivers/phy/allwinner/phy-sun9i-usb.c\n+++ b/drivers/phy/allwinner/phy-sun9i-usb.c\n@@ -15,11 +15,12 @@\n #include <linux/err.h>\n #include <linux/io.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/usb/of.h>\n #include <linux/platform_device.h>\n #include <linux/reset.h>\n \n+#include \"../phy-provider.h\"\n+\n #define SUNXI_AHB_INCR16_BURST_EN\tBIT(11)\n #define SUNXI_AHB_INCR8_BURST_EN\tBIT(10)\n #define SUNXI_AHB_INCR4_BURST_EN\tBIT(9)\ndiff --git a/drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c b/drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c\nindex c4a56b9d3289..60d17973a38f 100644\n--- a/drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c\n+++ b/drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c\n@@ -20,6 +20,8 @@\n #include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n /* [31] soft reset for the phy.\n  *\t\t1: reset. 0: dessert the reset.\n  * [30] clock lane soft reset.\ndiff --git a/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c b/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c\nindex c0ba2852dbb8..21e8e2a5563a 100644\n--- a/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c\n+++ b/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c\n@@ -7,7 +7,6 @@\n #include <linux/bitfield.h>\n #include <linux/bitops.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/regmap.h>\n #include <linux/delay.h>\n #include <linux/mfd/syscon.h>\n@@ -15,6 +14,8 @@\n #include <linux/platform_device.h>\n #include <dt-bindings/phy/phy.h>\n \n+#include \"../phy-provider.h\"\n+\n #define HHI_MIPI_CNTL0 0x00\n #define\t\tHHI_MIPI_CNTL0_COMMON_BLOCK\tGENMASK(31, 28)\n #define\t\tHHI_MIPI_CNTL0_ENABLE\t\tBIT(29)\ndiff --git a/drivers/phy/amlogic/phy-meson-axg-pcie.c b/drivers/phy/amlogic/phy-meson-axg-pcie.c\nindex 14dee73f9cb5..c4d9faf3a805 100644\n--- a/drivers/phy/amlogic/phy-meson-axg-pcie.c\n+++ b/drivers/phy/amlogic/phy-meson-axg-pcie.c\n@@ -13,6 +13,8 @@\n #include <linux/bitfield.h>\n #include <dt-bindings/phy/phy.h>\n \n+#include \"../phy-provider.h\"\n+\n #define MESON_PCIE_REG0 0x00\n #define\t\tMESON_PCIE_COMMON_CLK\tBIT(4)\n #define\t\tMESON_PCIE_PORT_SEL\tGENMASK(3, 2)\ndiff --git a/drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c b/drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c\nindex 46e5f7e7eb6c..11626f4528dd 100644\n--- a/drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c\n+++ b/drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c\n@@ -9,7 +9,6 @@\n #include <linux/bitfield.h>\n #include <linux/bitops.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/regmap.h>\n #include <linux/delay.h>\n #include <linux/mfd/syscon.h>\n@@ -17,6 +16,8 @@\n #include <linux/platform_device.h>\n #include <dt-bindings/phy/phy.h>\n \n+#include \"../phy-provider.h\"\n+\n #define HHI_MIPI_CNTL0 0x00\n #define\t\tHHI_MIPI_CNTL0_DIF_REF_CTL1\tGENMASK(31, 16)\n #define\t\tHHI_MIPI_CNTL0_DIF_REF_CTL0\tGENMASK(15, 0)\ndiff --git a/drivers/phy/amlogic/phy-meson-g12a-usb2.c b/drivers/phy/amlogic/phy-meson-g12a-usb2.c\nindex 66bf0b7ef8ed..f82266b76a5e 100644\n--- a/drivers/phy/amlogic/phy-meson-g12a-usb2.c\n+++ b/drivers/phy/amlogic/phy-meson-g12a-usb2.c\n@@ -17,9 +17,10 @@\n #include <linux/of.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n #define PHY_CTRL_R0\t\t\t\t\t\t0x0\n #define PHY_CTRL_R1\t\t\t\t\t\t0x4\n #define PHY_CTRL_R2\t\t\t\t\t\t0x8\ndiff --git a/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c b/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c\nindex 5468831d6ab9..60e9c3c1c449 100644\n--- a/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c\n+++ b/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c\n@@ -12,12 +12,13 @@\n #include <linux/clk.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n #include <linux/platform_device.h>\n #include <dt-bindings/phy/phy.h>\n \n+#include \"../phy-provider.h\"\n+\n #define PHY_R0\t\t\t\t\t\t\t0x00\n \t#define PHY_R0_PCIE_POWER_STATE\t\t\t\tGENMASK(4, 0)\n \t#define PHY_R0_PCIE_USB3_SWITCH\t\t\t\tGENMASK(6, 5)\ndiff --git a/drivers/phy/amlogic/phy-meson-gxl-usb2.c b/drivers/phy/amlogic/phy-meson-gxl-usb2.c\nindex 6b390304f723..b8d5b12cffc8 100644\n--- a/drivers/phy/amlogic/phy-meson-gxl-usb2.c\n+++ b/drivers/phy/amlogic/phy-meson-gxl-usb2.c\n@@ -12,9 +12,10 @@\n #include <linux/module.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n /* bits [31:27] are read-only */\n #define U2P_R0\t\t\t\t\t\t\t0x0\n \t#define U2P_R0_BYPASS_SEL\t\t\t\tBIT(0)\ndiff --git a/drivers/phy/amlogic/phy-meson8-hdmi-tx.c b/drivers/phy/amlogic/phy-meson8-hdmi-tx.c\nindex 2617f7f6c2ec..2a8c93dcda7e 100644\n--- a/drivers/phy/amlogic/phy-meson8-hdmi-tx.c\n+++ b/drivers/phy/amlogic/phy-meson8-hdmi-tx.c\n@@ -11,11 +11,12 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/property.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n /*\n  * Unfortunately there is no detailed documentation available for the\n  * HHI_HDMI_PHY_CNTL0 register. CTL0 and CTL1 is all we know about.\ndiff --git a/drivers/phy/amlogic/phy-meson8b-usb2.c b/drivers/phy/amlogic/phy-meson8b-usb2.c\nindex a553231a9f7c..b288868b2d9e 100644\n--- a/drivers/phy/amlogic/phy-meson8b-usb2.c\n+++ b/drivers/phy/amlogic/phy-meson8b-usb2.c\n@@ -14,10 +14,11 @@\n #include <linux/property.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/usb/of.h>\n \n+#include \"../phy-provider.h\"\n+\n #define REG_CONFIG\t\t\t\t\t0x00\n \t#define REG_CONFIG_CLK_EN\t\t\tBIT(0)\n \t#define REG_CONFIG_CLK_SEL_MASK\t\t\tGENMASK(3, 1)\ndiff --git a/drivers/phy/apple/atc.c b/drivers/phy/apple/atc.c\nindex e9d106f135c5..de9453d13c0e 100644\n--- a/drivers/phy/apple/atc.c\n+++ b/drivers/phy/apple/atc.c\n@@ -32,7 +32,6 @@\n #include <linux/mutex.h>\n #include <linux/of.h>\n #include <linux/of_device.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/reset-controller.h>\n #include <linux/soc/apple/tunable.h>\n@@ -44,6 +43,8 @@\n #include <linux/usb/typec_mux.h>\n #include <linux/usb/typec_tbt.h>\n \n+#include \"../phy-provider.h\"\n+\n #define AUSPLL_FSM_CTRL 0x1014\n \n #define AUSPLL_APB_CMD_OVERRIDE 0x2000\ndiff --git a/drivers/phy/broadcom/phy-bcm-cygnus-pcie.c b/drivers/phy/broadcom/phy-bcm-cygnus-pcie.c\nindex 462c61a24ec5..e10274f53c10 100644\n--- a/drivers/phy/broadcom/phy-bcm-cygnus-pcie.c\n+++ b/drivers/phy/broadcom/phy-bcm-cygnus-pcie.c\n@@ -5,9 +5,10 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n #define PCIE_CFG_OFFSET         0x00\n #define PCIE1_PHY_IDDQ_SHIFT    10\n #define PCIE0_PHY_IDDQ_SHIFT    2\ndiff --git a/drivers/phy/broadcom/phy-bcm-kona-usb2.c b/drivers/phy/broadcom/phy-bcm-kona-usb2.c\nindex e9cc5f2cb89a..7962419b476f 100644\n--- a/drivers/phy/broadcom/phy-bcm-kona-usb2.c\n+++ b/drivers/phy/broadcom/phy-bcm-kona-usb2.c\n@@ -12,9 +12,10 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n #define OTGCTL\t\t\t(0)\n #define OTGCTL_OTGSTAT2\t\tBIT(31)\n #define OTGCTL_OTGSTAT1\t\tBIT(30)\ndiff --git a/drivers/phy/broadcom/phy-bcm-ns-usb2.c b/drivers/phy/broadcom/phy-bcm-ns-usb2.c\nindex c5d35031b398..95331d08b367 100644\n--- a/drivers/phy/broadcom/phy-bcm-ns-usb2.c\n+++ b/drivers/phy/broadcom/phy-bcm-ns-usb2.c\n@@ -13,11 +13,12 @@\n #include <linux/module.h>\n #include <linux/of_address.h>\n #include <linux/of_platform.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <linux/slab.h>\n \n+#include \"../phy-provider.h\"\n+\n struct bcm_ns_usb2 {\n \tstruct device *dev;\n \tstruct clk *ref_clk;\ndiff --git a/drivers/phy/broadcom/phy-bcm-ns-usb3.c b/drivers/phy/broadcom/phy-bcm-ns-usb3.c\nindex 6e56498d0644..f2aa4014f197 100644\n--- a/drivers/phy/broadcom/phy-bcm-ns-usb3.c\n+++ b/drivers/phy/broadcom/phy-bcm-ns-usb3.c\n@@ -19,10 +19,11 @@\n #include <linux/of.h>\n #include <linux/of_address.h>\n #include <linux/platform_device.h>\n-#include <linux/phy/phy.h>\n #include <linux/property.h>\n #include <linux/slab.h>\n \n+#include \"../phy-provider.h\"\n+\n #define BCM_NS_USB3_PHY_BASE_ADDR_REG\t0x1f\n #define BCM_NS_USB3_PHY_PLL30_BLOCK\t0x8000\n #define BCM_NS_USB3_PHY_TX_PMD_BLOCK\t0x8040\ndiff --git a/drivers/phy/broadcom/phy-bcm-ns2-pcie.c b/drivers/phy/broadcom/phy-bcm-ns2-pcie.c\nindex 67a6ae5ecba0..9c2c603426ca 100644\n--- a/drivers/phy/broadcom/phy-bcm-ns2-pcie.c\n+++ b/drivers/phy/broadcom/phy-bcm-ns2-pcie.c\n@@ -6,7 +6,8 @@\n #include <linux/of_mdio.h>\n #include <linux/mdio.h>\n #include <linux/phy.h>\n-#include <linux/phy/phy.h>\n+\n+#include \"../phy-provider.h\"\n \n #define BLK_ADDR_REG_OFFSET\t0x1f\n #define PLL_AFE1_100MHZ_BLK\t0x2100\ndiff --git a/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c b/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c\nindex 8473fa574529..7543211fb998 100644\n--- a/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c\n+++ b/drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c\n@@ -14,12 +14,13 @@\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/of_address.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <linux/slab.h>\n #include <linux/workqueue.h>\n \n+#include \"../phy-provider.h\"\n+\n #define ICFG_DRD_AFE\t\t0x0\n #define ICFG_MISC_STAT\t\t0x18\n #define ICFG_DRD_P0CTL\t\t0x1C\ndiff --git a/drivers/phy/broadcom/phy-bcm-sr-pcie.c b/drivers/phy/broadcom/phy-bcm-sr-pcie.c\nindex 706e1d83b4ce..8f4e44d1dea6 100644\n--- a/drivers/phy/broadcom/phy-bcm-sr-pcie.c\n+++ b/drivers/phy/broadcom/phy-bcm-sr-pcie.c\n@@ -9,10 +9,11 @@\n #include <linux/module.h>\n #include <linux/mfd/syscon.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n /* we have up to 8 PAXB based RC. The 9th one is always PAXC */\n #define SR_NR_PCIE_PHYS               9\n #define SR_PAXC_PHY_IDX               (SR_NR_PCIE_PHYS - 1)\ndiff --git a/drivers/phy/broadcom/phy-bcm-sr-usb.c b/drivers/phy/broadcom/phy-bcm-sr-usb.c\nindex 6bcfe83609c8..4c863738bdca 100644\n--- a/drivers/phy/broadcom/phy-bcm-sr-usb.c\n+++ b/drivers/phy/broadcom/phy-bcm-sr-usb.c\n@@ -8,9 +8,10 @@\n #include <linux/iopoll.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n enum bcm_usb_phy_version {\n \tBCM_SR_USB_COMBO_PHY,\n \tBCM_SR_USB_HS_PHY,\ndiff --git a/drivers/phy/broadcom/phy-bcm63xx-usbh.c b/drivers/phy/broadcom/phy-bcm63xx-usbh.c\nindex 29fd6791bae6..63099da486c6 100644\n--- a/drivers/phy/broadcom/phy-bcm63xx-usbh.c\n+++ b/drivers/phy/broadcom/phy-bcm63xx-usbh.c\n@@ -18,10 +18,11 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/reset.h>\n \n+#include \"../phy-provider.h\"\n+\n /* USBH control register offsets */\n enum usbh_regs {\n \tUSBH_BRT_CONTROL1 = 0,\ndiff --git a/drivers/phy/broadcom/phy-brcm-sata.c b/drivers/phy/broadcom/phy-brcm-sata.c\nindex fb69e21a0292..ab826f9c8678 100644\n--- a/drivers/phy/broadcom/phy-brcm-sata.c\n+++ b/drivers/phy/broadcom/phy-brcm-sata.c\n@@ -13,9 +13,10 @@\n #include <linux/kernel.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n #define SATA_PCB_BANK_OFFSET\t\t\t\t0x23c\n #define SATA_PCB_REG_OFFSET(ofs)\t\t\t((ofs) * 4)\n \ndiff --git a/drivers/phy/broadcom/phy-brcm-usb.c b/drivers/phy/broadcom/phy-brcm-usb.c\nindex 59d756a10d6c..d660a0ed03ee 100644\n--- a/drivers/phy/broadcom/phy-brcm-usb.c\n+++ b/drivers/phy/broadcom/phy-brcm-usb.c\n@@ -11,7 +11,6 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/interrupt.h>\n #include <linux/soc/brcmstb/brcmstb.h>\n@@ -19,6 +18,7 @@\n #include <linux/mfd/syscon.h>\n #include <linux/suspend.h>\n \n+#include \"../phy-provider.h\"\n #include \"phy-brcm-usb-init.h\"\n \n static DEFINE_MUTEX(sysfs_lock);\ndiff --git a/drivers/phy/cadence/cdns-dphy-rx.c b/drivers/phy/cadence/cdns-dphy-rx.c\nindex 3ac80141189c..7097ac17443f 100644\n--- a/drivers/phy/cadence/cdns-dphy-rx.c\n+++ b/drivers/phy/cadence/cdns-dphy-rx.c\n@@ -9,12 +9,13 @@\n #include <linux/iopoll.h>\n #include <linux/mod_devicetable.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/phy/phy-mipi-dphy.h>\n #include <linux/platform_device.h>\n #include <linux/pm_runtime.h>\n #include <linux/sys_soc.h>\n \n+#include \"../phy-provider.h\"\n+\n #define DPHY_PMA_CMN(reg)\t\t(reg)\n #define DPHY_PCS(reg)\t\t\t(0xb00 + (reg))\n #define DPHY_ISO(reg)\t\t\t(0xc00 + (reg))\ndiff --git a/drivers/phy/cadence/cdns-dphy.c b/drivers/phy/cadence/cdns-dphy.c\nindex d5b0e516b93c..40bc18405082 100644\n--- a/drivers/phy/cadence/cdns-dphy.c\n+++ b/drivers/phy/cadence/cdns-dphy.c\n@@ -10,11 +10,11 @@\n #include <linux/iopoll.h>\n #include <linux/module.h>\n #include <linux/of.h>\n+#include <linux/phy/phy-mipi-dphy.h>\n #include <linux/platform_device.h>\n #include <linux/reset.h>\n \n-#include <linux/phy/phy.h>\n-#include <linux/phy/phy-mipi-dphy.h>\n+#include \"../phy-provider.h\"\n \n #define REG_WAKEUP_TIME_NS\t\t800\n #define DPHY_PLL_RATE_HZ\t\t108000000\ndiff --git a/drivers/phy/cadence/phy-cadence-salvo.c b/drivers/phy/cadence/phy-cadence-salvo.c\nindex f461585c84c6..8ed74db50dfa 100644\n--- a/drivers/phy/cadence/phy-cadence-salvo.c\n+++ b/drivers/phy/cadence/phy-cadence-salvo.c\n@@ -10,12 +10,13 @@\n #include <linux/clk.h>\n #include <linux/io.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/delay.h>\n #include <linux/of.h>\n #include <linux/of_platform.h>\n \n+#include \"../phy-provider.h\"\n+\n #define USB3_PHY_OFFSET\t\t\t0x0\n #define USB2_PHY_OFFSET\t\t\t0x38000\n /* USB3 PHY register definition */\ndiff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c\nindex 92ab1a31646a..fb44b8fc5e3f 100644\n--- a/drivers/phy/cadence/phy-cadence-sierra.c\n+++ b/drivers/phy/cadence/phy-cadence-sierra.c\n@@ -12,7 +12,6 @@\n #include <linux/err.h>\n #include <linux/io.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/pm_runtime.h>\n #include <linux/regmap.h>\n@@ -23,6 +22,8 @@\n #include <dt-bindings/phy/phy.h>\n #include <dt-bindings/phy/phy-cadence.h>\n \n+#include \"../phy-provider.h\"\n+\n #define NUM_SSC_MODE\t\t3\n #define NUM_PHY_TYPE\t\t5\n \ndiff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c\nindex d446a0f97688..974e12e34ae1 100644\n--- a/drivers/phy/cadence/phy-cadence-torrent.c\n+++ b/drivers/phy/cadence/phy-cadence-torrent.c\n@@ -17,11 +17,12 @@\n #include <linux/kernel.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/reset.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n #define REF_CLK_19_2MHZ\t\t19200000\n #define REF_CLK_25MHZ\t\t25000000\n #define REF_CLK_100MHZ\t\t100000000\ndiff --git a/drivers/phy/canaan/phy-k230-usb.c b/drivers/phy/canaan/phy-k230-usb.c\nindex 52dad35fc6cf..4305763a5456 100644\n--- a/drivers/phy/canaan/phy-k230-usb.c\n+++ b/drivers/phy/canaan/phy-k230-usb.c\n@@ -8,9 +8,10 @@\n #include <linux/bitfield.h>\n #include <linux/io.h>\n #include <linux/of_address.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n #define MAX_PHYS\t\t2\n \n /* Register offsets within the HiSysConfig system controller */\ndiff --git a/drivers/phy/eswin/phy-eic7700-sata.c b/drivers/phy/eswin/phy-eic7700-sata.c\nindex c33653d48daa..387d5c8c11d9 100644\n--- a/drivers/phy/eswin/phy-eic7700-sata.c\n+++ b/drivers/phy/eswin/phy-eic7700-sata.c\n@@ -14,11 +14,12 @@\n #include <linux/io.h>\n #include <linux/kernel.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n \n+#include \"../phy-provider.h\"\n+\n #define SATA_AXI_LP_CTRL\t\t\t0x08\n #define SATA_MPLL_CTRL\t\t\t\t0x20\n #define SATA_P0_PHY_STAT\t\t\t0x24\ndiff --git a/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c b/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c\nindex 0928a526e2ab..314aa227f753 100644\n--- a/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c\n+++ b/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c\n@@ -16,11 +16,12 @@\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/of_platform.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <dt-bindings/firmware/imx/rsrc.h>\n \n+#include \"../phy-provider.h\"\n+\n /* Control and Status Registers(CSR) */\n #define PHY_CTRL\t\t\t0x00\n #define  CCM_MASK\t\t\tGENMASK(7, 5)\ndiff --git a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c\nindex 7f5600103a00..6197cfc9b9a4 100644\n--- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c\n+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c\n@@ -3,6 +3,7 @@\n  * Copyright 2021 NXP\n  */\n \n+#include <dt-bindings/phy/phy-imx8-pcie.h>\n #include <linux/bitfield.h>\n #include <linux/clk.h>\n #include <linux/delay.h>\n@@ -12,12 +13,11 @@\n #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n \n-#include <dt-bindings/phy/phy-imx8-pcie.h>\n+#include \"../phy-provider.h\"\n \n #define IMX8MM_PCIE_PHY_CMN_REG061\t0x184\n #define  ANA_PLL_CLK_OUT_TO_EXT_IO_EN\tBIT(0)\ndiff --git a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c\nindex b05d80e849a1..9b938b446996 100644\n--- a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c\n+++ b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c\n@@ -7,11 +7,12 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regulator/consumer.h>\n #include <linux/usb/typec_mux.h>\n \n+#include \"../phy-provider.h\"\n+\n #define PHY_CTRL0\t\t\t0x0\n #define PHY_CTRL0_REF_SSP_EN\t\tBIT(2)\n #define PHY_CTRL0_FSEL_MASK\t\tGENMASK(10, 5)\ndiff --git a/drivers/phy/freescale/phy-fsl-imx8qm-hsio.c b/drivers/phy/freescale/phy-fsl-imx8qm-hsio.c\nindex 279b8ac7822d..b274fd24b59a 100644\n--- a/drivers/phy/freescale/phy-fsl-imx8qm-hsio.c\n+++ b/drivers/phy/freescale/phy-fsl-imx8qm-hsio.c\n@@ -3,6 +3,8 @@\n  * Copyright 2024 NXP\n  */\n \n+#include <dt-bindings/phy/phy.h>\n+#include <dt-bindings/phy/phy-imx8-pcie.h>\n #include <linux/bitfield.h>\n #include <linux/clk.h>\n #include <linux/delay.h>\n@@ -11,13 +13,11 @@\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/pci_regs.h>\n-#include <linux/phy/phy.h>\n #include <linux/phy/pcie.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n-#include <dt-bindings/phy/phy.h>\n-#include <dt-bindings/phy/phy-imx8-pcie.h>\n+#include \"../phy-provider.h\"\n \n #define MAX_NUM_LANE\t3\n #define LANE_NUM_CLKS\t5\ndiff --git a/drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c b/drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c\nindex ece357443521..55c23bef5121 100644\n--- a/drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c\n+++ b/drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c\n@@ -9,12 +9,13 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/pm_runtime.h>\n #include <linux/regmap.h>\n #include <linux/units.h>\n \n+#include \"../phy-provider.h\"\n+\n #define REG_SET\t\t0x4\n #define REG_CLR\t\t0x8\n \ndiff --git a/drivers/phy/freescale/phy-fsl-lynx-28g.c b/drivers/phy/freescale/phy-fsl-lynx-28g.c\nindex 63427fc34e26..38862c9c6c94 100644\n--- a/drivers/phy/freescale/phy-fsl-lynx-28g.c\n+++ b/drivers/phy/freescale/phy-fsl-lynx-28g.c\n@@ -5,10 +5,11 @@\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/phy.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/workqueue.h>\n \n+#include \"../phy-provider.h\"\n+\n #define LYNX_28G_NUM_LANE\t\t\t8\n #define LYNX_28G_NUM_PLL\t\t\t2\n \ndiff --git a/drivers/phy/hisilicon/phy-hi3660-usb3.c b/drivers/phy/hisilicon/phy-hi3660-usb3.c\nindex e2a09d67faed..b66ff3be1aed 100644\n--- a/drivers/phy/hisilicon/phy-hi3660-usb3.c\n+++ b/drivers/phy/hisilicon/phy-hi3660-usb3.c\n@@ -12,10 +12,11 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n #define PERI_CRG_CLK_EN4\t\t\t0x40\n #define PERI_CRG_CLK_DIS4\t\t\t0x44\n #define GT_CLK_USB3OTG_REF\t\t\tBIT(0)\ndiff --git a/drivers/phy/hisilicon/phy-hi3670-pcie.c b/drivers/phy/hisilicon/phy-hi3670-pcie.c\nindex dbc7dcce682b..b7cf44078e0d 100644\n--- a/drivers/phy/hisilicon/phy-hi3670-pcie.c\n+++ b/drivers/phy/hisilicon/phy-hi3670-pcie.c\n@@ -26,11 +26,12 @@\n #include <linux/mod_devicetable.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <linux/types.h>\n \n+#include \"../phy-provider.h\"\n+\n #define AXI_CLK_FREQ\t\t\t\t207500000\n #define REF_CLK_FREQ\t\t\t\t100000000\n \ndiff --git a/drivers/phy/hisilicon/phy-hi3670-usb3.c b/drivers/phy/hisilicon/phy-hi3670-usb3.c\nindex 40d3cf128b44..004c51500597 100644\n--- a/drivers/phy/hisilicon/phy-hi3670-usb3.c\n+++ b/drivers/phy/hisilicon/phy-hi3670-usb3.c\n@@ -14,10 +14,11 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n #define SCTRL_SCDEEPSLEEPED\t\t(0x0)\n #define USB_CLK_SELECTED\t\tBIT(20)\n \ndiff --git a/drivers/phy/hisilicon/phy-hi6220-usb.c b/drivers/phy/hisilicon/phy-hi6220-usb.c\nindex 22d8d8a8dabe..1b5a2d3e3e44 100644\n--- a/drivers/phy/hisilicon/phy-hi6220-usb.c\n+++ b/drivers/phy/hisilicon/phy-hi6220-usb.c\n@@ -8,9 +8,10 @@\n #include <linux/mod_devicetable.h>\n #include <linux/module.h>\n #include <linux/platform_device.h>\n-#include <linux/phy/phy.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n #define SC_PERIPH_CTRL4\t\t\t0x00c\n \n #define CTRL4_PICO_SIDDQ\t\tBIT(6)\ndiff --git a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c\nindex c843923252aa..f6339228d191 100644\n--- a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c\n+++ b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c\n@@ -10,10 +10,11 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/reset.h>\n \n+#include \"../phy-provider.h\"\n+\n #define INNO_PHY_PORT_NUM\t2\n #define REF_CLK_STABLE_TIME\t100\t/* unit:us */\n #define UTMI_CLK_STABLE_TIME\t200\t/* unit:us */\ndiff --git a/drivers/phy/hisilicon/phy-histb-combphy.c b/drivers/phy/hisilicon/phy-histb-combphy.c\nindex 9dd0bd00b4e4..9b6ed1644d74 100644\n--- a/drivers/phy/hisilicon/phy-histb-combphy.c\n+++ b/drivers/phy/hisilicon/phy-histb-combphy.c\n@@ -14,12 +14,13 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n #include <dt-bindings/phy/phy.h>\n \n+#include \"../phy-provider.h\"\n+\n #define COMBPHY_MODE_PCIE\t\t0\n #define COMBPHY_MODE_USB3\t\t1\n #define COMBPHY_MODE_SATA\t\t2\ndiff --git a/drivers/phy/hisilicon/phy-hix5hd2-sata.c b/drivers/phy/hisilicon/phy-hix5hd2-sata.c\nindex 1b26ddb4c8a7..57994f69417d 100644\n--- a/drivers/phy/hisilicon/phy-hix5hd2-sata.c\n+++ b/drivers/phy/hisilicon/phy-hix5hd2-sata.c\n@@ -9,10 +9,11 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n #define SATA_PHY0_CTLL\t\t0xa0\n #define MPLL_MULTIPLIER_SHIFT\t1\n #define MPLL_MULTIPLIER_MASK\t0xfe\ndiff --git a/drivers/phy/ingenic/phy-ingenic-usb.c b/drivers/phy/ingenic/phy-ingenic-usb.c\nindex 7e62d46850fd..d656f97729c4 100644\n--- a/drivers/phy/ingenic/phy-ingenic-usb.c\n+++ b/drivers/phy/ingenic/phy-ingenic-usb.c\n@@ -12,10 +12,11 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regulator/consumer.h>\n \n+#include \"../phy-provider.h\"\n+\n /* OTGPHY register offsets */\n #define REG_USBPCR_OFFSET\t\t\t0x00\n #define REG_USBRDT_OFFSET\t\t\t0x04\ndiff --git a/drivers/phy/intel/phy-intel-keembay-emmc.c b/drivers/phy/intel/phy-intel-keembay-emmc.c\nindex 0eb11ac7c2e2..fdba1d050439 100644\n--- a/drivers/phy/intel/phy-intel-keembay-emmc.c\n+++ b/drivers/phy/intel/phy-intel-keembay-emmc.c\n@@ -11,10 +11,11 @@\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/of_address.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n /* eMMC/SD/SDIO core/phy configuration registers */\n #define PHY_CFG_0\t\t0x24\n #define  SEL_DLY_TXCLK_MASK\tBIT(29)\ndiff --git a/drivers/phy/intel/phy-intel-keembay-usb.c b/drivers/phy/intel/phy-intel-keembay-usb.c\nindex c8b05f7b2445..4e690f3eb560 100644\n--- a/drivers/phy/intel/phy-intel-keembay-usb.c\n+++ b/drivers/phy/intel/phy-intel-keembay-usb.c\n@@ -10,10 +10,11 @@\n #include <linux/delay.h>\n #include <linux/mod_devicetable.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n /* USS (USB Subsystem) clock control registers */\n #define USS_CPR_CLK_EN\t\t0x00\n #define USS_CPR_CLK_SET\t\t0x04\ndiff --git a/drivers/phy/intel/phy-intel-lgm-combo.c b/drivers/phy/intel/phy-intel-lgm-combo.c\nindex 9ee3cf61cdd0..2a8b0caa0e59 100644\n--- a/drivers/phy/intel/phy-intel-lgm-combo.c\n+++ b/drivers/phy/intel/phy-intel-lgm-combo.c\n@@ -5,6 +5,7 @@\n  * Copyright (C) 2019-2020 Intel Corporation.\n  */\n \n+#include <dt-bindings/phy/phy.h>\n #include <linux/bitfield.h>\n #include <linux/clk.h>\n #include <linux/iopoll.h>\n@@ -12,12 +13,11 @@\n #include <linux/module.h>\n #include <linux/mutex.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n \n-#include <dt-bindings/phy/phy.h>\n+#include \"../phy-provider.h\"\n \n #define PCIE_PHY_GEN_CTRL\t0x00\n #define PCIE_PHY_CLK_PAD\tBIT(17)\ndiff --git a/drivers/phy/intel/phy-intel-lgm-emmc.c b/drivers/phy/intel/phy-intel-lgm-emmc.c\nindex 703aeb122541..479a530dd630 100644\n--- a/drivers/phy/intel/phy-intel-lgm-emmc.c\n+++ b/drivers/phy/intel/phy-intel-lgm-emmc.c\n@@ -11,10 +11,11 @@\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/of_address.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n /* eMMC phy register definitions */\n #define EMMC_PHYCTRL0_REG\t0xa8\n #define DR_TY_MASK\t\tGENMASK(30, 28)\ndiff --git a/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c b/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c\nindex 82f1ffc0b0ad..eb6c201f7c87 100644\n--- a/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c\n+++ b/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c\n@@ -12,12 +12,13 @@\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/of_address.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/property.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n \n+#include \"../phy-provider.h\"\n+\n /* Transmitter HS Pre-Emphasis Enable */\n #define RCU_CFG1_TX_PEE\t\tBIT(0)\n /* Disconnect Threshold */\ndiff --git a/drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c b/drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c\nindex 406a87c8b759..70da76399e30 100644\n--- a/drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c\n+++ b/drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c\n@@ -11,6 +11,7 @@\n  * TODO: PHY modes other than 36MHz (without \"SSC\")\n  */\n \n+#include <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>\n #include <linux/bitfield.h>\n #include <linux/bits.h>\n #include <linux/clk.h>\n@@ -18,13 +19,12 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/property.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n \n-#include <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>\n+#include \"../phy-provider.h\"\n \n #define PCIE_PHY_PLL_CTRL1\t\t\t\t0x44\n \ndiff --git a/drivers/phy/marvell/phy-armada375-usb2.c b/drivers/phy/marvell/phy-armada375-usb2.c\nindex 3731f9b25655..d5c100096c3d 100644\n--- a/drivers/phy/marvell/phy-armada375-usb2.c\n+++ b/drivers/phy/marvell/phy-armada375-usb2.c\n@@ -16,9 +16,10 @@\n #include <linux/io.h>\n #include <linux/kernel.h>\n #include <linux/of_address.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n #define USB2_PHY_CONFIG_DISABLE BIT(0)\n \n struct armada375_cluster_phy {\ndiff --git a/drivers/phy/marvell/phy-armada38x-comphy.c b/drivers/phy/marvell/phy-armada38x-comphy.c\nindex 5063361b0120..9653863f90bb 100644\n--- a/drivers/phy/marvell/phy-armada38x-comphy.c\n+++ b/drivers/phy/marvell/phy-armada38x-comphy.c\n@@ -9,10 +9,11 @@\n #include <linux/iopoll.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n #define MAX_A38X_COMPHY\t6\n #define MAX_A38X_PORTS\t3\n \ndiff --git a/drivers/phy/marvell/phy-berlin-sata.c b/drivers/phy/marvell/phy-berlin-sata.c\nindex c90e2867900c..4d4013d115ca 100644\n--- a/drivers/phy/marvell/phy-berlin-sata.c\n+++ b/drivers/phy/marvell/phy-berlin-sata.c\n@@ -10,10 +10,11 @@\n #include <linux/clk.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/io.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n #define HOST_VSA_ADDR\t\t0x0\n #define HOST_VSA_DATA\t\t0x4\n #define PORT_SCR_CTL\t\t0x2c\ndiff --git a/drivers/phy/marvell/phy-berlin-usb.c b/drivers/phy/marvell/phy-berlin-usb.c\nindex f26bf630da2c..a3e58deaaa74 100644\n--- a/drivers/phy/marvell/phy-berlin-usb.c\n+++ b/drivers/phy/marvell/phy-berlin-usb.c\n@@ -9,11 +9,12 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/property.h>\n #include <linux/reset.h>\n \n+#include \"../phy-provider.h\"\n+\n #define USB_PHY_PLL\t\t0x04\n #define USB_PHY_PLL_CONTROL\t0x08\n #define USB_PHY_TX_CTRL0\t0x10\ndiff --git a/drivers/phy/marvell/phy-mmp3-hsic.c b/drivers/phy/marvell/phy-mmp3-hsic.c\nindex 72ab6da0ebc3..90498211431b 100644\n--- a/drivers/phy/marvell/phy-mmp3-hsic.c\n+++ b/drivers/phy/marvell/phy-mmp3-hsic.c\n@@ -7,9 +7,10 @@\n #include <linux/io.h>\n #include <linux/mod_devicetable.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n #define HSIC_CTRL\t0x08\n #define HSIC_ENABLE\tBIT(7)\n #define PLL_BYPASS\tBIT(4)\ndiff --git a/drivers/phy/marvell/phy-mmp3-usb.c b/drivers/phy/marvell/phy-mmp3-usb.c\nindex 5b71deb08851..ba67bcc2c3f9 100644\n--- a/drivers/phy/marvell/phy-mmp3-usb.c\n+++ b/drivers/phy/marvell/phy-mmp3-usb.c\n@@ -8,10 +8,11 @@\n #include <linux/io.h>\n #include <linux/mod_devicetable.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/soc/mmp/cputype.h>\n \n+#include \"../phy-provider.h\"\n+\n #define USB2_PLL_REG0\t\t0x4\n #define USB2_PLL_REG1\t\t0x8\n #define USB2_TX_REG0\t\t0x10\ndiff --git a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c\nindex 1d1db1737422..3acfd74c3eca 100644\n--- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c\n+++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c\n@@ -21,10 +21,11 @@\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/phy.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/spinlock.h>\n \n+#include \"../phy-provider.h\"\n+\n #define PLL_SET_DELAY_US\t\t600\n #define COMPHY_PLL_SLEEP\t\t1000\n #define COMPHY_PLL_TIMEOUT\t\t150000\ndiff --git a/drivers/phy/marvell/phy-mvebu-a3700-utmi.c b/drivers/phy/marvell/phy-mvebu-a3700-utmi.c\nindex 04f4fb4bed70..c17ce28ceb0b 100644\n--- a/drivers/phy/marvell/phy-mvebu-a3700-utmi.c\n+++ b/drivers/phy/marvell/phy-mvebu-a3700-utmi.c\n@@ -14,10 +14,11 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n /* Armada 3700 UTMI PHY registers */\n #define USB2_PHY_PLL_CTRL_REG0\t\t\t0x0\n #define   PLL_REF_DIV_OFF\t\t\t0\ndiff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c\nindex 71f9c14fb50d..18ad172135ea 100644\n--- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c\n+++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c\n@@ -13,10 +13,11 @@\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/phy.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n /* Relative to priv->base */\n #define MVEBU_COMPHY_SERDES_CFG0(n)\t\t(0x0 + (n) * 0x1000)\n #define     MVEBU_COMPHY_SERDES_CFG0_PU_PLL\tBIT(1)\ndiff --git a/drivers/phy/marvell/phy-mvebu-cp110-utmi.c b/drivers/phy/marvell/phy-mvebu-cp110-utmi.c\nindex dd3e515a8e86..f3e2ef54c37b 100644\n--- a/drivers/phy/marvell/phy-mvebu-cp110-utmi.c\n+++ b/drivers/phy/marvell/phy-mvebu-cp110-utmi.c\n@@ -13,12 +13,13 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <linux/usb/of.h>\n #include <linux/usb/otg.h>\n \n+#include \"../phy-provider.h\"\n+\n #define UTMI_PHY_PORTS\t\t\t\t2\n \n /* CP110 UTMI register macro definetions */\ndiff --git a/drivers/phy/marvell/phy-mvebu-sata.c b/drivers/phy/marvell/phy-mvebu-sata.c\nindex 89a5a2b69d80..b9a9eca74789 100644\n--- a/drivers/phy/marvell/phy-mvebu-sata.c\n+++ b/drivers/phy/marvell/phy-mvebu-sata.c\n@@ -8,11 +8,12 @@\n #include <linux/kernel.h>\n #include <linux/init.h>\n #include <linux/clk.h>\n-#include <linux/phy/phy.h>\n #include <linux/io.h>\n #include <linux/mod_devicetable.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n struct priv {\n \tstruct clk\t*clk;\n \tvoid __iomem\t*base;\ndiff --git a/drivers/phy/marvell/phy-pxa-28nm-hsic.c b/drivers/phy/marvell/phy-pxa-28nm-hsic.c\nindex eff6dd6b2dd0..6feee8d1ca70 100644\n--- a/drivers/phy/marvell/phy-pxa-28nm-hsic.c\n+++ b/drivers/phy/marvell/phy-pxa-28nm-hsic.c\n@@ -17,7 +17,8 @@\n #include <linux/clk.h>\n #include <linux/module.h>\n #include <linux/platform_device.h>\n-#include <linux/phy/phy.h>\n+\n+#include \"../phy-provider.h\"\n \n #define PHY_28NM_HSIC_CTRL\t\t\t0x08\n #define PHY_28NM_HSIC_IMPCAL_CAL\t\t0x18\ndiff --git a/drivers/phy/marvell/phy-pxa-28nm-usb2.c b/drivers/phy/marvell/phy-pxa-28nm-usb2.c\nindex 64afb82cf70e..39b8344803cb 100644\n--- a/drivers/phy/marvell/phy-pxa-28nm-usb2.c\n+++ b/drivers/phy/marvell/phy-pxa-28nm-usb2.c\n@@ -17,7 +17,8 @@\n #include <linux/clk.h>\n #include <linux/module.h>\n #include <linux/platform_device.h>\n-#include <linux/phy/phy.h>\n+\n+#include \"../phy-provider.h\"\n \n /* USB PXA1928 PHY mapping */\n #define PHY_28NM_PLL_REG0\t\t\t0x0\ndiff --git a/drivers/phy/marvell/phy-pxa-usb.c b/drivers/phy/marvell/phy-pxa-usb.c\nindex c0bb71f80c04..9a8ab813d001 100644\n--- a/drivers/phy/marvell/phy-pxa-usb.c\n+++ b/drivers/phy/marvell/phy-pxa-usb.c\n@@ -10,9 +10,10 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of_address.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n+\n /* phy regs */\n #define UTMI_REVISION\t\t0x0\n #define UTMI_CTRL\t\t0x4\ndiff --git a/drivers/phy/mediatek/phy-mtk-dp.c b/drivers/phy/mediatek/phy-mtk-dp.c\nindex d7024a144335..ab3778447570 100644\n--- a/drivers/phy/mediatek/phy-mtk-dp.c\n+++ b/drivers/phy/mediatek/phy-mtk-dp.c\n@@ -10,10 +10,11 @@\n #include <linux/io.h>\n #include <linux/mfd/syscon.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n #define PHY_OFFSET\t\t\t0x1000\n \n #define MTK_DP_PHY_DIG_PLL_CTL_1\t(PHY_OFFSET + 0x14)\ndiff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c\nindex 1426a2db984d..30015bac3f73 100644\n--- a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c\n+++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c\n@@ -7,7 +7,6 @@\n #include <linux/io.h>\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regulator/driver.h>\n #include <linux/regulator/of_regulator.h>\ndiff --git a/drivers/phy/mediatek/phy-mtk-hdmi.h b/drivers/phy/mediatek/phy-mtk-hdmi.h\nindex 99d917e0036a..bfddd8dbe9dd 100644\n--- a/drivers/phy/mediatek/phy-mtk-hdmi.h\n+++ b/drivers/phy/mediatek/phy-mtk-hdmi.h\n@@ -11,12 +11,13 @@\n #include <linux/delay.h>\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regulator/driver.h>\n #include <linux/regulator/machine.h>\n #include <linux/types.h>\n \n+#include \"../phy-provider.h\"\n+\n struct mtk_hdmi_phy;\n \n struct mtk_hdmi_phy_conf {\ndiff --git a/drivers/phy/mediatek/phy-mtk-mipi-csi-0-5.c b/drivers/phy/mediatek/phy-mtk-mipi-csi-0-5.c\nindex 058e1d926630..5e008204ecca 100644\n--- a/drivers/phy/mediatek/phy-mtk-mipi-csi-0-5.c\n+++ b/drivers/phy/mediatek/phy-mtk-mipi-csi-0-5.c\n@@ -12,10 +12,10 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/mutex.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/slab.h>\n \n+#include \"../phy-provider.h\"\n #include \"phy-mtk-io.h\"\n #include \"phy-mtk-mipi-csi-0-5-rx-reg.h\"\n \ndiff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi.h b/drivers/phy/mediatek/phy-mtk-mipi-dsi.h\nindex 5d4876f1dc95..676c8f78d9d6 100644\n--- a/drivers/phy/mediatek/phy-mtk-mipi-dsi.h\n+++ b/drivers/phy/mediatek/phy-mtk-mipi-dsi.h\n@@ -13,9 +13,10 @@\n #include <linux/module.h>\n #include <linux/nvmem-consumer.h>\n #include <linux/platform_device.h>\n-#include <linux/phy/phy.h>\n #include <linux/slab.h>\n \n+#include \"../phy-provider.h\"\n+\n struct mtk_mipitx_data {\n \tconst u32 mppll_preserve;\n \tconst struct clk_ops *mipi_tx_clk_ops;\ndiff --git a/drivers/phy/mediatek/phy-mtk-pcie.c b/drivers/phy/mediatek/phy-mtk-pcie.c\nindex a2f69d6c72f0..1ab7c1dc2753 100644\n--- a/drivers/phy/mediatek/phy-mtk-pcie.c\n+++ b/drivers/phy/mediatek/phy-mtk-pcie.c\n@@ -8,10 +8,10 @@\n #include <linux/module.h>\n #include <linux/nvmem-consumer.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/slab.h>\n \n+#include \"../phy-provider.h\"\n #include \"phy-mtk-io.h\"\n \n #define PEXTP_ANA_GLB_00_REG\t\t0x9000\ndiff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c\nindex acf506529507..6f98de067327 100644\n--- a/drivers/phy/mediatek/phy-mtk-tphy.c\n+++ b/drivers/phy/mediatek/phy-mtk-tphy.c\n@@ -15,10 +15,10 @@\n #include <linux/nvmem-consumer.h>\n #include <linux/of.h>\n #include <linux/of_address.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n #include \"phy-mtk-io.h\"\n \n /* version V1 sub-banks offset base address */\ndiff --git a/drivers/phy/mediatek/phy-mtk-ufs.c b/drivers/phy/mediatek/phy-mtk-ufs.c\nindex 0cb5a25b1b7a..de517fcc4f3e 100644\n--- a/drivers/phy/mediatek/phy-mtk-ufs.c\n+++ b/drivers/phy/mediatek/phy-mtk-ufs.c\n@@ -9,9 +9,9 @@\n #include <linux/io.h>\n #include <linux/mod_devicetable.h>\n #include <linux/module.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n+#include \"../phy-provider.h\"\n #include \"phy-mtk-io.h\"\n \n /* mphy register and offsets */\ndiff --git a/drivers/phy/mediatek/phy-mtk-xfi-tphy.c b/drivers/phy/mediatek/phy-mtk-xfi-tphy.c\nindex 100a50d0e861..036a4bb58dcf 100644\n--- a/drivers/phy/mediatek/phy-mtk-xfi-tphy.c\n+++ b/drivers/phy/mediatek/phy-mtk-xfi-tphy.c\n@@ -17,8 +17,8 @@\n #include <linux/clk.h>\n #include <linux/reset.h>\n #include <linux/phy.h>\n-#include <linux/phy/phy.h>\n \n+#include \"../phy-provider.h\"\n #include \"phy-mtk-io.h\"\n \n #define MTK_XFI_TPHY_NUM_CLOCKS\t\t2\ndiff --git a/drivers/phy/mediatek/phy-mtk-xsphy.c b/drivers/phy/mediatek/phy-mtk-xsphy.c\nindex c0ddb9273cc3..5e61abddaf54 100644\n--- a/drivers/phy/mediatek/phy-mtk-xsphy.c\n+++ b/drivers/phy/mediatek/phy-mtk-xsphy.c\n@@ -14,10 +14,10 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of_address.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n #include \"phy-mtk-io.h\"\n \n /* u2 phy banks */\ndiff --git a/drivers/phy/microchip/lan966x_serdes.c b/drivers/phy/microchip/lan966x_serdes.c\nindex 835e369cdfc5..8769518f9708 100644\n--- a/drivers/phy/microchip/lan966x_serdes.c\n+++ b/drivers/phy/microchip/lan966x_serdes.c\n@@ -1,15 +1,15 @@\n // SPDX-License-Identifier: GPL-2.0-or-later\n \n+#include <dt-bindings/phy/phy-lan966x-serdes.h>\n #include <linux/err.h>\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/of_platform.h>\n #include <linux/phy.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n \n-#include <dt-bindings/phy/phy-lan966x-serdes.h>\n #include \"lan966x_serdes_regs.h\"\n+#include \"../phy-provider.h\"\n \n #define PLL_CONF_MASK\t\tGENMASK(4, 3)\n #define PLL_CONF_25MHZ\t\t0\ndiff --git a/drivers/phy/microchip/sparx5_serdes.c b/drivers/phy/microchip/sparx5_serdes.c\nindex 320cf5b50a8c..09c22a6a2639 100644\n--- a/drivers/phy/microchip/sparx5_serdes.c\n+++ b/drivers/phy/microchip/sparx5_serdes.c\n@@ -17,8 +17,8 @@\n #include <linux/io.h>\n #include <linux/clk.h>\n #include <linux/phy.h>\n-#include <linux/phy/phy.h>\n \n+#include \"../phy-provider.h\"\n #include \"sparx5_serdes.h\"\n \n #define SPX5_SERDES_10G_START 13\ndiff --git a/drivers/phy/motorola/phy-cpcap-usb.c b/drivers/phy/motorola/phy-cpcap-usb.c\nindex 7cb020dd3423..66a834c208fc 100644\n--- a/drivers/phy/motorola/phy-cpcap-usb.c\n+++ b/drivers/phy/motorola/phy-cpcap-usb.c\n@@ -24,10 +24,11 @@\n #include <linux/gpio/consumer.h>\n #include <linux/mfd/motorola-cpcap.h>\n #include <linux/phy/omap_usb.h>\n-#include <linux/phy/phy.h>\n #include <linux/regulator/consumer.h>\n #include <linux/usb/musb.h>\n \n+#include \"../phy-provider.h\"\n+\n /* CPCAP_REG_USBC1 register bits */\n #define CPCAP_BIT_IDPULSE\t\tBIT(15)\n #define CPCAP_BIT_ID100KPU\t\tBIT(14)\ndiff --git a/drivers/phy/motorola/phy-mapphone-mdm6600.c b/drivers/phy/motorola/phy-mapphone-mdm6600.c\nindex ce1dad8c438d..92f63e52bd1d 100644\n--- a/drivers/phy/motorola/phy-mapphone-mdm6600.c\n+++ b/drivers/phy/motorola/phy-mapphone-mdm6600.c\n@@ -15,10 +15,12 @@\n \n #include <linux/gpio/consumer.h>\n #include <linux/of_platform.h>\n-#include <linux/phy/phy.h>\n+#include <linux/phy/phy.h> /* for phy_pm_runtime_*() */\n #include <linux/pinctrl/consumer.h>\n #include <linux/pm_runtime.h>\n \n+#include \"../phy-provider.h\"\n+\n #define PHY_MDM6600_PHY_DELAY_MS\t4000\t/* PHY enable 2.2s to 3.5s */\n #define PHY_MDM6600_ENABLED_DELAY_MS\t8000\t/* 8s more total for MDM6600 */\n #define PHY_MDM6600_WAKE_KICK_MS\t600\t/* time on after GPIO toggle */\ndiff --git a/drivers/phy/mscc/phy-ocelot-serdes.c b/drivers/phy/mscc/phy-ocelot-serdes.c\nindex 1cd1b5db2ad7..13f83876d954 100644\n--- a/drivers/phy/mscc/phy-ocelot-serdes.c\n+++ b/drivers/phy/mscc/phy-ocelot-serdes.c\n@@ -12,12 +12,13 @@\n #include <linux/of.h>\n #include <linux/of_platform.h>\n #include <linux/phy.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n #include <soc/mscc/ocelot_hsio.h>\n #include <dt-bindings/phy/phy-ocelot-serdes.h>\n \n+#include \"../phy-provider.h\"\n+\n struct serdes_ctrl {\n \tstruct regmap\t\t*regs;\n \tstruct device\t\t*dev;\ndiff --git a/drivers/phy/nuvoton/phy-ma35d1-usb2.c b/drivers/phy/nuvoton/phy-ma35d1-usb2.c\nindex 9a459b700ed4..520c86188fe2 100644\n--- a/drivers/phy/nuvoton/phy-ma35d1-usb2.c\n+++ b/drivers/phy/nuvoton/phy-ma35d1-usb2.c\n@@ -10,10 +10,11 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"../phy-provider.h\"\n+\n /* USB PHY Miscellaneous Control Register */\n #define MA35_SYS_REG_USBPMISCR\t0x60\n #define PHY0POR\t\t\tBIT(0)  /* PHY Power-On Reset Control Bit */\ndiff --git a/drivers/phy/phy-airoha-pcie.c b/drivers/phy/phy-airoha-pcie.c\nindex 56e9ade8a9fd..d9817eed2631 100644\n--- a/drivers/phy/phy-airoha-pcie.c\n+++ b/drivers/phy/phy-airoha-pcie.c\n@@ -9,11 +9,11 @@\n #include <linux/io.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/slab.h>\n \n #include \"phy-airoha-pcie-regs.h\"\n+#include \"phy-provider.h\"\n \n #define LEQ_LEN_CTRL_MAX_VAL\t7\n #define FREQ_LOCK_MAX_ATTEMPT\t10\ndiff --git a/drivers/phy/phy-can-transceiver.c b/drivers/phy/phy-can-transceiver.c\nindex 2b52e47f247a..68f771a7bad7 100644\n--- a/drivers/phy/phy-can-transceiver.c\n+++ b/drivers/phy/phy-can-transceiver.c\n@@ -6,13 +6,14 @@\n  *\n  */\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/module.h>\n #include <linux/gpio.h>\n #include <linux/gpio/consumer.h>\n #include <linux/mux/consumer.h>\n \n+#include \"phy-provider.h\"\n+\n struct can_transceiver_data {\n \tu32 flags;\n #define CAN_TRANSCEIVER_STB_PRESENT\tBIT(0)\ndiff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c\nindex f4956a417a47..770cfe2a2279 100644\n--- a/drivers/phy/phy-core-mipi-dphy.c\n+++ b/drivers/phy/phy-core-mipi-dphy.c\n@@ -4,13 +4,13 @@\n  * Copyright (C) 2018 Cadence Design Systems Inc.\n  */\n \n+#include <linux/phy/phy-mipi-dphy.h>\n #include <linux/errno.h>\n #include <linux/export.h>\n #include <linux/kernel.h>\n #include <linux/time64.h>\n \n-#include <linux/phy/phy.h>\n-#include <linux/phy/phy-mipi-dphy.h>\n+#include \"phy-provider.h\"\n \n /*\n  * Minimum D-PHY timings based on MIPI D-PHY specification. Derived\ndiff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c\nindex 8707111c4666..a738594146e2 100644\n--- a/drivers/phy/phy-core.c\n+++ b/drivers/phy/phy-core.c\n@@ -20,6 +20,8 @@\n #include <linux/pm_runtime.h>\n #include <linux/regulator/consumer.h>\n \n+#include \"phy-provider.h\"\n+\n #define\tto_phy(a)\t(container_of((a), struct phy, dev))\n \n /**\ndiff --git a/drivers/phy/phy-google-usb.c b/drivers/phy/phy-google-usb.c\nindex 48cfa2e28347..539732f4869e 100644\n--- a/drivers/phy/phy-google-usb.c\n+++ b/drivers/phy/phy-google-usb.c\n@@ -14,13 +14,14 @@\n #include <linux/module.h>\n #include <linux/mutex.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/pm_runtime.h>\n #include <linux/regmap.h>\n #include <linux/reset.h>\n #include <linux/usb/typec_mux.h>\n \n+#include \"phy-provider.h\"\n+\n #define USBCS_USB2PHY_CFG19_OFFSET 0x0\n #define USBCS_USB2PHY_CFG19_PHY_CFG_PLL_FB_DIV GENMASK(19, 8)\n \ndiff --git a/drivers/phy/phy-lpc18xx-usb-otg.c b/drivers/phy/phy-lpc18xx-usb-otg.c\nindex f905d3c64584..554dfa55fe7e 100644\n--- a/drivers/phy/phy-lpc18xx-usb-otg.c\n+++ b/drivers/phy/phy-lpc18xx-usb-otg.c\n@@ -10,10 +10,11 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n+#include \"phy-provider.h\"\n+\n /* USB OTG PHY register offset and bit in CREG */\n #define LPC18XX_CREG_CREG0\t\t0x004\n #define LPC18XX_CREG_CREG0_USB0PHY\tBIT(5)\ndiff --git a/drivers/phy/phy-nxp-ptn3222.c b/drivers/phy/phy-nxp-ptn3222.c\nindex c6179d8701e6..ae75b760a30d 100644\n--- a/drivers/phy/phy-nxp-ptn3222.c\n+++ b/drivers/phy/phy-nxp-ptn3222.c\n@@ -7,10 +7,11 @@\n #include <linux/i2c.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/regmap.h>\n #include <linux/regulator/consumer.h>\n \n+#include \"phy-provider.h\"\n+\n #define NUM_SUPPLIES 2\n \n struct ptn3222 {\ndiff --git a/drivers/phy/phy-pistachio-usb.c b/drivers/phy/phy-pistachio-usb.c\nindex 231792f48ced..8eed6f505a31 100644\n--- a/drivers/phy/phy-pistachio-usb.c\n+++ b/drivers/phy/phy-pistachio-usb.c\n@@ -5,6 +5,7 @@\n  * Copyright (C) 2015 Google, Inc.\n  */\n \n+#include <dt-bindings/phy/phy-pistachio-usb.h>\n #include <linux/clk.h>\n #include <linux/delay.h>\n #include <linux/io.h>\n@@ -12,11 +13,10 @@\n #include <linux/mfd/syscon.h>\n #include <linux/module.h>\n #include <linux/of.h>\n-#include <linux/phy/phy.h>\n #include <linux/platform_device.h>\n #include <linux/regmap.h>\n \n-#include <dt-bindings/phy/phy-pistachio-usb.h>\n+#include \"phy-provider.h\"\n \n #define USB_PHY_CONTROL1\t\t\t\t0x04\n #define USB_PHY_CONTROL1_FSEL_SHIFT\t\t\t2\ndiff --git a/drivers/phy/phy-snps-eusb2.c b/drivers/phy/phy-snps-eusb2.c\nindex f90bf7e95463..9062737bfad4 100644\n--- a/drivers/phy/phy-snps-eusb2.c\n+++ b/drivers/phy/phy-snps-eusb2.c\n@@ -13,6 +13,8 @@\n #include <linux/regulator/consumer.h>\n #include <linux/reset.h>\n \n+#include \"phy-provider.h\"\n+\n #define EXYNOS_USB_PHY_HS_PHY_CTRL_RST\t(0x0)\n #define USB_PHY_RST_MASK\t\tGENMASK(1, 0)\n #define UTMI_PORT_RST_MASK\t\tGENMASK(5, 4)\ndiff --git a/drivers/phy/phy-xgene.c b/drivers/phy/phy-xgene.c\nindex 5007dc7a357c..90a00498ec0a 100644\n--- a/drivers/phy/phy-xgene.c\n+++ b/drivers/phy/phy-xgene.c\n@@ -43,9 +43,10 @@\n #include <linux/platform_device.h>\n #include <linux/io.h>\n #include <linux/delay.h>\n-#include <linux/phy/phy.h>\n #include <linux/clk.h>\n \n+#include \"phy-provider.h\"\n+\n /* Max 2 lanes per a PHY unit */\n #define MAX_LANE\t\t\t2\n \n",
    "prefixes": [
        "v8",
        "phy-next",
        "28/31"
    ]
}