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GET /api/1.2/patches/2232166/?format=api
{ "id": 2232166, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2232166/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260503073541.790215-16-eric.auger@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260503073541.790215-16-eric.auger@redhat.com>", "list_archive_url": null, "date": "2026-05-03T07:33:35", "name": "[v4,15/17] arm/cpu: Expose writable ID reg field properties on the kvm host vcpu model", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "99348b14aebd2d361bfd02007d8e7267a9fe6c0e", "submitter": { "id": 69187, "url": "http://patchwork.ozlabs.org/api/1.2/people/69187/?format=api", "name": "Eric Auger", "email": "eric.auger@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260503073541.790215-16-eric.auger@redhat.com/mbox/", "series": [ { "id": 502569, "url": "http://patchwork.ozlabs.org/api/1.2/series/502569/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502569", "date": "2026-05-03T07:33:20", "name": "kvm/arm: Introduce a customizable aarch64 KVM host model", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/502569/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2232166/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2232166/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=dWz1q0xB;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g7c8g09cNz1yK4\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 03 May 2026 17:38:43 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wJROO-0000gd-MZ; Sun, 03 May 2026 03:37:32 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <eric.auger@redhat.com>)\n id 1wJROH-0000IO-VY\n for qemu-devel@nongnu.org; Sun, 03 May 2026 03:37:26 -0400", "from us-smtp-delivery-124.mimecast.com ([170.10.133.124])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <eric.auger@redhat.com>)\n id 1wJROG-0003jP-EH\n for qemu-devel@nongnu.org; Sun, 03 May 2026 03:37:25 -0400", "from mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com\n (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by\n relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,\n cipher=TLS_AES_256_GCM_SHA384) id us-mta-678-f1QDHV5KOTicn_yLJnnKCA-1; Sun,\n 03 May 2026 03:37:20 -0400", "from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com\n (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS\n id 3C29C195608E; Sun, 3 May 2026 07:37:19 +0000 (UTC)", "from laptop.redhat.com (unknown [10.44.48.25])\n by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP\n id 3D1A31800345; Sun, 3 May 2026 07:37:13 +0000 (UTC)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1777793843;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=lo1xZC+bUky6RlKCN7yKN2S97GkmDXuYJWggWFfqIMk=;\n b=dWz1q0xBW+BE8uANW0vNBeg4HZErMD7fucAFi7GAZur3TcFqm+YbcOGqoU6fiLs+LN3RNM\n mWEHoeCFSC57hxfME+dRTv93fkU8eVMtRn2HlXkJyFxsUHyGtnXouAez6yfx3k7VzWG5Vz\n 9xWWoQyYw28SSKYCuurQYC60NE2ARoQ=", "X-MC-Unique": "f1QDHV5KOTicn_yLJnnKCA-1", "X-Mimecast-MFC-AGG-ID": "f1QDHV5KOTicn_yLJnnKCA_1777793839", "From": "Eric Auger <eric.auger@redhat.com>", "To": "eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org,\n qemu-arm@nongnu.org, kvmarm@lists.linux.dev, peter.maydell@linaro.org,\n richard.henderson@linaro.org, cohuck@redhat.com, sebott@redhat.com,\n skolothumtho@nvidia.com, philmd@linaro.org", "Cc": "maz@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com,\n armbru@redhat.com, berrange@redhat.com, abologna@redhat.com,\n jdenemar@redhat.com", "Subject": "[PATCH v4 15/17] arm/cpu: Expose writable ID reg field properties on\n the kvm host vcpu model", "Date": "Sun, 3 May 2026 09:33:35 +0200", "Message-ID": "<20260503073541.790215-16-eric.auger@redhat.com>", "In-Reply-To": "<20260503073541.790215-1-eric.auger@redhat.com>", "References": "<20260503073541.790215-1-eric.auger@redhat.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Scanned-By": "MIMEDefang 3.4.1 on 10.30.177.93", "Received-SPF": "pass client-ip=170.10.133.124;\n envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com", "X-Spam_score_int": "12", "X-Spam_score": "1.2", "X-Spam_bar": "+", "X-Spam_report": "(1.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001,\n RCVD_IN_SBL_CSS=3.335, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "If the host supports KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES and\nKVM_ARM_GET_REG_WRITABLE_MASKS ioctl successfully retrieved the mask\nof writable fields for all ID regs, expose uint64 SYSREG properties\nfor all the writable ID reg fields exposed by the host kernel which\ncan be matched in target/arm/cpu-sysreg-properties.c.\n\nProperties are named SYSREG_<REG>_<FIELD> with REG and FIELD\nbeing those used in linux arch/arm64/tools/sysreg or in the AARCHMRS\nRegisters.json.\n\nThis is achieved by matching the writable fields retrieved from the\nhost kernel against the generated description of ID regs and their\nfields in target/arm/cpu-sysreg-properties.c.\n\nAn example of invocation is:\n-cpu host,SYSREG_ID_AA64ISAR0_EL1_DP=0x0\nwhich sets DP field of ID_AA64ISAR0_EL1 to 0.\n\n[CH: add properties to the host model instead of introducing a new\n\"custom\" model]\nSigned-off-by: Eric Auger <eric.auger@redhat.com>\nSigned-off-by: Cornelia Huck <cohuck@redhat.com>\n---\n target/arm/cpu.c | 12 ++++++++++++\n target/arm/cpu64.c | 23 ++++++++++++++++++++++-\n 2 files changed, 34 insertions(+), 1 deletion(-)", "diff": "diff --git a/target/arm/cpu.c b/target/arm/cpu.c\nindex 10feb639c4..10ce4eb0cb 100644\n--- a/target/arm/cpu.c\n+++ b/target/arm/cpu.c\n@@ -1824,6 +1824,18 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)\n return;\n }\n \n+ /*\n+ * If we failed to retrieve the set of writable ID registers for the \"host\"\n+ * CPU model, report it here. No error if the interface for discovering\n+ * writable ID registers is not available.\n+ * In case we did get the set of writable ID registers, set the features to\n+ * the configured values here and perform some sanity checks.\n+ */\n+ if (cpu->writable_id_regs_status == WRITABLE_ID_REGS_FAILED) {\n+ error_setg(errp, \"Failed to discover writable id registers\");\n+ return;\n+ }\n+\n if (!cpu->gt_cntfrq_hz) {\n /*\n * 0 means \"the board didn't set a value, use the default\". (We also\ndiff --git a/target/arm/cpu64.c b/target/arm/cpu64.c\nindex 1b3d3fb245..d66cb00a21 100644\n--- a/target/arm/cpu64.c\n+++ b/target/arm/cpu64.c\n@@ -852,6 +852,8 @@ static void kvm_arm_set_cpreg_mig_tolerances(ARMCPU *cpu)\n static void aarch64_host_initfn(Object *obj)\n {\n ARMCPU *cpu = ARM_CPU(obj);\n+ bool expose_id_regs = true;\n+ int ret;\n \n #if defined(CONFIG_NITRO)\n if (nitro_enabled()) {\n@@ -862,8 +864,27 @@ static void aarch64_host_initfn(Object *obj)\n \n #if defined(CONFIG_KVM)\n kvm_arm_set_cpreg_mig_tolerances(cpu);\n- kvm_arm_set_cpu_features_from_host(cpu, false);\n+\n+ cpu->writable_map = g_malloc(sizeof(IdRegMap));\n+\n+ /* discover via KVM_ARM_GET_REG_WRITABLE_MASKS */\n+ ret = kvm_arm_get_writable_id_regs(cpu, cpu->writable_map);\n+ if (ret == -ENOSYS) {\n+ /* legacy: continue without writable id regs */\n+ expose_id_regs = false;\n+ } else if (ret) {\n+ /* function will have marked an error */\n+ return;\n+ }\n+\n+ kvm_arm_set_cpu_features_from_host(cpu, expose_id_regs);\n aarch64_add_sve_properties(obj);\n+\n+ if (expose_id_regs) {\n+ /* generate SYSREG properties according to writable masks */\n+ kvm_arm_expose_idreg_properties(cpu, arm64_id_regs);\n+ }\n+\n #elif defined(CONFIG_HVF)\n hvf_arm_set_cpu_features_from_host(cpu);\n #elif defined(CONFIG_WHPX)\n", "prefixes": [ "v4", "15/17" ] }