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GET /api/1.2/patches/2232162/?format=api
{ "id": 2232162, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2232162/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260503073541.790215-13-eric.auger@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260503073541.790215-13-eric.auger@redhat.com>", "list_archive_url": null, "date": "2026-05-03T07:33:32", "name": "[v4,12/17] target/arm/kvm: Introduce kvm_arm_expose_idreg_properties", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "19a81161edef4a3a59d49ab99cba9d2a9313679b", "submitter": { "id": 69187, "url": "http://patchwork.ozlabs.org/api/1.2/people/69187/?format=api", "name": "Eric Auger", "email": "eric.auger@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260503073541.790215-13-eric.auger@redhat.com/mbox/", "series": [ { "id": 502569, "url": "http://patchwork.ozlabs.org/api/1.2/series/502569/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502569", "date": "2026-05-03T07:33:20", "name": "kvm/arm: Introduce a customizable aarch64 KVM host model", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/502569/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2232162/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2232162/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=KUlf8X6s;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g7c8Q4yMBz1yJV\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 03 May 2026 17:38:30 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wJROP-0000iU-5g; Sun, 03 May 2026 03:37:33 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <eric.auger@redhat.com>)\n id 1wJROE-0000C0-2l\n for qemu-devel@nongnu.org; Sun, 03 May 2026 03:37:24 -0400", "from us-smtp-delivery-124.mimecast.com ([170.10.129.124])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <eric.auger@redhat.com>)\n id 1wJROA-0003hU-Qj\n for qemu-devel@nongnu.org; Sun, 03 May 2026 03:37:21 -0400", "from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com\n (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by\n relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3,\n cipher=TLS_AES_256_GCM_SHA384) id us-mta-509-SSroAWKOPKqMQhBsll6Qhg-1; Sun,\n 03 May 2026 03:37:03 -0400", "from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com\n (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS\n id 0982E18002D9; Sun, 3 May 2026 07:37:02 +0000 (UTC)", "from laptop.redhat.com (unknown [10.44.48.25])\n by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP\n id 91C031800345; Sun, 3 May 2026 07:36:56 +0000 (UTC)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1777793828;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=NMByKqJonEq0IJZY6i3tIkyiCV0a7+Hy3a32bJd22VU=;\n b=KUlf8X6srT4cXHS4Ibbj0XE5C8/DciXocLIsgQJ+V8Q+Hb6+ySXzFoBGVIBZpd8EbBoent\n I9KlfLq4PkibUFC4UA721/SRPnG16v5KMEIJ4AiCvyASSqC6L/2MRF15Eri9qAhdOWr3hO\n ph2vQ3kTwOz6AmLp3haawvmlqB5jaEU=", "X-MC-Unique": "SSroAWKOPKqMQhBsll6Qhg-1", "X-Mimecast-MFC-AGG-ID": "SSroAWKOPKqMQhBsll6Qhg_1777793822", "From": "Eric Auger <eric.auger@redhat.com>", "To": "eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org,\n qemu-arm@nongnu.org, kvmarm@lists.linux.dev, peter.maydell@linaro.org,\n richard.henderson@linaro.org, cohuck@redhat.com, sebott@redhat.com,\n skolothumtho@nvidia.com, philmd@linaro.org", "Cc": "maz@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com,\n armbru@redhat.com, berrange@redhat.com, abologna@redhat.com,\n jdenemar@redhat.com", "Subject": "[PATCH v4 12/17] target/arm/kvm: Introduce\n kvm_arm_expose_idreg_properties", "Date": "Sun, 3 May 2026 09:33:32 +0200", "Message-ID": "<20260503073541.790215-13-eric.auger@redhat.com>", "In-Reply-To": "<20260503073541.790215-1-eric.auger@redhat.com>", "References": "<20260503073541.790215-1-eric.auger@redhat.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Scanned-By": "MIMEDefang 3.4.1 on 10.30.177.93", "Received-SPF": "pass client-ip=170.10.129.124;\n envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "This helper decode the ID reg writable mask, matches it against\nID reg fields defined in target/arm/cpu-sysreg-properties.c and\nfor each writable named field, generates a uint64 property.\n\nSigned-off-by: Eric Auger <eric.auger@redhat.com>\n---\n target/arm/kvm.c | 134 ++++++++++++++++++++++++++++++++++++++++\n target/arm/kvm_arm.h | 10 +++\n target/arm/trace-events | 4 ++\n 3 files changed, 148 insertions(+)", "diff": "diff --git a/target/arm/kvm.c b/target/arm/kvm.c\nindex ca9a7d9439..d9bf1ec039 100644\n--- a/target/arm/kvm.c\n+++ b/target/arm/kvm.c\n@@ -344,6 +344,140 @@ static int get_host_cpu_idregs(ARMCPU *cpu, int fd, ARMHostCPUFeatures *ahcf)\n return err;\n }\n \n+static ARM64SysRegField *get_field(int i, ARM64SysReg *reg)\n+{\n+ GList *l;\n+\n+ for (l = reg->fields; l; l = l->next) {\n+ ARM64SysRegField *field = (ARM64SysRegField *)l->data;\n+\n+ if (i >= field->lower && i <= field->upper) {\n+ return field;\n+ }\n+ }\n+ return NULL;\n+}\n+\n+static void set_sysreg_prop(Object *obj, Visitor *v,\n+ const char *name, void *opaque,\n+ Error **errp)\n+{\n+ ARM64SysRegField *field = (ARM64SysRegField *)opaque;\n+ ARMCPU *cpu = ARM_CPU(obj);\n+ uint64_t *idregs = cpu->isar.idregs;\n+ uint64_t old, value, mask;\n+ int lower = field->lower;\n+ int upper = field->upper;\n+ int length = upper - lower + 1;\n+ int index = field->index;\n+\n+ if (!visit_type_uint64(v, name, &value, errp)) {\n+ return;\n+ }\n+\n+ if (length < 64 && value > ((1 << length) - 1)) {\n+ error_setg(errp,\n+ \"idreg %s set value (0x%lx) exceeds length of field (%d)!\",\n+ name, value, length);\n+ return;\n+ }\n+\n+ mask = MAKE_64BIT_MASK(lower, length);\n+ value = value << lower;\n+ old = idregs[index];\n+ idregs[index] = old & ~mask;\n+ idregs[index] |= value;\n+ trace_set_sysreg_prop(name, old, mask, value, idregs[index]);\n+}\n+\n+static void get_sysreg_prop(Object *obj, Visitor *v,\n+ const char *name, void *opaque,\n+ Error **errp)\n+{\n+ ARM64SysRegField *field = (ARM64SysRegField *)opaque;\n+ ARMCPU *cpu = ARM_CPU(obj);\n+ uint64_t *idregs = cpu->isar.idregs;\n+ uint64_t value, mask;\n+ int lower = field->lower;\n+ int upper = field->upper;\n+ int length = upper - lower + 1;\n+ int index = field->index;\n+\n+ mask = MAKE_64BIT_MASK(lower, length);\n+ value = (idregs[index] & mask) >> lower;\n+ visit_type_uint64(v, name, &value, errp);\n+ trace_get_sysreg_prop(name, value);\n+}\n+\n+/*\n+ * decode_idreg_writemap: Generate props for writable fields\n+ *\n+ * @obj: CPU object\n+ * @index: index of the sysreg\n+ * @map: writable map for the sysreg\n+ * @reg: description of the sysreg\n+ */\n+static int\n+decode_idreg_writemap(Object *obj, int index, uint64_t map, ARM64SysReg *reg)\n+{\n+ int i = ctz64(map);\n+ int nb_sysreg_props = 0;\n+\n+ while (map) {\n+ ARM64SysRegField *field = get_field(i, reg);\n+ int lower, upper;\n+ uint64_t mask;\n+ char *prop_name;\n+\n+ if (!field) {\n+ warn_report(\"%s bit %d of %s is writable but no named field \"\n+ \"in target/arm/cpu-sysreg-properties.c\",\n+ __func__, i, reg->name);\n+ warn_report(\"%s is target/arm/cpu-sysreg-properties.c up to date?\", __func__);\n+ map = map & ~BIT_ULL(i);\n+ i = ctz64(map);\n+ continue;\n+ }\n+ lower = field->lower;\n+ upper = field->upper;\n+ prop_name = g_strdup_printf(\"SYSREG_%s_%s\", reg->name, field->name);\n+ trace_decode_idreg_writemap(field->name, lower, upper, prop_name);\n+ object_property_add(obj, prop_name, \"uint64\",\n+ get_sysreg_prop, set_sysreg_prop, NULL, field);\n+ nb_sysreg_props++;\n+\n+ mask = MAKE_64BIT_MASK(lower, upper - lower + 1);\n+ map = map & ~mask;\n+ i = ctz64(map);\n+ }\n+ trace_nb_sysreg_props(reg->name, nb_sysreg_props);\n+ return 0;\n+}\n+\n+/* analyze the writable mask and generate properties for writable fields */\n+void kvm_arm_expose_idreg_properties(ARMCPU *cpu, ARM64SysReg *regs)\n+{\n+ int i, idx;\n+ IdRegMap *map = cpu->writable_map;\n+ Object *obj = OBJECT(cpu);\n+\n+ for (i = 0; i < NR_ID_REG_MASKS; i++) {\n+ uint64_t mask = map->regs[i];\n+\n+ if (mask) {\n+ /* reg @i has some writable fields, decode them */\n+ idx = kvm_feature_idx_to_idregs_idx(i);\n+ if (idx < 0) {\n+ /* no matching reg? */\n+ warn_report(\"%s: reg %d writable, but not in list of idregs?\",\n+ __func__, i);\n+ } else {\n+ decode_idreg_writemap(obj, i, mask, ®s[idx]);\n+ }\n+ }\n+ }\n+}\n+\n static bool\n kvm_arm_get_host_cpu_features(ARMCPU *cpu, ARMHostCPUFeatures *ahcf,\n bool get_all_writable_id_regs)\ndiff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h\nindex 91a7d5cc4b..a3034f264b 100644\n--- a/target/arm/kvm_arm.h\n+++ b/target/arm/kvm_arm.h\n@@ -146,6 +146,16 @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu,\n */\n void kvm_arm_add_vcpu_properties(ARMCPU *cpu);\n \n+typedef struct ARM64SysReg ARM64SysReg;\n+/**\n+ * kvm_arm_expose_idreg_properties:\n+ * @cpu: The CPU object to generate the properties for\n+ * @reg: registers from the host\n+ *\n+ * analyze the writable mask and generate properties for writable fields\n+ */\n+void kvm_arm_expose_idreg_properties(ARMCPU *cpu, ARM64SysReg *regs);\n+\n /**\n * kvm_arm_steal_time_finalize:\n * @cpu: ARMCPU for which to finalize kvm-steal-time\ndiff --git a/target/arm/trace-events b/target/arm/trace-events\nindex c25d2a1191..d72ad6b671 100644\n--- a/target/arm/trace-events\n+++ b/target/arm/trace-events\n@@ -15,6 +15,10 @@ arm_gt_update_irq(int timer, int irqstate) \"gt_update_irq: timer %d irqstate %d\"\n kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) \"MSI iova = 0x%\"PRIx64\" is translated into 0x%\"PRIx64\n get_host_cpu_idregs(const char *name, uint64_t value) \"scratch vcpu host value for %s is 0x%\"PRIx64\n kvm_arm_writable_idregs_to_cpreg_list(const char *name, uint64_t previous, uint64_t new) \"%s overwrite default 0x%\"PRIx64\" with 0x%\"PRIx64\n+decode_idreg_writemap(const char* name, int lower, int upper, char *prop_name) \"%s [%d:%d] is writable (prop %s)\"\n+get_sysreg_prop(const char *name, uint64_t value) \"%s 0x%\"PRIx64\n+set_sysreg_prop(const char *name, uint64_t old, uint64_t mask, uint64_t field_value, uint64_t new) \"%s old reg value=0x%\"PRIx64\" mask=0x%\"PRIx64\" new field value=0x%\"PRIx64\" new reg value=0x%\"PRIx64\n+nb_sysreg_props(const char *name, int count) \"%s: %d SYSREG properties\"\n \n # cpu.c\n arm_cpu_reset(uint64_t mp_aff) \"cpu %\" PRIu64\n", "prefixes": [ "v4", "12/17" ] }