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GET /api/1.2/patches/2232146/?format=api
{ "id": 2232146, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2232146/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260503015756.99176-4-54weasels@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260503015756.99176-4-54weasels@gmail.com>", "list_archive_url": null, "date": "2026-05-03T01:57:52", "name": "[3/7] hw/char/escc: Expose diagnostic RS232 I/O routing", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b13776c8b6aa9ca31f56a7a40c5769ba1c9f0cb4", "submitter": { "id": 93309, "url": "http://patchwork.ozlabs.org/api/1.2/people/93309/?format=api", "name": "54weasels", "email": "54weasels@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260503015756.99176-4-54weasels@gmail.com/mbox/", "series": [ { "id": 502564, "url": "http://patchwork.ozlabs.org/api/1.2/series/502564/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502564", "date": "2026-05-03T01:57:51", "name": "m68k: Add Sun-3 Machine Emulation", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502564/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2232146/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2232146/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=c+Xkx3SU;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-dy1-x132f.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-Mailman-Approved-At": "Sun, 03 May 2026 01:59:00 -0400", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "This adds proper initialization and routing hooks for the ESCC serial controller to support the specific diagnostic RS232 UART mappings expected by the Sun-3 Boot PROM.\n\nSigned-off-by: 54weasels <54weasels@gmail.com>\n---\n hw/char/escc.c | 33 ++++++++++++++++++++++++---------\n include/hw/char/escc.h | 3 +++\n 2 files changed, 27 insertions(+), 9 deletions(-)", "diff": "diff --git a/hw/char/escc.c b/hw/char/escc.c\nindex 3b46818ecc..d870806a35 100644\n--- a/hw/char/escc.c\n+++ b/hw/char/escc.c\n@@ -313,7 +313,8 @@ static void escc_soft_reset_chn(ESCCChannelState *s)\n \n s->rregs[R_STATUS] &= STATUS_DCD | STATUS_SYNC | STATUS_CTS | STATUS_BRK;\n s->rregs[R_STATUS] |= STATUS_TXEMPTY | STATUS_TXUNDRN;\n- if (s->disabled) {\n+ if (s->disabled || s->parent->force_hw_ready) {\n+ /* Force assert to satisfy Sun-3 PROM Flow Control */\n s->rregs[R_STATUS] |= STATUS_DCD | STATUS_SYNC | STATUS_CTS;\n }\n s->rregs[R_SPEC] &= SPEC_ALLSENT;\n@@ -653,7 +654,8 @@ static void escc_mem_write(void *opaque, hwaddr addr,\n s->txint = 0;\n escc_update_irq(s);\n s->tx = val;\n- if (s->wregs[W_TXCTRL2] & TXCTRL2_TXEN) { /* tx enabled */\n+ if (s->parent->force_hw_ready || (s->wregs[W_TXCTRL2] & TXCTRL2_TXEN)) {\n+ /* tx consistently forced enabled for Sun-3 boot PROM hooks */\n if (s->wregs[W_MISC2] & MISC2_LCL_LOOP) {\n serial_receive_byte(s, s->tx);\n } else if (qemu_chr_fe_backend_connected(&s->chr)) {\n@@ -691,6 +693,12 @@ static uint64_t escc_mem_read(void *opaque, hwaddr addr,\n case SERIAL_CTRL:\n trace_escc_mem_readb_ctrl(CHN_C(s), s->reg, s->rregs[s->reg]);\n ret = s->rregs[s->reg];\n+ if (s->reg == R_STATUS) {\n+ if (serial->force_hw_ready) {\n+ ret |= STATUS_DCD | STATUS_SYNC | STATUS_CTS;\n+ /* Force Flow Control PINs */\n+ }\n+ }\n s->reg = 0;\n return ret;\n case SERIAL_DATA:\n@@ -715,6 +723,10 @@ static const MemoryRegionOps escc_mem_ops = {\n .write = escc_mem_write,\n .endianness = DEVICE_NATIVE_ENDIAN,\n .valid = {\n+ .min_access_size = 1,\n+ .max_access_size = 4,\n+ },\n+ .impl = {\n .min_access_size = 1,\n .max_access_size = 1,\n },\n@@ -1067,16 +1079,17 @@ static void escc_realize(DeviceState *dev, Error **errp)\n s->chn[0].disabled = s->disabled;\n s->chn[1].disabled = s->disabled;\n \n+ uint32_t escc_size = s->mmio_size ? s->mmio_size :\\\n+ (ESCC_SIZE << s->it_shift);\n memory_region_init_io(&s->mmio, OBJECT(dev), &escc_mem_ops, s, \"escc\",\n- ESCC_SIZE << s->it_shift);\n+ escc_size);\n \n for (i = 0; i < 2; i++) {\n- if (qemu_chr_fe_backend_connected(&s->chn[i].chr)) {\n- s->chn[i].clock = s->frequency / 2;\n- qemu_chr_fe_set_handlers(&s->chn[i].chr, serial_can_receive,\n- serial_receive1, serial_event, NULL,\n- &s->chn[i], NULL, true);\n- }\n+ s->chn[i].parent = s;\n+ s->chn[i].clock = s->frequency / 2;\n+ qemu_chr_fe_set_handlers(&s->chn[i].chr, serial_can_receive,\n+ serial_receive1, serial_event, NULL,\n+ &s->chn[i], NULL, true);\n }\n \n if (s->chn[0].type == escc_mouse) {\n@@ -1093,7 +1106,9 @@ static const Property escc_properties[] = {\n DEFINE_PROP_UINT32(\"frequency\", ESCCState, frequency, 0),\n DEFINE_PROP_UINT32(\"it_shift\", ESCCState, it_shift, 0),\n DEFINE_PROP_BOOL(\"bit_swap\", ESCCState, bit_swap, false),\n+ DEFINE_PROP_BOOL(\"force-hw-ready\", ESCCState, force_hw_ready, false),\n DEFINE_PROP_UINT32(\"disabled\", ESCCState, disabled, 0),\n+ DEFINE_PROP_UINT32(\"mmio_size\", ESCCState, mmio_size, 0),\n DEFINE_PROP_UINT32(\"chnBtype\", ESCCState, chn[0].type, 0),\n DEFINE_PROP_UINT32(\"chnAtype\", ESCCState, chn[1].type, 0),\n DEFINE_PROP_CHR(\"chrB\", ESCCState, chn[0].chr),\ndiff --git a/include/hw/char/escc.h b/include/hw/char/escc.h\nindex 9e60175b77..db4700d8e4 100644\n--- a/include/hw/char/escc.h\n+++ b/include/hw/char/escc.h\n@@ -49,6 +49,7 @@ typedef struct ESCCChannelState {\n int sunmouse_dx;\n int sunmouse_dy;\n int sunmouse_buttons;\n+ ESCCState *parent;\n } ESCCChannelState;\n \n struct ESCCState {\n@@ -57,9 +58,11 @@ struct ESCCState {\n struct ESCCChannelState chn[2];\n uint32_t it_shift;\n bool bit_swap;\n+ bool force_hw_ready;\n MemoryRegion mmio;\n uint32_t disabled;\n uint32_t frequency;\n+ uint32_t mmio_size;\n };\n \n #endif\n", "prefixes": [ "3/7" ] }