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{
    "id": 2231988,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/2231988/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260501211627.3293126-4-evvoevod@tenstorrent.com/",
    "project": {
        "id": 67,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/67/?format=api",
        "name": "OpenSBI development",
        "link_name": "opensbi",
        "list_id": "opensbi.lists.infradead.org",
        "list_email": "opensbi@lists.infradead.org",
        "web_url": "https://github.com/riscv/opensbi",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": "https://github.com/riscv/opensbi/commit/{}"
    },
    "msgid": "<20260501211627.3293126-4-evvoevod@tenstorrent.com>",
    "list_archive_url": null,
    "date": "2026-05-01T21:16:25",
    "name": "[v2,3/5] firmware: Add RNMI handler infrastructure",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "09117c2936c443d73b89f5d6f6fbbbf08de14af4",
    "submitter": {
        "id": 92832,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/92832/?format=api",
        "name": "Evgeny Voevodin",
        "email": "evvoevod@tenstorrent.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260501211627.3293126-4-evvoevod@tenstorrent.com/mbox/",
    "series": [
        {
            "id": 502498,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/502498/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=502498",
            "date": "2026-05-01T21:16:26",
            "name": "Add RISC-V Smrnmi extension support",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/502498/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2231988/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2231988/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Evgeny Voevodin <evvoevod@tenstorrent.com>",
        "To": "opensbi@lists.infradead.org",
        "Cc": "Anup Patel <anup@brainfault.org>,\n\tNylon Chen <nylon.chen@sifive.com>,\n\tevvoevod@tenstorrent.com",
        "Subject": "[PATCH v2 3/5] firmware: Add RNMI handler infrastructure",
        "Date": "Fri,  1 May 2026 21:16:25 +0000",
        "Message-ID": "<20260501211627.3293126-4-evvoevod@tenstorrent.com>",
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        "References": "<20260501211627.3293126-1-evvoevod@tenstorrent.com>",
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        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20260501_141645_365767_877FD9B5 ",
        "X-CRM114-Status": "GOOD (  16.58  )",
        "X-Spam-Score": "-2.1 (--)",
        "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam.  The original\n message has been attached to this so you can view it or label\n similar future email.  If you have any questions, see\n the administrator of that system for details.\n Content preview:  Implement basic Resumable NMI (RNMI) handler support for\n the\n    RISC-V Smrnmi extension. The new _trap_rnmi_handler assembly entry point\n   saves context using the Smrnmi MN* CSRs (MNSCRATCH, MNEPC, MNSTATUS,\n MNCAUSE)\n    and returns via mnret. It dispatches to sbi_trap_rnmi_handler(), which opt\n    [...]\n Content analysis details:   (-2.1 points, 5.0 required)\n  pts rule name              description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE     RBL: Sender listed at https://www.dnswl.org/, no\n                             trust\n                             [2607:f8b0:4864:20:0:0:0:132b listed in]\n                             [list.dnswl.org]\n -0.0 SPF_PASS               SPF: sender matches SPF record\n  0.0 SPF_HELO_NONE          SPF: HELO does not publish an SPF Record\n -0.1 DKIM_VALID_EF          Message has a valid DKIM or DK signature from\n                             envelope-from domain\n -0.1 DKIM_VALID_AU          Message has a valid DKIM or DK signature from\n author's\n                             domain\n  0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID             Message has at least one valid DKIM or DK\n signature\n -1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n                             [score: 0.0000]",
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    },
    "content": "Implement basic Resumable NMI (RNMI) handler support for the RISC-V\nSmrnmi extension.\n\nThe new _trap_rnmi_handler assembly entry point saves context using the\nSmrnmi MN* CSRs (MNSCRATCH, MNEPC, MNSTATUS, MNCAUSE) and returns via\nmnret. It dispatches to sbi_trap_rnmi_handler(), which optionally calls\na platform-specific ops->rnmi_handler callback for actual NMI\nprocessing. If no platform handler is registered or it fails, the\nevent is reported as an unhandled NMI.\n\nThe RNMI handler reuses the generic trap context structure but stores MN*\nCSR values (MNEPC, MNSTATUS, MNCAUSE) into the corresponding generic\nfields (mepc, mstatus, cause) for compatibility with existing trap\ninfrastructure.\n\nSigned-off-by: Evgeny Voevodin <evvoevod@tenstorrent.com>\n---\n firmware/fw_base.S         | 121 +++++++++++++++++++++++++++++++++++++\n include/sbi/sbi_platform.h |   4 ++\n include/sbi/sbi_trap.h     |   2 +\n lib/sbi/sbi_trap.c         |  39 ++++++++++++\n 4 files changed, 166 insertions(+)",
    "diff": "diff --git a/firmware/fw_base.S b/firmware/fw_base.S\nindex cdb15429..043de7d7 100644\n--- a/firmware/fw_base.S\n+++ b/firmware/fw_base.S\n@@ -529,6 +529,45 @@ memcmp:\n \tcsrrw\ttp, CSR_MSCRATCH, tp\n .endm\n \n+.macro\tTRAP_SAVE_AND_SETUP_SP_T0_NMI\n+\t/* Swap TP and MNSCRATCH (for RNMI) */\n+\tcsrrw\ttp, CSR_MNSCRATCH, tp\n+\n+\t/* Save T0 in scratch space */\n+\tREG_S\tt0, SBI_SCRATCH_TMP1_OFFSET(tp)\n+\n+\t/*\n+\t * Set T0 to appropriate exception stack\n+\t *\n+\t * Came_From_M_Mode = ((MNSTATUS.MNPP < PRV_M) ? 1 : 0) - 1;\n+\t * Exception_Stack = TP ^ (Came_From_M_Mode & (SP ^ TP))\n+\t */\n+\tcsrr\tt0, CSR_MNSTATUS\n+\tsrl\tt0, t0, 11\t\t/* MNPP is at bits 11-12 */\n+\tand\tt0, t0, PRV_M\n+\tslti\tt0, t0, PRV_M\n+\tadd\tt0, t0, -1\n+\txor\tsp, sp, tp\n+\tand\tt0, t0, sp\n+\txor\tsp, sp, tp\n+\txor\tt0, tp, t0\n+\n+\t/* Save original SP on exception stack */\n+\tREG_S\tsp, (SBI_TRAP_REGS_OFFSET(sp) - SBI_TRAP_CONTEXT_SIZE)(t0)\n+\n+\t/* Set SP to exception stack and make room for trap context */\n+\tadd\tsp, t0, -(SBI_TRAP_CONTEXT_SIZE)\n+\n+\t/* Restore T0 from scratch space */\n+\tREG_L\tt0, SBI_SCRATCH_TMP1_OFFSET(tp)\n+\n+\t/* Save T0 on stack */\n+\tREG_S\tt0, SBI_TRAP_REGS_OFFSET(t0)(sp)\n+\n+\t/* Swap TP and MNSCRATCH */\n+\tcsrrw\ttp, CSR_MNSCRATCH, tp\n+.endm\n+\n .macro\tTRAP_SAVE_MEPC_MSTATUS have_mstatush\n \t/* Save MEPC and MSTATUS CSRs */\n \tcsrr\tt0, CSR_MEPC\n@@ -543,6 +582,20 @@ memcmp:\n \t.endif\n .endm\n \n+.macro\tTRAP_SAVE_MNEPC_MNSTATUS have_mstatush\n+\t/*\n+\t * Save MNEPC and MNSTATUS CSRs (for RNMI)\n+\t * Note: Trap context structure has generic field names (mepc, mstatus),\n+\t * we store MN* CSR values into these same structure fields.\n+\t */\n+\tcsrr\tt0, CSR_MNEPC\n+\tREG_S\tt0, SBI_TRAP_REGS_OFFSET(mepc)(sp)\n+\tcsrr\tt0, CSR_MNSTATUS\n+\tREG_S\tt0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)\n+\t/* MNSTATUSH doesn't exist in SMRNMI spec */\n+\tREG_S\tzero, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)\n+.endm\n+\n .macro\tTRAP_SAVE_GENERAL_REGS_EXCEPT_SP_T0\n \t/* Save all general regisers except SP and T0 */\n \tREG_S\tzero, SBI_TRAP_REGS_OFFSET(zero)(sp)\n@@ -606,12 +659,36 @@ memcmp:\n \tCLEAR_MDT t0\n .endm\n \n+.macro\tTRAP_SAVE_NMI_INFO\n+\t/*\n+\t * Save NMI trap info (MNCAUSE, no MNTVAL in spec)\n+\t * Note: Trap info structure has generic field names (cause, tval, etc.),\n+\t * we store MN* CSR values into these same structure fields.\n+\t */\n+\tcsrr\tt0, CSR_MNCAUSE\n+\tREG_S\tt0, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(cause))(sp)\n+\t/* MNTVAL doesn't exist in SMRNMI spec */\n+\tREG_S\tzero, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(tval))(sp)\n+\tREG_S\tzero, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(tval2))(sp)\n+\tREG_S\tzero, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(tinst))(sp)\n+\tREG_S\tzero, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(gva))(sp)\n+\n+\t/* We are ready to take another trap, clear MDT */\n+\tCLEAR_MDT t0\n+.endm\n+\n .macro\tTRAP_CALL_C_ROUTINE\n \t/* Call C routine */\n \tadd\ta0, sp, zero\n \tcall\tsbi_trap_handler\n .endm\n \n+.macro\tTRAP_CALL_C_RNMI_ROUTINE\n+\t/* Call C routine */\n+\tadd\ta0, sp, zero\n+\tcall\tsbi_trap_rnmi_handler\n+.endm\n+\n .macro\tTRAP_RESTORE_GENERAL_REGS_EXCEPT_A0_T0\n \t/* Restore all general regisers except A0 and T0 */\n \tREG_L\tra, SBI_TRAP_REGS_OFFSET(ra)(a0)\n@@ -660,6 +737,19 @@ memcmp:\n \tcsrw\tCSR_MEPC, t0\n .endm\n \n+.macro\tTRAP_RESTORE_MNEPC_MNSTATUS\n+\t/*\n+\t * Restore MNSTATUS and MNEPC CSRs (for RNMI)\n+\t * Note: Load from generic structure fields (mstatus, mepc) and\n+\t * restore to NMI-specific CSRs (MNSTATUS, MNEPC).\n+\t * No MNSTATUSH in SMRNMI spec.\n+\t */\n+\tREG_L\tt0, SBI_TRAP_REGS_OFFSET(mstatus)(a0)\n+\tcsrw\tCSR_MNSTATUS, t0\n+\tREG_L\tt0, SBI_TRAP_REGS_OFFSET(mepc)(a0)\n+\tcsrw\tCSR_MNEPC, t0\n+.endm\n+\n .macro TRAP_RESTORE_A0_T0\n \t/* Restore T0 */\n \tREG_L\tt0, SBI_TRAP_REGS_OFFSET(t0)(a0)\n@@ -724,6 +814,37 @@ _trap_handler_hyp:\n \n \tmret\n \n+\t.section .entry, \"ax\", %progbits\n+\t.align 3\n+\t.globl _trap_rnmi_handler\n+_trap_rnmi_handler:\n+\t/*\n+\t * NMI interrupt handler using MN* CSRs\n+\t *\n+\t * Context detection via MNPP (previous privilege mode):\n+\t * - If MNPP < M-mode: use exception stack (TP)\n+\t * - If MNPP == M-mode: use current stack (SP)\n+\t * This handles nested interrupt cases.\n+\t */\n+\tTRAP_SAVE_AND_SETUP_SP_T0_NMI\n+\n+\tTRAP_SAVE_MNEPC_MNSTATUS 0\n+\n+\tTRAP_SAVE_GENERAL_REGS_EXCEPT_SP_T0\n+\n+\tTRAP_SAVE_NMI_INFO\n+\n+\tTRAP_CALL_C_RNMI_ROUTINE\n+\n+\tTRAP_RESTORE_GENERAL_REGS_EXCEPT_A0_T0\n+\n+\tTRAP_RESTORE_MNEPC_MNSTATUS\n+\n+\tTRAP_RESTORE_A0_T0\n+\n+\t/* mnret - return from NMI (SMRNMI extension) */\n+\t.word 0x70200073\n+\n \t.section .entry, \"ax\", %progbits\n \t.align 3\n \t.globl _reset_regs\ndiff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h\nindex e65d9877..715df499 100644\n--- a/include/sbi/sbi_platform.h\n+++ b/include/sbi/sbi_platform.h\n@@ -149,6 +149,10 @@ struct sbi_platform_operations {\n \t\t\tunsigned long log2len);\n \t/** platform specific pmp disable on current HART */\n \tvoid (*pmp_disable)(unsigned int n);\n+\n+\t/** platform specific Smrnmi NMI handler.\n+\t *  Returns SBI_SUCCESS on success, error code if NMI cannot be handled. */\n+\tint (*rnmi_handler)(struct sbi_trap_context *tcntx);\n };\n \n /** Platform default per-HART stack size for exception/interrupt handling */\ndiff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h\nindex 731a0c98..091a2446 100644\n--- a/include/sbi/sbi_trap.h\n+++ b/include/sbi/sbi_trap.h\n@@ -289,6 +289,8 @@ static inline void sbi_trap_set_context(struct sbi_scratch *scratch,\n \n struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx);\n \n+struct sbi_trap_context *sbi_trap_rnmi_handler(struct sbi_trap_context *tcntx);\n+\n #endif\n \n #endif\ndiff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c\nindex f41db4d1..1e55b885 100644\n--- a/lib/sbi/sbi_trap.c\n+++ b/lib/sbi/sbi_trap.c\n@@ -20,6 +20,7 @@\n #include <sbi/sbi_irqchip.h>\n #include <sbi/sbi_trap_ldst.h>\n #include <sbi/sbi_pmu.h>\n+#include <sbi/sbi_platform.h>\n #include <sbi/sbi_scratch.h>\n #include <sbi/sbi_sse.h>\n #include <sbi/sbi_timer.h>\n@@ -375,3 +376,41 @@ trap_done:\n \tsbi_trap_set_context(scratch, tcntx->prev_context);\n \treturn tcntx;\n }\n+\n+/**\n+ * Default Resumable NMI (RNMI) handler\n+ *\n+ * This function is called from the _trap_rnmi_handler assembly code.\n+ * It provides a simple wrapper that calls the platform-specific\n+ * NMI handler if registered. If no handler is registered, it prints\n+ * diagnostic information and hangs, similar to unhandled traps.\n+ *\n+ * Note: The trap context stores NMI CSR values (MNCAUSE, MNEPC, MNSTATUS)\n+ * in the generic trap context fields (cause, mepc, mstatus).\n+ *\n+ * @param tcntx Pointer to trap context (saved on stack)\n+ * @return Same trap context pointer (needed for restore macros)\n+ */\n+struct sbi_trap_context *sbi_trap_rnmi_handler(struct sbi_trap_context *tcntx)\n+{\n+\tint rc;\n+\tconst struct sbi_platform *plat = sbi_platform_thishart_ptr();\n+\tconst struct sbi_platform_operations *ops = sbi_platform_ops(plat);\n+\n+\t/* Call platform-specific NMI handler if registered */\n+\tif (ops && ops->rnmi_handler) {\n+\t\trc = ops->rnmi_handler(tcntx);\n+\t\tif (rc) {\n+\t\t\t/* Platform handler failed to handle NMI */\n+\t\t\tsbi_trap_error(\"platform NMI handler failed\", rc, tcntx);\n+\t\t}\n+\t\treturn tcntx;\n+\t}\n+\n+\t/* No platform handler - treat as unhandled NMI */\n+\tsbi_trap_error(\"unhandled NMI (no platform rnmi_handler)\",\n+\t\t       SBI_ENOTSUPP, tcntx);\n+\n+\t/* Never returns */\n+\treturn tcntx;\n+}\n",
    "prefixes": [
        "v2",
        "3/5"
    ]
}