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GET /api/1.2/patches/2231945/?format=api
{ "id": 2231945, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2231945/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260501155421.3329862-8-elder@riscstar.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.2/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260501155421.3329862-8-elder@riscstar.com>", "list_archive_url": null, "date": "2026-05-01T15:54:15", "name": "[net-next,07/12] net: stmmac: dwxgmac2: export symbols for XGMAC 3.01a DMA", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f3020cb3dbed159df20f99a39c26f6a9e7538ce7", "submitter": { "id": 89551, "url": "http://patchwork.ozlabs.org/api/1.2/people/89551/?format=api", "name": "Alex Elder", "email": "elder@riscstar.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260501155421.3329862-8-elder@riscstar.com/mbox/", "series": [ { "id": 502478, "url": "http://patchwork.ozlabs.org/api/1.2/series/502478/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=502478", "date": "2026-05-01T15:54:09", "name": "net: enable TC956x support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502478/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231945/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231945/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-35959-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=riscstar-com.20251104.gappssmtp.com\n header.i=@riscstar-com.20251104.gappssmtp.com header.a=rsa-sha256\n header.s=20251104 header.b=JOF3DMg8;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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Ethernet on this chip is provided\nby a DesignWare XGMAC.\n\nOne consequence of the SoC-like design is that the internal AXI bus\n(used by the XGMAC for DMA) maps the PCI DMA space with a non-zero base\naddress. This requires a translation step (happily just simple addition)\nto convert the PCI DMA address to the hardware DMA address.\n\nThis is pretty funky so rather than push that translation logic into\nthe core driver we intend to keep that logic inside the TC956x\nplatform code. In order to do that we need to export a few symbols\nto allow us to override some of the DMA and descriptor op tables.\n\nFWIW this approach to overriding the ops tables is similar to the\nmechanism currently found in dwmac-loongson.c (with the exception\nthat we have also exported a couple of functions so we don't\nhave to replicate their content in the TC956x platform code).\n\nSigned-off-by: Daniel Thompson <daniel@riscstar.com>\nSigned-off-by: Alex Elder <elder@riscstar.com>\n---\n drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 7 +++++++\n .../ethernet/stmicro/stmmac/dwxgmac2_core.c | 1 +\n .../ethernet/stmicro/stmmac/dwxgmac2_descs.c | 1 +\n .../net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 18 ++++++++++--------\n 4 files changed, 19 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h\nindex bcf59ad8a1939..8cecde1bef8a1 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h\n+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h\n@@ -468,4 +468,11 @@ extern const struct stmmac_dma_ops dwxgmac210_dma_ops;\n extern const struct stmmac_dma_ops dwxgmac301_dma_ops;\n extern const struct stmmac_desc_ops dwxgmac210_desc_ops;\n \n+void dwxgmac2_dma_init_rx_chan(struct stmmac_priv *priv, void __iomem *ioaddr,\n+\t\t\t struct stmmac_dma_cfg *dma_cfg, dma_addr_t phy,\n+\t\t\t u32 chan);\n+void dwxgmac2_dma_init_tx_chan(struct stmmac_priv *priv, void __iomem *ioaddr,\n+\t\t\t struct stmmac_dma_cfg *dma_cfg, dma_addr_t phy,\n+\t\t\t u32 chan);\n+\n #endif /* __STMMAC_DWXGMAC2_H__ */\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c\nindex f02b434bbd505..c9547dc6912a3 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c\n@@ -1556,6 +1556,7 @@ int dwxgmac2_setup(struct stmmac_priv *priv)\n \n \treturn 0;\n }\n+EXPORT_SYMBOL_GPL(dwxgmac2_setup);\n \n int dwxlgmac2_setup(struct stmmac_priv *priv)\n {\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c\nindex b5f200a874840..cc67d8e1a920a 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c\n@@ -368,3 +368,4 @@ const struct stmmac_desc_ops dwxgmac210_desc_ops = {\n \t.set_vlan = dwxgmac2_set_vlan,\n \t.set_tbs = dwxgmac2_set_tbs,\n };\n+EXPORT_SYMBOL_GPL(dwxgmac210_desc_ops);\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c\nindex dc2897e9931d1..ec365e66276f1 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c\n@@ -62,10 +62,10 @@ static void dwxgmac2_dma_init_chan(struct stmmac_priv *priv,\n \twritel(XGMAC_DMA_INT_DEFAULT_EN, ioaddr + XGMAC_DMA_CH_INT_EN(chan));\n }\n \n-static void dwxgmac2_dma_init_rx_chan(struct stmmac_priv *priv,\n-\t\t\t\t void __iomem *ioaddr,\n-\t\t\t\t struct stmmac_dma_cfg *dma_cfg,\n-\t\t\t\t dma_addr_t phy, u32 chan)\n+void dwxgmac2_dma_init_rx_chan(struct stmmac_priv *priv,\n+\t\t\t void __iomem *ioaddr,\n+\t\t\t struct stmmac_dma_cfg *dma_cfg,\n+\t\t\t dma_addr_t phy, u32 chan)\n {\n \tu32 rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl;\n \tu32 value;\n@@ -77,11 +77,11 @@ static void dwxgmac2_dma_init_rx_chan(struct stmmac_priv *priv,\n \twritel(upper_32_bits(phy), ioaddr + XGMAC_DMA_CH_RxDESC_HADDR(chan));\n \twritel(lower_32_bits(phy), ioaddr + XGMAC_DMA_CH_RxDESC_LADDR(chan));\n }\n+EXPORT_SYMBOL_GPL(dwxgmac2_dma_init_rx_chan);\n \n-static void dwxgmac2_dma_init_tx_chan(struct stmmac_priv *priv,\n-\t\t\t\t void __iomem *ioaddr,\n-\t\t\t\t struct stmmac_dma_cfg *dma_cfg,\n-\t\t\t\t dma_addr_t phy, u32 chan)\n+void dwxgmac2_dma_init_tx_chan(struct stmmac_priv *priv, void __iomem *ioaddr,\n+\t\t\t struct stmmac_dma_cfg *dma_cfg, dma_addr_t phy,\n+\t\t\t u32 chan)\n {\n \tu32 txpbl = dma_cfg->txpbl ?: dma_cfg->pbl;\n \tu32 value;\n@@ -93,6 +93,7 @@ static void dwxgmac2_dma_init_tx_chan(struct stmmac_priv *priv,\n \twritel(upper_32_bits(phy), ioaddr + XGMAC_DMA_CH_TxDESC_HADDR(chan));\n \twritel(lower_32_bits(phy), ioaddr + XGMAC_DMA_CH_TxDESC_LADDR(chan));\n }\n+EXPORT_SYMBOL_GPL(dwxgmac2_dma_init_tx_chan);\n \n static void dwxgmac2_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)\n {\n@@ -671,3 +672,4 @@ const struct stmmac_dma_ops dwxgmac301_dma_ops = {\n \t.enable_sph = dwxgmac2_enable_sph,\n \t.enable_tbs = dwxgmac2_enable_tbs,\n };\n+EXPORT_SYMBOL_GPL(dwxgmac301_dma_ops);\n", "prefixes": [ "net-next", "07/12" ] }