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GET /api/1.2/patches/2230938/?format=api
{ "id": 2230938, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2230938/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260430084414.1354490-12-richard.genoud@bootlin.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.2/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260430084414.1354490-12-richard.genoud@bootlin.com>", "list_archive_url": null, "date": "2026-04-30T08:44:04", "name": "[11/20] mach-k3: r5: common: add helper functions needed in LPM resume sequence", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6a9057e7c6ed507dfa05f8f98247520cbd991cd8", "submitter": { "id": 88519, "url": "http://patchwork.ozlabs.org/api/1.2/people/88519/?format=api", "name": "Richard Genoud (TI)", "email": "richard.genoud@bootlin.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/1.2/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260430084414.1354490-12-richard.genoud@bootlin.com/mbox/", "series": [ { "id": 502237, "url": "http://patchwork.ozlabs.org/api/1.2/series/502237/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=502237", "date": "2026-04-30T08:43:53", "name": "Introduce resume for J7xx SoCs", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502237/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230938/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230938/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=V1ghUU/d;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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Thu, 30 Apr 2026 10:44:59 +0200 (CEST)", "from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 71AB18460D\n for <u-boot@lists.denx.de>; Thu, 30 Apr 2026 10:44:56 +0200 (CEST)", "from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233])\n by smtpout-03.galae.net (Postfix) with ESMTPS id 20C5B4E42B8A;\n Thu, 30 Apr 2026 08:44:56 +0000 (UTC)", "from mail.galae.net (mail.galae.net [212.83.136.155])\n by smtpout-01.galae.net (Postfix) with ESMTPS id D7FAD60495;\n Thu, 30 Apr 2026 08:44:55 +0000 (UTC)", "from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon)\n with ESMTPSA id 167A91072B7A6;\n Thu, 30 Apr 2026 10:44:51 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n t=1777538694; h=from:subject:date:message-id:to:cc:mime-version:\n content-transfer-encoding:in-reply-to:references;\n bh=2K4M6p2l59BpMlosSRnfhdxpC8PULctHsyTqbp8u5yY=;\n b=V1ghUU/dQQW43JQ3Vvv/01vaMOfAqiH85pcXgIAdl/5MwvK8vazxghGth1X20LpTXeR+ed\n Ks2yBD7KAeBH1+JhoMoh4tKPiWEntDtJfwIHgVgp6IkglRvDP3y1seDRmJulZb3HJwq/2D\n pcXWXTgfZpAdwLCNR9AN/fKcNSh07gN08geUdr99gTcMQQGQxawXGzJpckmGqwCT2WmzWr\n 45xpvlM8mno/QfzMlXV4BYfu+fJuR+LwdLZYFavgfNU+Q4yX1a+cwu+V1e6kght74PMbJ+\n X33OFbsnC/7Bz1Uk8OZAhTLY6UmXkDoTEuCQaCgbis0dgzyCJqh6FBiL8ExfdA==", "From": "\"Richard Genoud (TI)\" <richard.genoud@bootlin.com>", "To": "Tom Rini <trini@konsulko.com>, Manorit Chawdhry <m-chawdhry@ti.com>,\n Apurva Nandan <a-nandan@ti.com>, \"Andrew F . Davis\" <afd@ti.com>,\n Vignesh Raghavendra <vigneshr@ti.com>, Bryan Brattlof <bb@ti.com>,\n Vaishnav Achath <vaishnav.a@ti.com>, Jayesh Choudhary <j-choudhary@ti.com>,\n Simon Glass <sjg@chromium.org>, Alper Nebi Yasak <alpernebiyasak@gmail.com>", "Cc": "Markus Schneider-Pargmann <msp@baylibre.com>,\n Udit Kumar <u-kumar1@ti.com>,\n Abhash Kumar <a-kumar2@ti.com>,\n Thomas Richard <thomas.richard@bootlin.com>,\n Gregory CLEMENT <gregory.clement@bootlin.com>,\n Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Richard Genoud <richard.genoud@bootlin.com>, u-boot@lists.denx.de", "Subject": "[PATCH 11/20] mach-k3: r5: common: add helper functions needed in LPM\n resume sequence", "Date": "Thu, 30 Apr 2026 10:44:04 +0200", "Message-ID": "<20260430084414.1354490-12-richard.genoud@bootlin.com>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260430084414.1354490-1-richard.genoud@bootlin.com>", "References": "<20260430084414.1354490-1-richard.genoud@bootlin.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Last-TLS-Session-Version": "TLSv1.3", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Prasanth Babu Mantena <p-mantena@ti.com>\n\nAdd helper functions that are used by respective SoCs in LPM resume flow.\n\n- lpm_process() is called at boot time to:\n - retrieve the LPM memory region from DTS\n - save ATF/OPTEE certificates information and DM code in this memory\n region\n - Forward the LPM address to TIFS via TISCI_MSG_LPM_SAVE_ADDR\nTIFS will use this address to save TFA context and its own minimal\ncontext just before suspend.\n\n- do_resume() is called at resume, just after bringing the DDR out of\n retention to:\n - retrieve the LPM memory region from DTS\n - authenticate certificates from LPM memory region and apply firewalls\n - ask TIFS to restore TFA and its own minimal context\n - start TFA on remote proc\n - load and jump to DM\n\nhttps://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/lpm.html#lpm-msg-lpm-save-addr\n\nSigned-off-by: Prasanth Babu Mantena <p-mantena@ti.com>\nCo-developed-by: Richard Genoud (TI) <richard.genoud@bootlin.com>\nSigned-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com>\n---\n arch/arm/mach-k3/common.h | 16 +++\n arch/arm/mach-k3/lpm-common.h | 15 ++\n arch/arm/mach-k3/r5/Kconfig | 4 +\n arch/arm/mach-k3/r5/Makefile | 1 +\n arch/arm/mach-k3/r5/common.c | 17 +--\n arch/arm/mach-k3/r5/lpm-common.c | 228 +++++++++++++++++++++++++++++++\n 6 files changed, 269 insertions(+), 12 deletions(-)\n create mode 100644 arch/arm/mach-k3/lpm-common.h\n create mode 100644 arch/arm/mach-k3/r5/lpm-common.c", "diff": "diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h\nindex e970076d08ec..50e670f845e3 100644\n--- a/arch/arm/mach-k3/common.h\n+++ b/arch/arm/mach-k3/common.h\n@@ -8,6 +8,7 @@\n \n #include <asm/armv7_mpu.h>\n #include <asm/hardware.h>\n+#include <image.h>\n #include <mach/security.h>\n \n /* keep ram_top in the 32-bit address space */\n@@ -16,6 +17,21 @@\n #define K3_FIREWALL_BACKGROUND_BIT\t(8)\n #define K3_SPEED_GRADE_UNKNOWN\t\t'\\0'\n \n+#if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)\n+enum {\n+\tIMAGE_ID_ATF,\n+\tIMAGE_ID_OPTEE,\n+\tIMAGE_ID_SPL,\n+\tIMAGE_ID_DM_FW,\n+\tIMAGE_ID_TIFSSTUB_HS,\n+\tIMAGE_ID_TIFSSTUB_FS,\n+\tIMAGE_ID_TIFSSTUB_GP,\n+\tIMAGE_AMT,\n+};\n+\n+extern struct image_info fit_image_info[IMAGE_AMT];\n+#endif\n+\n struct fwl_data {\n \tconst char *name;\n \tu16 fwl_id;\ndiff --git a/arch/arm/mach-k3/lpm-common.h b/arch/arm/mach-k3/lpm-common.h\nnew file mode 100644\nindex 000000000000..2b360e6f03f3\n--- /dev/null\n+++ b/arch/arm/mach-k3/lpm-common.h\n@@ -0,0 +1,15 @@\n+/* SPDX-License-Identifier: GPL-2.0+ */\n+/*\n+ * K3: LPM Architecture common definitions\n+ *\n+ * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/\n+ * Copyright (C) 2026 Bootlin\n+ */\n+\n+#ifndef _LPM_COMMON_H_\n+#define _LPM_COMMON_H_\n+\n+void __noreturn do_resume(void);\n+void lpm_process(void);\n+\n+#endif\ndiff --git a/arch/arm/mach-k3/r5/Kconfig b/arch/arm/mach-k3/r5/Kconfig\nindex 12335880e106..7a9c005a6d7c 100644\n--- a/arch/arm/mach-k3/r5/Kconfig\n+++ b/arch/arm/mach-k3/r5/Kconfig\n@@ -1,6 +1,10 @@\n config K3_LOAD_SYSFW\n \tbool\n \n+config K3_LPM\n+\tbool\n+\tdefault y if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J784S4 || SOC_K3_J722S || SOC_K3_J721S2\n+\n config K3_OPP_LOW\n \tdepends on ARCH_K3 && K3_AVS0\n \tbool \"Enable OPP_LOW on supported TI K3 SoCs\"\ndiff --git a/arch/arm/mach-k3/r5/Makefile b/arch/arm/mach-k3/r5/Makefile\nindex 074e3b61a262..ccededbc0d60 100644\n--- a/arch/arm/mach-k3/r5/Makefile\n+++ b/arch/arm/mach-k3/r5/Makefile\n@@ -13,6 +13,7 @@ obj-$(CONFIG_SOC_K3_J722S) += j722s/\n obj-$(CONFIG_SOC_K3_J784S4) += j784s4/\n \n obj-y += common.o\n+obj-$(CONFIG_K3_LPM) += lpm-common.o\n obj-y += lowlevel_init.o\n obj-y += r5_mpu.o\n \ndiff --git a/arch/arm/mach-k3/r5/common.c b/arch/arm/mach-k3/r5/common.c\nindex 03638366046b..a80e903de85a 100644\n--- a/arch/arm/mach-k3/r5/common.c\n+++ b/arch/arm/mach-k3/r5/common.c\n@@ -18,19 +18,9 @@\n #include <elf.h>\n \n #include \"../common.h\"\n+#include \"../lpm-common.h\"\n \n #if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)\n-enum {\n-\tIMAGE_ID_ATF,\n-\tIMAGE_ID_OPTEE,\n-\tIMAGE_ID_SPL,\n-\tIMAGE_ID_DM_FW,\n-\tIMAGE_ID_TIFSSTUB_HS,\n-\tIMAGE_ID_TIFSSTUB_FS,\n-\tIMAGE_ID_TIFSSTUB_GP,\n-\tIMAGE_AMT,\n-};\n-\n #if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)\n static const char *image_os_match[IMAGE_AMT] = {\n \t\"arm-trusted-firmware\",\n@@ -43,7 +33,7 @@ static const char *image_os_match[IMAGE_AMT] = {\n };\n #endif\n \n-static struct image_info fit_image_info[IMAGE_AMT];\n+struct image_info fit_image_info[IMAGE_AMT];\n \n void init_env(void)\n {\n@@ -170,6 +160,9 @@ void __noreturn jump_to_image(struct spl_image_info *spl_image)\n \tif (ret)\n \t\tpanic(\"%s: ATF failed to load on rproc (%d)\\n\", __func__, ret);\n \n+\tif (IS_ENABLED(CONFIG_K3_LPM))\n+\t\tlpm_process();\n+\n #if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)\n \t/* Authenticate ATF */\n \tvoid *image_addr = (void *)fit_image_info[IMAGE_ID_ATF].image_start;\ndiff --git a/arch/arm/mach-k3/r5/lpm-common.c b/arch/arm/mach-k3/r5/lpm-common.c\nnew file mode 100644\nindex 000000000000..c39d85a43fd2\n--- /dev/null\n+++ b/arch/arm/mach-k3/r5/lpm-common.c\n@@ -0,0 +1,228 @@\n+// SPDX-License-Identifier: GPL-2.0+\n+/*\n+ * K3: R5 Common LPM Architecture initialization\n+ *\n+ * Copyright (C) 2023-2026 Texas Instruments Incorporated - https://www.ti.com/\n+ * Copyright (C) 2026 Bootlin\n+ */\n+\n+#include <clk.h>\n+#include <dm/read.h>\n+#include <elf.h>\n+#include <linux/printk.h>\n+#include <linux/soc/ti/ti_sci_protocol.h>\n+#include <power-domain.h>\n+#include <remoteproc.h>\n+#include <mach/security.h>\n+\n+#include \"../common.h\"\n+#include \"../lpm-common.h\"\n+\n+#define FW_IMAGE_SIZE 0x80000\n+\n+struct lpm_addr_info {\n+\tu32 *context_save_addr;\n+\tu32 *atf_cert_addr;\n+\tu32 *optee_cert_addr;\n+\tu32 *dm_save_addr;\n+\tu32 size;\n+};\n+\n+struct lpm_addr_info mem_addr_lpm;\n+\n+__weak bool j7xx_board_is_resuming(void)\n+{\n+\treturn false;\n+}\n+\n+static int extract_lpm_region(void)\n+{\n+\tofnode node;\n+\tfdt_addr_t lpm_reg_addr;\n+\tfdt_size_t lpm_reg_size;\n+\n+\tnode = ofnode_path(\"/reserved-memory/lpm-memory\");\n+\tif (!ofnode_valid(node)) {\n+\t\tprintf(\"lpm will not be functional\\n\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tlpm_reg_addr = ofnode_get_addr(node);\n+\tif (lpm_reg_addr == FDT_ADDR_T_NONE) {\n+\t\tprintf(\"Can't find a valid reserved node!\\n\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tlpm_reg_size = ofnode_get_size(node);\n+\tif (lpm_reg_size == FDT_ADDR_T_NONE) {\n+\t\tprintf(\"Can't find a valid reserved node!\\n\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tmem_addr_lpm.context_save_addr = (u32 *)lpm_reg_addr;\n+\tmem_addr_lpm.atf_cert_addr = mem_addr_lpm.context_save_addr + FW_IMAGE_SIZE;\n+\tmem_addr_lpm.optee_cert_addr = mem_addr_lpm.atf_cert_addr + FW_IMAGE_SIZE;\n+\tmem_addr_lpm.dm_save_addr = mem_addr_lpm.optee_cert_addr + (2 * FW_IMAGE_SIZE);\n+\tmem_addr_lpm.size = lpm_reg_size;\n+\n+\treturn 0;\n+}\n+\n+static int save_certificate(void)\n+{\n+\tint ret;\n+\n+\tif (!fit_image_info[IMAGE_ID_ATF].image_start ||\n+\t !fit_image_info[IMAGE_ID_OPTEE].image_start ||\n+\t !fit_image_info[IMAGE_ID_DM_FW].image_start) {\n+\t\tpr_err(\"Invalid images to save\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tret = extract_lpm_region();\n+\tif (ret) {\n+\t\tpr_err(\"Cannot find valid LPM address range..\\n\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tmemcpy(mem_addr_lpm.atf_cert_addr,\n+\t (void *)fit_image_info[IMAGE_ID_ATF].image_start,\n+\t fit_image_info[IMAGE_ID_ATF].image_len);\n+\n+\tmemcpy(mem_addr_lpm.optee_cert_addr,\n+\t (void *)fit_image_info[IMAGE_ID_OPTEE].image_start,\n+\t fit_image_info[IMAGE_ID_OPTEE].image_len);\n+\n+\tmemcpy(mem_addr_lpm.dm_save_addr,\n+\t (void *)fit_image_info[IMAGE_ID_DM_FW].image_start,\n+\t fit_image_info[IMAGE_ID_DM_FW].image_len);\n+\n+\treturn 0;\n+}\n+\n+void lpm_process(void)\n+{\n+\tint ret = 0;\n+\tunsigned long save_addr;\n+\tstruct ti_sci_handle *ti_sci = get_ti_sci_handle();\n+\n+\tret = save_certificate();\n+\tif (ret)\n+\t\treturn;\n+\tsave_addr = (unsigned long)mem_addr_lpm.context_save_addr;\n+\tret = ti_sci->ops.lpm_ops.lpm_save_addr(ti_sci, save_addr,\n+\t\t\t\t\t\tmem_addr_lpm.size);\n+\tif (ret)\n+\t\tpr_err(\"TIFS lpm save addr fail\\n\");\n+}\n+\n+static u32 resume_to_dm_f(void)\n+{\n+\tstruct ti_sci_handle *ti_sci = get_ti_sci_handle();\n+\tu32 loadaddr = 0, save_addr = 0;\n+\tint ret = 0;\n+\n+\tloadaddr = (u32)mem_addr_lpm.dm_save_addr;\n+\tif (!valid_elf_image(loadaddr))\n+\t\tpanic(\"%s: DM-Firmware image is not valid, it cannot be loaded\\n\",\n+\t\t __func__);\n+\n+\tloadaddr = load_elf_image_phdr(loadaddr);\n+\tsave_addr = (uintptr_t)mem_addr_lpm.context_save_addr;\n+\tret = ti_sci->ops.lpm_ops.lpm_save_addr(ti_sci, save_addr, mem_addr_lpm.size);\n+\tif (ret)\n+\t\tpanic(\"TIFS lpm save addr fail : %x\\n\", ret);\n+\n+\t/*\n+\t * TIFS minimal context restore\n+\t * This restores also the firewall\n+\t */\n+\tret = ti_sci->ops.lpm_ops.min_context_restore(ti_sci, 0);\n+\tif (ret)\n+\t\tpanic(\"TIFS restore_context failed (%d)\\n\", ret);\n+\n+\t/*\n+\t * Restore TFA in msmc memory\n+\t */\n+\tret = ti_sci->ops.lpm_ops.decrypt_tfa(ti_sci,\n+\t\t\t\t\t CONFIG_K3_ATF_LOAD_ADDR);\n+\tif (ret)\n+\t\tpanic(\"%s: TIFS failed to decrytp TFA : %x\\n\", __func__, ret);\n+\n+\t/* restore TFA resume vectore address in main core */\n+\tret = ti_sci->ops.lpm_ops.core_resume(ti_sci);\n+\tif (ret)\n+\t\tpanic(\"ATF failed to resume (%d)\\n\", ret);\n+\n+\treturn loadaddr;\n+}\n+\n+static void resume_rproc_f(void)\n+{\n+\tstruct power_domain rproc_pwrdmn;\n+\tunsigned long gtc_rate;\n+\tstruct udevice *dev;\n+\tstruct clk gtc_clk;\n+\tvoid *gtc_base;\n+\tint ret;\n+\n+\tret = uclass_get_device_by_seq(UCLASS_REMOTEPROC, 1, &dev);\n+\tif (ret)\n+\t\tpanic(\"Unknown remote processor 1 (%d)\\n\", ret);\n+\n+\tret = power_domain_get_by_index(dev, &rproc_pwrdmn, 1);\n+\tif (ret)\n+\t\tpanic(\"power_domain_get_rproc() failed: %d\\n\", ret);\n+\n+\tret = clk_get_by_index(dev, 0, >c_clk);\n+\tif (ret)\n+\t\tpanic(\"clk_get failed: %d\\n\", ret);\n+\n+\tgtc_base = dev_read_addr_ptr(dev);\n+\tif (!gtc_base)\n+\t\tpanic(\"Get GTC address failed\\n\");\n+\n+\tgtc_rate = clk_get_rate(>c_clk);\n+\n+#define GTC_CNTCR_REG\t0x0\n+#define GTC_CNTFID0_REG\t0x20\n+#define GTC_CNTR_EN\t0x3\n+\t/* TFA expect the Global Timebase Counter to be set-up */\n+\twritel((u32)gtc_rate, gtc_base + GTC_CNTFID0_REG);\n+\twritel(GTC_CNTR_EN, gtc_base + GTC_CNTCR_REG);\n+\n+\tret = power_domain_on(&rproc_pwrdmn);\n+\tif (ret)\n+\t\tpanic(\"power_domain_on failed: %d\\n\", ret);\n+}\n+\n+typedef void __noreturn (*image_entry_noargs_t)(void);\n+\n+void __noreturn do_resume(void)\n+{\n+\timage_entry_noargs_t image_entry;\n+\tu32 loadaddr, size_int = FW_IMAGE_SIZE;\n+\tvoid *image_addr;\n+\tint ret;\n+\n+\tret = extract_lpm_region();\n+\tif (ret)\n+\t\tpanic(\"Cannot find valid LPM address range..LPM resume failed\\n\");\n+\n+\timage_addr = mem_addr_lpm.atf_cert_addr;\n+\tret = rproc_load(1, (ulong)image_addr, 0x200);\n+\tif (ret)\n+\t\tpanic(\"rproc failed to be initialized (%d)\\n\", ret);\n+\n+\tti_secure_image_auth_apply_fwls(&image_addr, &size_int);\n+\n+\timage_addr = mem_addr_lpm.optee_cert_addr;\n+\tti_secure_image_auth_apply_fwls(&image_addr, &size_int);\n+\n+\tloadaddr = resume_to_dm_f();\n+\tprintf(\"Starting ATF on ARM64 core...\\n\\n\");\n+\tresume_rproc_f();\n+\n+\timage_entry = (image_entry_noargs_t)loadaddr;\n+\timage_entry();\n+}\n", "prefixes": [ "11/20" ] }