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GET /api/1.2/patches/2230937/?format=api
{ "id": 2230937, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2230937/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260430084414.1354490-11-richard.genoud@bootlin.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.2/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260430084414.1354490-11-richard.genoud@bootlin.com>", "list_archive_url": null, "date": "2026-04-30T08:44:03", "name": "[10/20] firmware: ti_sci: add low power mode operations", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "4d4cc674c9a77323d61fa0df55a269282c45969b", "submitter": { "id": 88519, "url": "http://patchwork.ozlabs.org/api/1.2/people/88519/?format=api", "name": "Richard Genoud (TI)", "email": "richard.genoud@bootlin.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/1.2/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260430084414.1354490-11-richard.genoud@bootlin.com/mbox/", "series": [ { "id": 502237, "url": "http://patchwork.ozlabs.org/api/1.2/series/502237/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=502237", "date": "2026-04-30T08:43:53", "name": "Introduce resume for J7xx SoCs", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502237/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230937/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230937/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=NPZU3y0R;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Thu, 30 Apr 2026 10:44:56 +0200 (CEST)", "from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id B21EE8460D\n for <u-boot@lists.denx.de>; Thu, 30 Apr 2026 10:44:53 +0200 (CEST)", "from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233])\n by smtpout-03.galae.net (Postfix) with ESMTPS id 597844E42B8A;\n Thu, 30 Apr 2026 08:44:53 +0000 (UTC)", "from mail.galae.net (mail.galae.net [212.83.136.155])\n by smtpout-01.galae.net (Postfix) with ESMTPS id 2D38B60495;\n Thu, 30 Apr 2026 08:44:53 +0000 (UTC)", "from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon)\n with ESMTPSA id 8760A1072B7B3;\n Thu, 30 Apr 2026 10:44:49 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n t=1777538691; h=from:subject:date:message-id:to:cc:mime-version:\n content-transfer-encoding:in-reply-to:references;\n bh=GAvjFm130tg6VrUdljIqQg8Qiz3mDlXSJnDjAoVVobc=;\n b=NPZU3y0RTY5BTbBZoSjjrDtGMF++yaJ2WKTI4t5QqJeRGhRgdT3g5ohaJr+5e0YmAkre7+\n ZJjNHU4LTvMs2ndyg5BQ2VEggly/mUF5JtUif6DG6zUzhOIn1yk8BHSau/E8ZnVpMGVA+e\n UfghM97NyjD24oN1C/JJ0zvZuLk8JG7oprNirfQ7lKZTuXz5qPHPLMtSOrTlRmIqxgR+Tz\n 4XXr6Gh//jai6WOamxxu+X2J8YKyldiDjwWxcJfhOsqZDCY5zhBZEOo54eLKB3PB8xJFEv\n 1Pd6Tgax1Wju45fp7XSuQ7FpzwWGXyCaTKkymJlqyejQ3r3BkhePwguwTDufhQ==", "From": "\"Richard Genoud (TI)\" <richard.genoud@bootlin.com>", "To": "Tom Rini <trini@konsulko.com>, Manorit Chawdhry <m-chawdhry@ti.com>,\n Apurva Nandan <a-nandan@ti.com>, \"Andrew F . Davis\" <afd@ti.com>,\n Vignesh Raghavendra <vigneshr@ti.com>, Bryan Brattlof <bb@ti.com>,\n Vaishnav Achath <vaishnav.a@ti.com>, Jayesh Choudhary <j-choudhary@ti.com>,\n Simon Glass <sjg@chromium.org>, Alper Nebi Yasak <alpernebiyasak@gmail.com>", "Cc": "Markus Schneider-Pargmann <msp@baylibre.com>,\n Udit Kumar <u-kumar1@ti.com>,\n Abhash Kumar <a-kumar2@ti.com>,\n Thomas Richard <thomas.richard@bootlin.com>,\n Gregory CLEMENT <gregory.clement@bootlin.com>,\n Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Richard Genoud <richard.genoud@bootlin.com>, u-boot@lists.denx.de", "Subject": "[PATCH 10/20] firmware: ti_sci: add low power mode operations", "Date": "Thu, 30 Apr 2026 10:44:03 +0200", "Message-ID": "<20260430084414.1354490-11-richard.genoud@bootlin.com>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260430084414.1354490-1-richard.genoud@bootlin.com>", "References": "<20260430084414.1354490-1-richard.genoud@bootlin.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Last-TLS-Session-Version": "TLSv1.3", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Prasanth Babu Mantena <p-mantena@ti.com>\n\nFrom: Prasanth Babu Mantena <p-mantena@ti.com>\n\nOn TI-k3 platform, at resume, uboot SPL needs to do several tasks:\n- restore TIFS minimal context from DDR\n- send DDR save address to TIFS\n- load TFA and its context in MSMC\n- set TFA resume vector to its warm_entrypoint\n- authenticate certificates and apply firewalls\n\nAll those operations are now done by TIFS with those messages:\nti_sci_cmd_min_context_restore\nti_sci_cmd_decrypt_tfa\nti_sci_cmd_core_resume\nti_sci_cmd_lpm_save_addr\nti_sci_cmd_proc_auth_apply_fwls\n\nhttps://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/lpm.html\nhttps://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/security/PROC_BOOT.html\n\nSigned-off-by: Prasanth Babu Mantena <p-mantena@ti.com>\nCo-developed-by: Richard Genoud (TI) <richard.genoud@bootlin.com>\nSigned-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com>\n---\n arch/arm/mach-k3/include/mach/security.h | 1 +\n arch/arm/mach-k3/security.c | 64 ++++++++\n drivers/firmware/ti_sci.c | 179 +++++++++++++++++++++++\n drivers/firmware/ti_sci.h | 92 ++++++++++++\n include/linux/soc/ti/ti_sci_protocol.h | 8 +\n 5 files changed, 344 insertions(+)", "diff": "diff --git a/arch/arm/mach-k3/include/mach/security.h b/arch/arm/mach-k3/include/mach/security.h\nindex 8502b57bd80a..d9f31e1500a1 100644\n--- a/arch/arm/mach-k3/include/mach/security.h\n+++ b/arch/arm/mach-k3/include/mach/security.h\n@@ -9,3 +9,4 @@\n #include <linux/types.h>\n \n void ti_secure_image_post_process(void **p_image, size_t *p_size);\n+void ti_secure_image_auth_apply_fwls(void **p_image, size_t *p_size);\ndiff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c\nindex c7017bba99ab..752912c6930a 100644\n--- a/arch/arm/mach-k3/security.c\n+++ b/arch/arm/mach-k3/security.c\n@@ -133,3 +133,67 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size)\n \t spl_boot_device() == BOOT_DEVICE_UART))\n \t\tprintf(\"Authentication passed\\n\");\n }\n+\n+void ti_secure_image_auth_apply_fwls(void **p_image, size_t *p_size)\n+{\n+\tstruct ti_sci_handle *ti_sci = get_ti_sci_handle();\n+\tstruct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;\n+\tu64 image_addr;\n+\tu32 image_size, backup_size;\n+\tint ret;\n+\n+\timage_size = *p_size;\n+\tbackup_size = image_size;\n+\tif (!image_size) {\n+\t\tdebug(\"%s: Image size is %d\\n\", __func__, image_size);\n+\t\treturn;\n+\t}\n+\n+\tif (get_device_type() == K3_DEVICE_TYPE_GP)\n+\t\treturn;\n+\n+\tif (get_device_type() != K3_DEVICE_TYPE_HS_SE &&\n+\t !ti_secure_cert_detected(*p_image)) {\n+\t\tprintf(\"Warning: Did not detect image signing certificate. \"\n+\t\t \"Skipping authentication to prevent boot failure. \"\n+\t\t \"This will fail on Security Enforcing(HS-SE) devices\\n\");\n+\t\treturn;\n+\t}\n+\n+\t/* Clean out image so it can be seen by system firmware */\n+\timage_addr = dma_map_single(*p_image, *p_size, DMA_BIDIRECTIONAL);\n+\n+\tdebug(\"Authenticating image at address 0x%016llx\\n\", image_addr);\n+\tdebug(\"Authenticating image of size %d bytes\\n\", image_size);\n+\n+\t/* Authenticate image */\n+\tret = proc_ops->proc_auth_apply_fwls(ti_sci, &image_addr, &image_size);\n+\tif (ret) {\n+\t\tprintf(\"Authentication failed..but assume pass!\\n\");\n+\t\thang();\n+\t}\n+\n+\t/* Invalidate any stale lines over data written by system firmware */\n+\tif (backup_size)\n+\t\tdma_unmap_single(image_addr, backup_size, DMA_BIDIRECTIONAL);\n+\n+\t/*\n+\t * The image_size returned may be 0 when the authentication process has\n+\t * moved the image. When this happens no further processing on the\n+\t * image is needed or often even possible as it may have also been\n+\t * placed behind a firewall when moved.\n+\t */\n+\t*p_size = backup_size;\n+\n+\t/*\n+\t * Output notification of successful authentication to re-assure the\n+\t * user that the secure code is being processed as expected. However\n+\t * suppress any such log output in case of building for SPL and booting\n+\t * via YMODEM. This is done to avoid disturbing the YMODEM serial\n+\t * protocol transactions.\n+\t */\n+\tif (!(IS_ENABLED(CONFIG_XPL_BUILD) &&\n+\t IS_ENABLED(CONFIG_SPL_YMODEM_SUPPORT) &&\n+\t spl_boot_device() == BOOT_DEVICE_UART))\n+\t\tprintf(\"Certificate replay passed\\n\");\n+}\ndiff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c\nindex c015bd3cc245..a40f2918d75f 100644\n--- a/drivers/firmware/ti_sci.c\n+++ b/drivers/firmware/ti_sci.c\n@@ -2014,6 +2014,62 @@ static int ti_sci_cmd_set_proc_boot_ctrl(const struct ti_sci_handle *handle,\n \treturn ret;\n }\n \n+/**\n+ * ti_sci_cmd_proc_auth_apply_fwls() - Command to authenticate certificate and\n+ *\t\t\t\t apply the firewalls present in it.\n+ * @handle:\tPointer to TI SCI handle\n+ * @image_addr:\tMemory address at which payload image and certificate is\n+ *\t\tlocated in memory, this is updated if the image data is\n+ *\t\tmoved during authentication.\n+ * @image_size: This is updated with the final size of the image after\n+ *\t\tauthentication.\n+ *\n+ * Return: 0 if all went well, else returns appropriate error value.\n+ */\n+static int ti_sci_cmd_proc_auth_apply_fwls(const struct ti_sci_handle *handle,\n+\t\t\t\t\t u64 *image_addr, u32 *image_size)\n+{\n+\tstruct ti_sci_msg_req_proc_auth_boot_image req;\n+\tstruct ti_sci_msg_resp_proc_auth_boot_image *resp;\n+\tstruct ti_sci_info *info;\n+\tstruct ti_sci_xfer *xfer;\n+\tint ret = 0;\n+\n+\tif (IS_ERR(handle))\n+\t\treturn PTR_ERR(handle);\n+\tif (!handle)\n+\t\treturn -EINVAL;\n+\n+\tinfo = handle_to_ti_sci_info(handle);\n+\n+\txfer = ti_sci_setup_one_xfer(info, TISCI_MSG_PROC_AUTH_APPLY_FWLS,\n+\t\t\t\t TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,\n+\t\t\t\t (u32 *)&req, sizeof(req), sizeof(*resp));\n+\tif (IS_ERR(xfer)) {\n+\t\tret = PTR_ERR(xfer);\n+\t\tprintf(\"%s Error making the tisci command\\n\", __func__);\n+\t\treturn ret;\n+\t}\n+\treq.cert_addr_low = *image_addr & TISCI_ADDR_LOW_MASK;\n+\treq.cert_addr_high = (*image_addr & TISCI_ADDR_HIGH_MASK) >>\n+\t\t\t\tTISCI_ADDR_HIGH_SHIFT;\n+\n+\tret = ti_sci_do_xfer(info, xfer);\n+\tif (ret) {\n+\t\tprintf(\"%s Error sending the tisci command\\n\", __func__);\n+\t\treturn ret;\n+\t}\n+\n+\tresp = (struct ti_sci_msg_resp_proc_auth_boot_image *)xfer->tx_message.buf;\n+\n+\t*image_addr = (resp->image_addr_low & TISCI_ADDR_LOW_MASK) |\n+\t\t\t(((u64)resp->image_addr_high <<\n+\t\t\t TISCI_ADDR_HIGH_SHIFT) & TISCI_ADDR_HIGH_MASK);\n+\t*image_size = resp->image_size;\n+\n+\treturn ret;\n+}\n+\n /**\n * ti_sci_cmd_proc_auth_boot_image() - Command to authenticate and load the\n *\t\t\timage and then set the processor configuration flags.\n@@ -2745,6 +2801,125 @@ static int ti_sci_cmd_min_context_restore(const struct ti_sci_handle *handle, u6\n \treturn ret;\n }\n \n+/**\n+ * ti_sci_cmd_decrypt_tfa() - Request for decrypting TFA to specific address.\n+ * @handle: pointer to TI SCI handle\n+ * @unencrypted_address: Address where the unencrypted TFA will be restored to.\n+ *\n+ * Return: 0 if all went well, else returns appropriate error value.\n+ */\n+static int ti_sci_cmd_decrypt_tfa(const struct ti_sci_handle *handle,\n+\t\t\t\t u64 unencrypted_address)\n+{\n+\tstruct ti_sci_msg_decrypt_tfa_req req;\n+\tstruct ti_sci_msg_decrypt_tfa_resp *resp;\n+\tstruct ti_sci_info *info;\n+\tstruct ti_sci_xfer *xfer;\n+\tint ret = 0;\n+\n+\tif (IS_ERR(handle))\n+\t\treturn PTR_ERR(handle);\n+\tif (!handle)\n+\t\treturn -EINVAL;\n+\n+\tinfo = handle_to_ti_sci_info(handle);\n+\n+\txfer = ti_sci_setup_one_xfer(info, TISCI_MSG_LPM_DECRYPT,\n+\t\t\t\t TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,\n+\t\t\t\t (u32 *)&req, sizeof(req), sizeof(*resp));\n+\tif (IS_ERR(xfer)) {\n+\t\tret = PTR_ERR(xfer);\n+\t\treturn ret;\n+\t}\n+\n+\treq.unencrypted_address = unencrypted_address;\n+\n+\tret = ti_sci_do_xfer(info, xfer);\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * ti_sci_cmd_core_resume() - Request for resuming TFA.\n+ *\n+ * The TIFS will launch the TFA from the entrypoint saved via the ENTER_SLEEP\n+ * message.\n+ *\n+ * @handle: pointer to TI SCI handle\n+ *\n+ * Return: 0 if all went well, else returns appropriate error value.\n+ */\n+static int ti_sci_cmd_core_resume(const struct ti_sci_handle *handle)\n+{\n+\tstruct ti_sci_msg_core_resume_req req;\n+\tstruct ti_sci_msg_core_resume_resp *resp;\n+\tstruct ti_sci_info *info;\n+\tstruct ti_sci_xfer *xfer;\n+\tint ret = 0;\n+\n+\tif (IS_ERR(handle))\n+\t\treturn PTR_ERR(handle);\n+\tif (!handle)\n+\t\treturn -EINVAL;\n+\n+\tinfo = handle_to_ti_sci_info(handle);\n+\n+\txfer = ti_sci_setup_one_xfer(info, TISCI_MSG_CORE_RESUME,\n+\t\t\t\t TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,\n+\t\t\t\t (u32 *)&req, sizeof(req), sizeof(*resp));\n+\tif (IS_ERR(xfer)) {\n+\t\tret = PTR_ERR(xfer);\n+\t\treturn ret;\n+\t}\n+\n+\tret = ti_sci_do_xfer(info, xfer);\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * ti_sci_cmd_lpm_save_addr() - Message to inform TIFS about the context save address.\n+ *\n+ * By restoring its context, TIFS will restore its firewall.\n+ *\n+ * @handle: pointer to TI SCI handle\n+ * @ctx_addr: address where the context will be store to and restored from\n+ * @size:\t Size of the context save region\n+ *\n+ * Return: 0 if all went well, else returns appropriate error value.\n+ */\n+static int ti_sci_cmd_lpm_save_addr(const struct ti_sci_handle *handle,\n+\t\t\t\t u64 context_addr, u32 size)\n+{\n+\tstruct tisci_msg_lpm_save_ctx_addr_req req;\n+\tstruct tisci_msg_lpm_save_ctx_addr_resp *resp;\n+\tstruct ti_sci_info *info;\n+\tstruct ti_sci_xfer *xfer;\n+\tint ret = 0;\n+\n+\tif (IS_ERR(handle))\n+\t\treturn PTR_ERR(handle);\n+\tif (!handle)\n+\t\treturn -EINVAL;\n+\n+\tinfo = handle_to_ti_sci_info(handle);\n+\n+\txfer = ti_sci_setup_one_xfer(info, TISCI_MSG_LPM_SAVE_ADDR,\n+\t\t\t\t TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,\n+\t\t\t\t (u32 *)&req, sizeof(req), sizeof(*resp));\n+\tif (IS_ERR(xfer)) {\n+\t\tret = PTR_ERR(xfer);\n+\t\treturn ret;\n+\t}\n+\n+\treq.ctx_addr = context_addr;\n+\treq.size = size;\n+\n+\tret = ti_sci_do_xfer(info, xfer);\n+\n+\treturn ret;\n+}\n+\n /*\n * ti_sci_setup_ops() - Setup the operations structures\n * @info:\tpointer to TISCI pointer\n@@ -2813,6 +2988,7 @@ static void ti_sci_setup_ops(struct ti_sci_info *info)\n \tpops->set_proc_boot_cfg = ti_sci_cmd_set_proc_boot_cfg;\n \tpops->set_proc_boot_ctrl = ti_sci_cmd_set_proc_boot_ctrl;\n \tpops->proc_auth_boot_image = ti_sci_cmd_proc_auth_boot_image;\n+\tpops->proc_auth_apply_fwls = ti_sci_cmd_proc_auth_apply_fwls;\n \tpops->get_proc_boot_status = ti_sci_cmd_get_proc_boot_status;\n \tpops->proc_shutdown_no_wait = ti_sci_cmd_proc_shutdown_no_wait;\n \n@@ -2833,6 +3009,9 @@ static void ti_sci_setup_ops(struct ti_sci_info *info)\n \tfw_ops->query_dm_cap = ti_sci_cmd_query_dm_cap;\n \n \tlpm_ops->min_context_restore = ti_sci_cmd_min_context_restore;\n+\tlpm_ops->decrypt_tfa = ti_sci_cmd_decrypt_tfa;\n+\tlpm_ops->core_resume = ti_sci_cmd_core_resume;\n+\tlpm_ops->lpm_save_addr = ti_sci_cmd_lpm_save_addr;\n }\n \n /**\ndiff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h\nindex 68908c6c8c46..8fb519b62dbd 100644\n--- a/drivers/firmware/ti_sci.h\n+++ b/drivers/firmware/ti_sci.h\n@@ -57,6 +57,7 @@\n #define TISCI_MSG_PROC_AUTH_BOOT_IMAGE\t0xc120\n #define TISCI_MSG_GET_PROC_BOOT_STATUS\t0xc400\n #define TISCI_MSG_WAIT_PROC_BOOT_STATUS\t0xc401\n+#define TISCI_MSG_PROC_AUTH_APPLY_FWLS\t0xc402\n \n /* Resource Management Requests */\n #define TI_SCI_MSG_GET_RESOURCE_RANGE\t0x1500\n@@ -85,6 +86,24 @@\n #define TISCI_MSG_FWL_GET\t\t0x9001\n #define TISCI_MSG_FWL_CHANGE_OWNER\t0x9002\n \n+/* LPM requests */\n+#define TISCI_MSG_SYNC_RESUME\t\t\t(0x0302U)\n+#define TISCI_MSG_CONTINUE_RESUME\t\t(0x0303U)\n+#define TISCI_MSG_CORE_RESUME\t\t\t(0x0304U)\n+#define TISCI_MSG_ABORT_ENTER_SLEEP\t\t(0x0305U)\n+#define TISCI_MSG_LPM_WAKE_REASON\t\t(0x0306U)\n+#define TISCI_MSG_SET_IO_ISOLATION\t\t(0x0307U)\n+#define TISCI_MSG_MIN_CONTEXT_RESTORE\t\t(0x0308U)\n+#define TISCI_MSG_LPM_SET_DEVICE_CONSTRAINT\t(0x0309U)\n+#define TISCI_MSG_LPM_SET_LATENCY_CONSTRAINT\t(0x030AU)\n+#define TISCI_MSG_LPM_GET_DEVICE_CONSTRAINT\t(0x030BU)\n+#define TISCI_MSG_LPM_GET_LATENCY_CONSTRAINT\t(0x030CU)\n+#define TISCI_MSG_LPM_GET_NEXT_SYS_MODE\t\t(0x030DU)\n+#define TISCI_MSG_LPM_GET_NEXT_HOST_STATE\t(0x030EU)\n+#define TISCI_MSG_LPM_ENCRYPT\t\t\t(0x030FU)\n+#define TISCI_MSG_LPM_DECRYPT\t\t\t(0x0310U)\n+#define TISCI_MSG_LPM_SAVE_ADDR\t\t\t(0x0313U)\n+\n /**\n * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses\n * @type:\tType of messages: One of TI_SCI_MSG* values\n@@ -1588,4 +1607,77 @@ struct ti_sci_msg_min_restore_context_req {\n \tu32\t\t\tctx_hi;\n } __packed;\n \n+/*\n+ * struct ti_sci_msg_core_resume_req - Request for TISCI_MSG_CORE_RESUME.\n+ *\n+ * @hdr:\t\t\tGeneric Header\n+ *\n+ * This message is to be sent to start the TFA on the main core.\n+ * The TIFS will launch the TFA from the entrypoint saved via the ENTER_SLEEP\n+ * message.\n+ */\n+struct ti_sci_msg_core_resume_req {\n+\tstruct ti_sci_msg_hdr\thdr;\n+} __packed;\n+\n+/**\n+ * struct ti_sci_msg_core_resume_resp - Response for TISCI_MSG_CORE_RESUME.\n+ *\n+ * @hdr:\t\t\tGeneric Header\n+ */\n+struct ti_sci_msg_core_resume_resp {\n+\tstruct ti_sci_msg_hdr\thdr;\n+} __packed;\n+\n+/**\n+ * struct ti_sci_msg_decrypt_tfa_req - Request for TISCI_MSG_LPM_DECRYPT.\n+ *\n+ * @hdr:\t\t\tGeneric Header\n+ * @unencrypted_address:\tAddress where the TFA should be decrypted\n+ * @encrypted_address:\t\tAddress where the TFA lies encrypted\n+ *\n+ * This message is to be sent when the system is resuming from suspend, in order\n+ * to restore the TFA.\n+ * The TIFS will decrypt the TFA at specified location and restore it in SRAM.\n+ */\n+struct ti_sci_msg_decrypt_tfa_req {\n+\tstruct ti_sci_msg_hdr\thdr;\n+\tu64\t\t\tunencrypted_address;\n+} __packed;\n+\n+/**\n+ * struct ti_sci_msg_decrypt_tfa_resp - Response for TISCI_MSG_LPM_DECRYPT.\n+ *\n+ * @hdr:\t\t\tGeneric Header\n+ */\n+struct ti_sci_msg_decrypt_tfa_resp {\n+\tstruct ti_sci_msg_hdr\thdr;\n+} __packed;\n+\n+/**\n+ * struct tisci_msg_lpm_save_ctx_addr_req - Request for TISCI_MSG_LPM_SAVE_ADDR.\n+ *\n+ * @hdr:\t\t\tGeneric Header\n+ * @ctx_addr:\tAddress where the LPM data is to be saved\n+ * @size:\t\tSize of the context save memory region\n+ *\n+ * This message is sent to TIFS to inform it about the addresse where it\n+ * will save the context to in case of system suspend and where to get the\n+ * context back from when resuming the system\n+ */\n+struct tisci_msg_lpm_save_ctx_addr_req {\n+\tstruct ti_sci_msg_hdr\thdr;\n+\tu64\t\t\tctx_addr;\n+\tu32\t\t\tsize;\n+} __packed;\n+\n+/**\n+ * struct tisci_msg_lpm_save_ctx_addr_resp - Response for TISCI_MSG_SAVE_ADDR.\n+ *\n+ * @hdr:\t\t\tGeneric Header\n+ */\n+struct tisci_msg_lpm_save_ctx_addr_resp {\n+\tstruct ti_sci_msg_hdr\thdr;\n+} __packed;\n+\n #endif /* __TI_SCI_H */\ndiff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h\nindex 6b1dd801f5f8..1d0a6340e1ee 100644\n--- a/include/linux/soc/ti/ti_sci_protocol.h\n+++ b/include/linux/soc/ti/ti_sci_protocol.h\n@@ -336,6 +336,8 @@ struct ti_sci_proc_ops {\n \t\t\t\t u32 *sts_flags);\n \tint (*proc_shutdown_no_wait)(const struct ti_sci_handle *handle,\n \t\t\t\t u8 pid);\n+\tint (*proc_auth_apply_fwls)(const struct ti_sci_handle *handle,\n+\t\t\t\t u64 *image_addr, u32 *image_size);\n };\n \n #define TI_SCI_RING_MODE_RING\t\t\t(0)\n@@ -635,9 +637,15 @@ struct ti_sci_fwl_ops {\n /**\n * struct ti_sci_lpm_ops - Low Power Mode operations\n * @min_context_restore: Request restoring context from DDR.\n+ * @decrypt_tfa: Request for decrypting TFA at specific address.\n+ * @core_resume: Request for resuming TFA once decrypted.\n+ * @lpm_save_addr: Send DDR Save address to TIFS\n */\n struct ti_sci_lpm_ops {\n \tint (*min_context_restore)(const struct ti_sci_handle *handle, u64 ctx_addr);\n+\tint (*decrypt_tfa)(const struct ti_sci_handle *handle,\tu64 unencrypted_address);\n+\tint (*core_resume)(const struct ti_sci_handle *handle);\n+\tint (*lpm_save_addr)(const struct ti_sci_handle *handle, u64 context_addr, u32 size);\n };\n \n /**\n", "prefixes": [ "10/20" ] }