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GET /api/1.2/patches/2228553/?format=api
{ "id": 2228553, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2228553/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.2/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com>", "list_archive_url": null, "date": "2026-04-27T01:32:10", "name": "[v4,1/3] riscv: add UltraRISC SoC family Kconfig support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "94a8dda831c7b228dbc6f163f6a8b9b50b731975", "submitter": { "id": 92886, "url": "http://patchwork.ozlabs.org/api/1.2/people/92886/?format=api", "name": "Jia Wang", "email": "wangjia@ultrarisc.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com/mbox/", "series": [ { "id": 501558, "url": "http://patchwork.ozlabs.org/api/1.2/series/501558/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=501558", "date": "2026-04-27T01:32:09", "name": "riscv: Add PCIe support for UltraRISC DP1000 SoC", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/501558/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2228553/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2228553/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-53180-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ultrarisc.com header.i=@ultrarisc.com\n header.a=rsa-sha256 header.s=dkim header.b=hKPFaOWu;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=104.64.211.4; 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smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=ultrarisc.com;\n spf=pass smtp.mailfrom=ultrarisc.com;\n dkim=pass (1024-bit key) header.d=ultrarisc.com header.i=@ultrarisc.com\n header.b=hKPFaOWu; arc=none smtp.client-ip=218.76.62.146", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=ultrarisc.com; s=dkim; h=Received:From:Date:Subject:\n\tMIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:\n\tReferences:In-Reply-To:To:Cc; bh=eQFrKZlyykJUvAf7cH1ltvcwo0fJKri\n\txuIUmANqBSKM=; b=hKPFaOWurshbXRPwokWX++MQJ0h5ALZ1vk7HqZrShy1ai5H\n\taAH0+CUxhoA6I8YaI4p0ZUYf/mJ/3qJIaPb9JttMuVU6wDJ5FRJdrGtSTgt1aU1M\n\tBlc/rSuyD0KMUyvUqk+UFXreQEcDWSQE0XML9sg2mPg/RiKuTGx9GJB50oxo=", "From": "Jia Wang <wangjia@ultrarisc.com>", "Date": "Mon, 27 Apr 2026 09:32:10 +0800", "Subject": "[PATCH v4 1/3] riscv: add UltraRISC SoC family Kconfig support", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com>", "References": "<20260427-ultrarisc-pcie-v4-0-98935f6cdfb5@ultrarisc.com>", "In-Reply-To": "<20260427-ultrarisc-pcie-v4-0-98935f6cdfb5@ultrarisc.com>", "To": "Paul Walmsley <pjw@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>,\n Albert Ou <aou@eecs.berkeley.edu>, Alexandre Ghiti <alex@ghiti.fr>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy?=\n\t=?utf-8?q?=C5=84ski?= <kwilczynski@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>, Jingoo Han <jingoohan1@gmail.com>,\n Xincheng Zhang <zhangxincheng@ultrarisc.com>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>", "Cc": "linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,\n linux-pci@vger.kernel.org, devicetree@vger.kernel.org,\n Jia Wang <wangjia@ultrarisc.com>, Conor Dooley <conor.dooley@microchip.com>", "X-Mailer": "b4 0.15-dev", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1777253539; l=811;\n i=wangjia@ultrarisc.com; s=20260309; h=from:subject:message-id;\n bh=k7xaltOxr1FPtLfLBpXG0T+uklw6wvxgverm552wOjM=;\n b=zaln2mLqZ1Yv0Fad/TPkjQDpkYqh8P2/CDZDbEDXOJQ2aHm+YQx0BCCsrZqUwqQ/c6+1CnQ7h\n jm6uQnLUiWhBRsVJyQ6/6hJBb9dWVbls9r9OlCy6OpCwlicJfG6NJO5", "X-Developer-Key": "i=wangjia@ultrarisc.com; a=ed25519;\n pk=XvYkrelqJIIzobY7j+nIg8rsfv5kzaOzuc1UPhd087U=", "X-CM-TRANSID": "AQAAfwA3cULPvO5ps_0CAA--.1758S3", "X-Coremail-Antispam": "1UD129KBjvdXoW7Jw45XFy3Xry8JF1Uuw1Utrb_yoW3ZFb_C3\n\t4xJ348ZFyrAFW09a98Wrs3WF95Aws5WFy5Gr1ftryDuryxXw1xW3yDKr1jyw1Uuw15Xay8\n\tXrZayFWfAryayjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT\n\t9fnUUIcSsGvfJ3UbIYCTnIWIevJa73UjIFyTuYvj4RJUUUUUUUU", "X-CM-SenderInfo": "pzdqwylld63zxwud2x1vfou0bp/1tbiAQAKEWnti78ABQAAsv" }, "content": "The first SoC in the UltraRISC series is UR-DP1000, containing octa\nUltraRISC CP100 cores.\n\nSigned-off-by: Jia Wang <wangjia@ultrarisc.com>\nAcked-by: Conor Dooley <conor.dooley@microchip.com>\n---\n arch/riscv/Kconfig.socs | 6 ++++++\n 1 file changed, 6 insertions(+)", "diff": "diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs\nindex d621b85dd63b..0b4d06a7b4bf 100644\n--- a/arch/riscv/Kconfig.socs\n+++ b/arch/riscv/Kconfig.socs\n@@ -84,6 +84,12 @@ config ARCH_THEAD\n \thelp\n \t This enables support for the RISC-V based T-HEAD SoCs.\n \n+config ARCH_ULTRARISC\n+\tbool \"UltraRISC RISC-V SoCs\"\n+\thelp\n+\t This enables support for UltraRISC SoC platform hardware,\n+\t including boards based on the UR-DP1000.\n+\n config ARCH_VIRT\n \tbool \"QEMU Virt Machine\"\n \tselect POWER_RESET\n", "prefixes": [ "v4", "1/3" ] }