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GET /api/1.2/patches/2226291/?format=api
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{
    "id": 2226291,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/2226291/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuboj6scw.gcc.gcc-TEST.antoyo.29.1.1@forge-stage.sourceware.org/",
    "project": {
        "id": 17,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/17/?format=api",
        "name": "GNU Compiler Collection",
        "link_name": "gcc",
        "list_id": "gcc-patches.gcc.gnu.org",
        "list_email": "gcc-patches@gcc.gnu.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<bmm.hhuboj6scw.gcc.gcc-TEST.antoyo.29.1.1@forge-stage.sourceware.org>",
    "list_archive_url": null,
    "date": "2026-04-22T10:41:22",
    "name": "[v1,1/1] aarch64: Fix ICE happening in SET_TYPE_VECTOR_SUBPARTS with libgccjit",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "e5fe58d2d23f5764baf13b77db98889ef2a6c7e4",
    "submitter": {
        "id": 92206,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/92206/?format=api",
        "name": "Antoni Boucher via Sourceware Forge",
        "email": "forge-bot+antoyo@forge-stage.sourceware.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuboj6scw.gcc.gcc-TEST.antoyo.29.1.1@forge-stage.sourceware.org/mbox/",
    "series": [
        {
            "id": 500984,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/500984/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500984",
            "date": "2026-04-22T10:41:21",
            "name": "aarch64: Fix ICE happening in SET_TYPE_VECTOR_SUBPARTS with libgccjit",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/500984/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2226291/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2226291/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>",
        "X-Original-To": [
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            "gcc-patches@gcc.gnu.org"
        ],
        "Delivered-To": [
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            "gcc-patches@gcc.gnu.org"
        ],
        "Authentication-Results": [
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            "from forge-stage.sourceware.org (vm08.sourceware.org [38.145.34.39])\n by sourceware.org (Postfix) with ESMTPS id 914D44BB58C8\n for <gcc-patches@gcc.gnu.org>; Wed, 22 Apr 2026 10:42:12 +0000 (GMT)",
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        ],
        "DKIM-Filter": [
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        ],
        "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 914D44BB58C8",
        "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 914D44BB58C8",
        "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1776854532; cv=none;\n b=wHvKh66TyOkKF/Lq/tQqHi6aF3snfVa/vcXZznkeXZGz+lZXb/fsnTviejoodBO/zrPRbf2w7BQkTY2mc/t349ZU3HE+PwjipkwRvX9suIXqUXBbBonjS3IYzrDx9+sGgbptqY5CjeStWr2uYelUGzUjcqQXNR5TnofZ5BvMfyU=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776854532; c=relaxed/simple;\n bh=6tYVRAAi/Xm31hw8h1kPftWCo3xZgZeld5wxoF3HARg=;\n h=From:Date:Subject:To:Message-ID;\n b=eDFsnu4qUEAU7Zln73N2ivnGmY/xDETX/CT8lJmy3NcBg4HzeQ3A/MLQDmF2br7DL8uE17XB7SLhlYZlSut+GFqgsYcu3FiO/bB6xQyhwJQJO21A+7r82bsGXqN74zjO8BKcEKQjWoZB3zP/L5Rk2nCvMhd6Nj209oANEXNb9GY=",
        "ARC-Authentication-Results": "i=1; server2.sourceware.org",
        "From": "Antoni Boucher via Sourceware Forge\n <forge-bot+antoyo@forge-stage.sourceware.org>",
        "Date": "Wed, 22 Apr 2026 10:41:22 +0000",
        "Subject": "[PATCH v1 1/1] aarch64: Fix ICE happening in SET_TYPE_VECTOR_SUBPARTS\n with libgccjit",
        "To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>",
        "Message-ID": "\n <bmm.hhuboj6scw.gcc.gcc-TEST.antoyo.29.1.1@forge-stage.sourceware.org>",
        "X-Mailer": "batrachomyomachia",
        "X-Requested-Reviewer": [
            "pinskia",
            "rsandifo"
        ],
        "X-Pull-Request-Organization": "gcc",
        "X-Pull-Request-Repository": "gcc-TEST",
        "X-Pull-Request": "https://forge.sourceware.org/gcc/gcc-TEST/pulls/29",
        "References": "\n <bmm.hhuboj6scw.gcc.gcc-TEST.antoyo.29.1.0@forge-stage.sourceware.org>",
        "In-Reply-To": "\n <bmm.hhuboj6scw.gcc.gcc-TEST.antoyo.29.1.0@forge-stage.sourceware.org>",
        "X-Patch-URL": "\n https://forge.sourceware.org/antoyo/gcc/commit/86c6822f10bee75c8a01548215d161ab5cd7f619",
        "X-BeenThere": "gcc-patches@gcc.gnu.org",
        "X-Mailman-Version": "2.1.30",
        "Precedence": "list",
        "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>",
        "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>",
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        "Reply-To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>,\n antoyo@noreply.localhost",
        "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"
    },
    "content": "From: Antoni Boucher <bouanto@zoho.com>\n\nThe structure aarch64_simd_type_info was split in 2 because we do not\nwant to reset the static members of aarch64_simd_type_info to their\ndefault value. We only want the tree types to be GC-ed. This is\nnecessary for libgccjit which can run multiple times in the same\nprocess. If the static values were GC-ed, the second run would\nICE/segfault because of their invalid value.\n\nThe following test suites passed for this patch:\n\n * The aarch64 tests.\n * The aarch64 regression tests.\n\nThe number of failures of the jit tests on aarch64 lowered from +100 to\n~7.\n\ngcc/ChangeLog:\n\tPR target/117923\n\t* config/aarch64/aarch64-builtins.cc: Remove GTY marker on aarch64_simd_types,\n\taarch64_simd_types_trees (new variable), rename aarch64_simd_types to\n\taarch64_simd_types_trees.\n\t* config/aarch64/aarch64-builtins.h: Remove GTY marker on aarch64_simd_types,\n\taarch64_simd_types_trees (new variable).\n\t* config/aarch64/aarch64-sve-builtins-shapes.cc: Rename aarch64_simd_types to\n\taarch64_simd_types_trees.\n\t* config/aarch64/aarch64-sve-builtins.cc: Rename aarch64_simd_types to\n\taarch64_simd_types_trees.\n---\n gcc/config/aarch64/aarch64-builtins.cc        | 129 ++++++++++--------\n gcc/config/aarch64/aarch64-builtins.h         |  29 ++--\n .../aarch64/aarch64-sve-builtins-shapes.cc    |   4 +-\n gcc/config/aarch64/aarch64-sve-builtins.cc    |   2 +-\n 4 files changed, 95 insertions(+), 69 deletions(-)",
    "diff": "diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc\nindex 22f8216a45b3..7a13c7718487 100644\n--- a/gcc/config/aarch64/aarch64-builtins.cc\n+++ b/gcc/config/aarch64/aarch64-builtins.cc\n@@ -982,16 +982,20 @@ const char *aarch64_scalar_builtin_types[] = {\n   NULL\n };\n \n-extern GTY(()) aarch64_simd_type_info aarch64_simd_types[];\n+extern const aarch64_simd_type_info aarch64_simd_types[];\n+extern GTY(()) aarch64_simd_type_info_trees aarch64_simd_types_trees[];\n \n #undef ENTRY\n #define ENTRY(E, M, Q, G)  \\\n-  {E, \"__\" #E, #G \"__\" #E, NULL_TREE, NULL_TREE, E_##M##mode, qualifier_##Q},\n-struct aarch64_simd_type_info aarch64_simd_types [] = {\n+  {E, \"__\" #E, #G \"__\" #E, E_##M##mode, qualifier_##Q},\n+const struct aarch64_simd_type_info aarch64_simd_types[] = {\n #include \"aarch64-simd-builtin-types.def\"\n };\n #undef ENTRY\n \n+struct aarch64_simd_type_info_trees\n+aarch64_simd_types_trees[ARRAY_SIZE (aarch64_simd_types)];\n+\n static machine_mode aarch64_simd_tuple_modes[ARM_NEON_H_TYPES_LAST][3];\n static GTY(()) tree aarch64_simd_tuple_types[ARM_NEON_H_TYPES_LAST][3];\n \n@@ -1132,7 +1136,7 @@ aarch64_lookup_simd_type_in_table (machine_mode mode,\n     {\n       if (aarch64_simd_types[i].mode == mode\n \t  && aarch64_simd_types[i].q == q)\n-\treturn aarch64_simd_types[i].itype;\n+\treturn aarch64_simd_types_trees[i].itype;\n       if (aarch64_simd_tuple_types[i][0] != NULL_TREE)\n \tfor (int j = 0; j < 3; j++)\n \t  if (aarch64_simd_tuple_modes[i][j] == mode\n@@ -1179,66 +1183,76 @@ aarch64_init_simd_builtin_types (void)\n   tree tdecl;\n \n   /* Init all the element types built by the front-end.  */\n-  aarch64_simd_types[Int8x8_t].eltype = intQI_type_node;\n-  aarch64_simd_types[Int8x16_t].eltype = intQI_type_node;\n-  aarch64_simd_types[Int16x4_t].eltype = intHI_type_node;\n-  aarch64_simd_types[Int16x8_t].eltype = intHI_type_node;\n-  aarch64_simd_types[Int32x2_t].eltype = intSI_type_node;\n-  aarch64_simd_types[Int32x4_t].eltype = intSI_type_node;\n-  aarch64_simd_types[Int64x1_t].eltype = intDI_type_node;\n-  aarch64_simd_types[Int64x2_t].eltype = intDI_type_node;\n-  aarch64_simd_types[Uint8x8_t].eltype = unsigned_intQI_type_node;\n-  aarch64_simd_types[Uint8x16_t].eltype = unsigned_intQI_type_node;\n-  aarch64_simd_types[Uint16x4_t].eltype = unsigned_intHI_type_node;\n-  aarch64_simd_types[Uint16x8_t].eltype = unsigned_intHI_type_node;\n-  aarch64_simd_types[Uint32x2_t].eltype = unsigned_intSI_type_node;\n-  aarch64_simd_types[Uint32x4_t].eltype = unsigned_intSI_type_node;\n-  aarch64_simd_types[Uint64x1_t].eltype = unsigned_intDI_type_node;\n-  aarch64_simd_types[Uint64x2_t].eltype = unsigned_intDI_type_node;\n+  aarch64_simd_types_trees[Int8x8_t].eltype = intQI_type_node;\n+  aarch64_simd_types_trees[Int8x16_t].eltype = intQI_type_node;\n+  aarch64_simd_types_trees[Int16x4_t].eltype = intHI_type_node;\n+  aarch64_simd_types_trees[Int16x8_t].eltype = intHI_type_node;\n+  aarch64_simd_types_trees[Int32x2_t].eltype = intSI_type_node;\n+  aarch64_simd_types_trees[Int32x4_t].eltype = intSI_type_node;\n+  aarch64_simd_types_trees[Int64x1_t].eltype = intDI_type_node;\n+  aarch64_simd_types_trees[Int64x2_t].eltype = intDI_type_node;\n+  aarch64_simd_types_trees[Uint8x8_t].eltype = unsigned_intQI_type_node;\n+  aarch64_simd_types_trees[Uint8x16_t].eltype = unsigned_intQI_type_node;\n+  aarch64_simd_types_trees[Uint16x4_t].eltype = unsigned_intHI_type_node;\n+  aarch64_simd_types_trees[Uint16x8_t].eltype = unsigned_intHI_type_node;\n+  aarch64_simd_types_trees[Uint32x2_t].eltype = unsigned_intSI_type_node;\n+  aarch64_simd_types_trees[Uint32x4_t].eltype = unsigned_intSI_type_node;\n+  aarch64_simd_types_trees[Uint64x1_t].eltype = unsigned_intDI_type_node;\n+  aarch64_simd_types_trees[Uint64x2_t].eltype = unsigned_intDI_type_node;\n \n   /* Poly types are a world of their own.  */\n-  aarch64_simd_types[Poly8_t].eltype = aarch64_simd_types[Poly8_t].itype =\n-    build_distinct_type_copy (unsigned_intQI_type_node);\n+  aarch64_simd_types_trees[Poly8_t].eltype\n+    = aarch64_simd_types_trees[Poly8_t].itype\n+    = build_distinct_type_copy (unsigned_intQI_type_node);\n   /* Prevent front-ends from transforming Poly8_t arrays into string\n      literals.  */\n-  TYPE_STRING_FLAG (aarch64_simd_types[Poly8_t].eltype) = false;\n-\n-  aarch64_simd_types[Poly16_t].eltype = aarch64_simd_types[Poly16_t].itype =\n-    build_distinct_type_copy (unsigned_intHI_type_node);\n-  aarch64_simd_types[Poly64_t].eltype = aarch64_simd_types[Poly64_t].itype =\n-    build_distinct_type_copy (unsigned_intDI_type_node);\n-  aarch64_simd_types[Poly128_t].eltype = aarch64_simd_types[Poly128_t].itype =\n-    build_distinct_type_copy (unsigned_intTI_type_node);\n+  TYPE_STRING_FLAG (aarch64_simd_types_trees[Poly8_t].eltype) = false;\n+\n+  aarch64_simd_types_trees[Poly16_t].eltype\n+    = aarch64_simd_types_trees[Poly16_t].itype\n+    = build_distinct_type_copy (unsigned_intHI_type_node);\n+  aarch64_simd_types_trees[Poly64_t].eltype\n+    = aarch64_simd_types_trees[Poly64_t].itype\n+    = build_distinct_type_copy (unsigned_intDI_type_node);\n+  aarch64_simd_types_trees[Poly128_t].eltype\n+    = aarch64_simd_types_trees[Poly128_t].itype\n+    = build_distinct_type_copy (unsigned_intTI_type_node);\n   /* Init poly vector element types with scalar poly types.  */\n-  aarch64_simd_types[Poly8x8_t].eltype = aarch64_simd_types[Poly8_t].itype;\n-  aarch64_simd_types[Poly8x16_t].eltype = aarch64_simd_types[Poly8_t].itype;\n-  aarch64_simd_types[Poly16x4_t].eltype = aarch64_simd_types[Poly16_t].itype;\n-  aarch64_simd_types[Poly16x8_t].eltype = aarch64_simd_types[Poly16_t].itype;\n-  aarch64_simd_types[Poly64x1_t].eltype = aarch64_simd_types[Poly64_t].itype;\n-  aarch64_simd_types[Poly64x2_t].eltype = aarch64_simd_types[Poly64_t].itype;\n+  aarch64_simd_types_trees[Poly8x8_t].eltype\n+    = aarch64_simd_types_trees[Poly8_t].itype;\n+  aarch64_simd_types_trees[Poly8x16_t].eltype\n+    = aarch64_simd_types_trees[Poly8_t].itype;\n+  aarch64_simd_types_trees[Poly16x4_t].eltype\n+    = aarch64_simd_types_trees[Poly16_t].itype;\n+  aarch64_simd_types_trees[Poly16x8_t].eltype\n+    = aarch64_simd_types_trees[Poly16_t].itype;\n+  aarch64_simd_types_trees[Poly64x1_t].eltype\n+    = aarch64_simd_types_trees[Poly64_t].itype;\n+  aarch64_simd_types_trees[Poly64x2_t].eltype\n+    = aarch64_simd_types_trees[Poly64_t].itype;\n \n   /* Continue with standard types.  */\n-  aarch64_simd_types[Float16x4_t].eltype = aarch64_fp16_type_node;\n-  aarch64_simd_types[Float16x8_t].eltype = aarch64_fp16_type_node;\n-  aarch64_simd_types[Float32x2_t].eltype = float_type_node;\n-  aarch64_simd_types[Float32x4_t].eltype = float_type_node;\n-  aarch64_simd_types[Float64x1_t].eltype = double_type_node;\n-  aarch64_simd_types[Float64x2_t].eltype = double_type_node;\n+  aarch64_simd_types_trees[Float16x4_t].eltype = aarch64_fp16_type_node;\n+  aarch64_simd_types_trees[Float16x8_t].eltype = aarch64_fp16_type_node;\n+  aarch64_simd_types_trees[Float32x2_t].eltype = float_type_node;\n+  aarch64_simd_types_trees[Float32x4_t].eltype = float_type_node;\n+  aarch64_simd_types_trees[Float64x1_t].eltype = double_type_node;\n+  aarch64_simd_types_trees[Float64x2_t].eltype = double_type_node;\n \n   /* Init Bfloat vector types with underlying __bf16 type.  */\n-  aarch64_simd_types[Bfloat16x4_t].eltype = bfloat16_type_node;\n-  aarch64_simd_types[Bfloat16x8_t].eltype = bfloat16_type_node;\n+  aarch64_simd_types_trees[Bfloat16x4_t].eltype = bfloat16_type_node;\n+  aarch64_simd_types_trees[Bfloat16x8_t].eltype = bfloat16_type_node;\n \n   /* Init FP8 element types.  */\n-  aarch64_simd_types[Mfloat8x8_t].eltype = aarch64_mfp8_type_node;\n-  aarch64_simd_types[Mfloat8x16_t].eltype = aarch64_mfp8_type_node;\n+  aarch64_simd_types_trees[Mfloat8x8_t].eltype = aarch64_mfp8_type_node;\n+  aarch64_simd_types_trees[Mfloat8x16_t].eltype = aarch64_mfp8_type_node;\n \n   for (i = 0; i < nelts; i++)\n     {\n-      tree eltype = aarch64_simd_types[i].eltype;\n+      tree eltype = aarch64_simd_types_trees[i].eltype;\n       machine_mode mode = aarch64_simd_types[i].mode;\n \n-      if (aarch64_simd_types[i].itype == NULL)\n+      if (aarch64_simd_types_trees[i].itype == NULL)\n \t{\n \t  tree type = build_vector_type (eltype, GET_MODE_NUNITS (mode));\n \t  type = build_distinct_type_copy (type);\n@@ -1249,12 +1263,12 @@ aarch64_init_simd_builtin_types (void)\n \t  TYPE_ATTRIBUTES (type)\n \t    = tree_cons (get_identifier (\"Advanced SIMD type\"), value,\n \t\t\t TYPE_ATTRIBUTES (type));\n-\t  aarch64_simd_types[i].itype = type;\n+\t  aarch64_simd_types_trees[i].itype = type;\n \t}\n \n       tdecl = add_builtin_type (aarch64_simd_types[i].name,\n-\t\t\t\taarch64_simd_types[i].itype);\n-      TYPE_NAME (aarch64_simd_types[i].itype) = tdecl;\n+\t\t\t\taarch64_simd_types_trees[i].itype);\n+      TYPE_NAME (aarch64_simd_types_trees[i].itype) = tdecl;\n     }\n \n #define AARCH64_BUILD_SIGNED_TYPE(mode)  \\\n@@ -1736,7 +1750,8 @@ aarch64_get_pragma_builtin (int code)\n static void\n register_tuple_type (unsigned int num_vectors, unsigned int type_index)\n {\n-  aarch64_simd_type_info *type = &aarch64_simd_types[type_index];\n+  const aarch64_simd_type_info *type = &aarch64_simd_types[type_index];\n+  aarch64_simd_type_info_trees *trees = &aarch64_simd_types_trees[type_index];\n \n   /* Synthesize the name of the user-visible vector tuple type.  */\n   const char *vector_type_name = type->name;\n@@ -1746,7 +1761,7 @@ register_tuple_type (unsigned int num_vectors, unsigned int type_index)\n \t    num_vectors);\n   tuple_type_name[0] = TOLOWER (tuple_type_name[0]);\n \n-  tree vector_type = type->itype;\n+  tree vector_type = trees->itype;\n   tree array_type = build_array_type_nelts (vector_type, num_vectors);\n   if (type->mode == DImode)\n     {\n@@ -4096,8 +4111,8 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, gcall *stmt,\n \t  {\n \t    enum aarch64_simd_type mem_type\n \t      = get_mem_type_for_load_store(fcode);\n-\t    aarch64_simd_type_info simd_type\n-\t      = aarch64_simd_types[mem_type];\n+\t    aarch64_simd_type_info_trees simd_type\n+\t      = aarch64_simd_types_trees[mem_type];\n \t    tree elt_ptr_type = build_pointer_type_for_mode (simd_type.eltype,\n \t\t\t\t\t\t\t     VOIDmode, true);\n \t    tree zero = build_zero_cst (elt_ptr_type);\n@@ -4122,8 +4137,8 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, gcall *stmt,\n \t  {\n \t    enum aarch64_simd_type mem_type\n \t      = get_mem_type_for_load_store(fcode);\n-\t    aarch64_simd_type_info simd_type\n-\t      = aarch64_simd_types[mem_type];\n+\t    aarch64_simd_type_info_trees simd_type\n+\t      = aarch64_simd_types_trees[mem_type];\n \t    tree elt_ptr_type = build_pointer_type_for_mode (simd_type.eltype,\n \t\t\t\t\t\t\t     VOIDmode, true);\n \t    tree zero = build_zero_cst (elt_ptr_type);\ndiff --git a/gcc/config/aarch64/aarch64-builtins.h b/gcc/config/aarch64/aarch64-builtins.h\nindex 00db7a74885d..f4d54de5f7b7 100644\n--- a/gcc/config/aarch64/aarch64-builtins.h\n+++ b/gcc/config/aarch64/aarch64-builtins.h\n@@ -66,7 +66,7 @@ enum aarch64_simd_type\n };\n #undef ENTRY\n \n-struct GTY(()) aarch64_simd_type_info\n+struct aarch64_simd_type_info\n {\n   enum aarch64_simd_type type;\n \n@@ -83,12 +83,6 @@ struct GTY(()) aarch64_simd_type_info\n      will get default mangled names.  */\n   const char *mangle;\n \n-  /* Internal type.  */\n-  tree itype;\n-\n-  /* Element type.  */\n-  tree eltype;\n-\n   /* Machine mode the internal type maps to.  */\n   enum machine_mode mode;\n \n@@ -96,6 +90,23 @@ struct GTY(()) aarch64_simd_type_info\n   enum aarch64_type_qualifiers q;\n };\n \n-extern aarch64_simd_type_info aarch64_simd_types[];\n+/* This is in a different structure than aarch64_simd_type_info because we do\n+   not want to reset the static members of aarch64_simd_type_info to their\n+   default value.  We only want the tree types to be GC-ed.\n+   This is necessary for libgccjit which can run multiple times in the same\n+   process.  If the static values were GC-ed, the second run would ICE/segfault\n+   because of their invalid value.\n+ */\n+struct GTY(()) aarch64_simd_type_info_trees\n+{\n+  /* Internal type.  */\n+  tree itype;\n+\n+  /* Element type.  */\n+  tree eltype;\n+};\n+\n+extern const aarch64_simd_type_info aarch64_simd_types[];\n+extern aarch64_simd_type_info_trees aarch64_simd_types_trees[];\n \n-#endif\n\\ No newline at end of file\n+#endif\ndiff --git a/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc b/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc\nindex cf3ddab09b63..bfee2a7870e2 100644\n--- a/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc\n+++ b/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc\n@@ -272,14 +272,14 @@ parse_type (const function_instance &instance, const char *&format)\n     {\n       type_suffix_index suffix = parse_element_type (instance, format);\n       int neon_index = type_suffixes[suffix].neon64_type;\n-      return aarch64_simd_types[neon_index].itype;\n+      return aarch64_simd_types_trees[neon_index].itype;\n     }\n \n   if (ch == 'Q')\n     {\n       type_suffix_index suffix = parse_element_type (instance, format);\n       int neon_index = type_suffixes[suffix].neon128_type;\n-      return aarch64_simd_types[neon_index].itype;\n+      return aarch64_simd_types_trees[neon_index].itype;\n     }\n \n   gcc_unreachable ();\ndiff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc b/gcc/config/aarch64/aarch64-sve-builtins.cc\nindex 8e94a2d2cfe4..79159df8ccdd 100644\n--- a/gcc/config/aarch64/aarch64-sve-builtins.cc\n+++ b/gcc/config/aarch64/aarch64-sve-builtins.cc\n@@ -2166,7 +2166,7 @@ function_resolver::infer_neon128_vector_type (unsigned int argno)\n       int neon_index = type_suffixes[suffix_i].neon128_type;\n       if (neon_index != ARM_NEON_H_TYPES_LAST)\n \t{\n-\t  tree type = aarch64_simd_types[neon_index].itype;\n+\t  tree type = aarch64_simd_types_trees[neon_index].itype;\n \t  if (type && matches_type_p (type, actual))\n \t    return type_suffix_index (suffix_i);\n \t}\n",
    "prefixes": [
        "v1",
        "1/1"
    ]
}