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GET /api/1.2/patches/2226274/?format=api
HTTP 200 OK
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{
    "id": 2226274,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/2226274/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.11@forge-stage.sourceware.org/",
    "project": {
        "id": 17,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/17/?format=api",
        "name": "GNU Compiler Collection",
        "link_name": "gcc",
        "list_id": "gcc-patches.gcc.gnu.org",
        "list_email": "gcc-patches@gcc.gnu.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.11@forge-stage.sourceware.org>",
    "list_archive_url": null,
    "date": "2026-04-22T10:29:56",
    "name": "[v1,11/11] Add no cost testcases",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "f376aebfb7135e2af379449db46853a1108d0a32",
    "submitter": {
        "id": 93219,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/93219/?format=api",
        "name": "Andrew Pinski via Sourceware Forge",
        "email": "forge-bot+pinskia@forge-stage.sourceware.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.11@forge-stage.sourceware.org/mbox/",
    "series": [
        {
            "id": 500972,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/500972/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500972",
            "date": "2026-04-22T10:29:49",
            "name": "WIP: v2hiv4qi",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/500972/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2226274/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2226274/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>",
        "X-Original-To": [
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            "gcc-patches@gcc.gnu.org"
        ],
        "Delivered-To": [
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            "gcc-patches@gcc.gnu.org"
        ],
        "Authentication-Results": [
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            "from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g0x5v1ksTz1yHB\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 22 Apr 2026 20:58:11 +1000 (AEST)",
            "from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 1D8A048FE0A2\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 22 Apr 2026 10:58:09 +0000 (GMT)",
            "from forge-stage.sourceware.org (vm08.sourceware.org [38.145.34.39])\n by sourceware.org (Postfix) with ESMTPS id 46EE448FE56A\n for <gcc-patches@gcc.gnu.org>; Wed, 22 Apr 2026 10:31:10 +0000 (GMT)",
            "from forge-stage.sourceware.org (localhost [IPv6:::1])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange x25519 server-signature ECDSA (prime256v1) server-digest SHA256)\n (No client certificate requested)\n by forge-stage.sourceware.org (Postfix) with ESMTPS id A08C042B1D\n for <gcc-patches@gcc.gnu.org>; Wed, 22 Apr 2026 10:31:06 +0000 (UTC)"
        ],
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        ],
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        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776853870; c=relaxed/simple;\n bh=3GLdgQ+RTIpqMz/sk1kXlm0o/fA82XoMhOlFYlCYmhU=;\n h=From:Date:Subject:To:Message-ID;\n b=wC7LpSvA2hv7MNyHC9Mvw9SX5DSjRMsHRLKUbjzv0EhmrdOd6NUEd7aIBxwd9CaoamCWO4KabBppFCgfZMmzvbwT3dR3saW3RsGeeaDPA57Zvgxu2smEINkq3iJuZ7KzJJdd/xEbkjY2PAWn4DEbTSdw35p+uHHG2LTB2BW9hhM=",
        "ARC-Authentication-Results": "i=1; server2.sourceware.org",
        "From": "Andrew Pinski via Sourceware Forge\n <forge-bot+pinskia@forge-stage.sourceware.org>",
        "Date": "Wed, 22 Apr 2026 10:29:56 +0000",
        "Subject": "[PATCH v1 11/11] Add no cost testcases",
        "To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>",
        "Message-ID": "\n <bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.11@forge-stage.sourceware.org>",
        "X-Mailer": "batrachomyomachia",
        "X-Pull-Request-Organization": "gcc",
        "X-Pull-Request-Repository": "gcc-TEST",
        "X-Pull-Request": "https://forge.sourceware.org/gcc/gcc-TEST/pulls/20",
        "References": "\n <bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.0@forge-stage.sourceware.org>",
        "In-Reply-To": "\n <bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.0@forge-stage.sourceware.org>",
        "X-Patch-URL": "\n https://forge.sourceware.org/pinskia/gcc-TEST/commit/1ab9d626843e5d9c408d98db7520cfd43531926d",
        "X-BeenThere": "gcc-patches@gcc.gnu.org",
        "X-Mailman-Version": "2.1.30",
        "Precedence": "list",
        "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>",
        "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>",
        "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>",
        "List-Post": "<mailto:gcc-patches@gcc.gnu.org>",
        "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>",
        "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>",
        "Reply-To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>,\n pinskia@gcc.gnu.org",
        "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"
    },
    "content": "From: Andrew Pinski <quic_apinski@quicinc.com>\n\nSigned-off-by: Andrew Pinski <quic_apinski@quicinc.com>\n---\n .../gcc.target/aarch64/v2hiv8qi_nocost_1.c    |  69 +++++++\n .../gcc.target/aarch64/v2hiv8qi_nocost_2.c    |  69 +++++++\n .../gcc.target/aarch64/v2hiv8qi_nocost_3.c    |  34 ++++\n .../gcc.target/aarch64/v2hiv8qi_nocost_4.c    | 171 ++++++++++++++++++\n .../gcc.target/aarch64/v2hiv8qi_nocost_5.c    |  72 ++++++++\n .../gcc.target/aarch64/v2hiv8qi_nocost_6.c    |  96 ++++++++++\n .../gcc.target/aarch64/v2hiv8qi_nocost_7.c    |  97 ++++++++++\n .../gcc.target/aarch64/v2hiv8qi_nocost_8.c    | 144 +++++++++++++++\n .../gcc.target/aarch64/v2hiv8qi_nocost_9.c    | 150 +++++++++++++++\n 9 files changed, 902 insertions(+)\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_3.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_5.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_6.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_7.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_9.c",
    "diff": "diff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_1.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_1.c\nnew file mode 100644\nindex 000000000000..9cb4890b3a70\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_1.c\n@@ -0,0 +1,69 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing plus/minus SLP and pattern. */\n+\n+/*\n+** v2hi_add:\n+**\tmovi\tv[0-9]+.4h, 0x1\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tadd\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_add(short *t)\n+{\n+  t[0] += 1;\n+  t[1] += 1;\n+}\n+/*\n+** v2hi_minus:\n+**\tdup\tv([0-9]+).4h, w1\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsub\tv([0-9]+).4h, v\\2.4h, v\\3.4h\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_minus(short *t, short tt)\n+{\n+  t[0] -= tt;\n+  t[1] -= tt;\n+}\n+\n+/*\n+** v4qi_add:\n+**\tmovi\tv[0-9]+.8b, 0x1\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tadd\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_add(char *t)\n+{\n+  t[0] += 1;\n+  t[1] += 1;\n+  t[2] += 1;\n+  t[3] += 1;\n+}\n+\n+/*\n+** v4qi_minus:\n+**\tdup\tv([0-9]+).8b, w1\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsub\tv([0-9]+).8b, v\\2.8b, v\\3.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_minus(char *t, char tt)\n+{\n+  t[0] -= tt;\n+  t[1] -= tt;\n+  t[2] -= tt;\n+  t[3] -= tt;\n+}\n\\ No newline at end of file\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_2.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_2.c\nnew file mode 100644\nindex 000000000000..6a32af396a66\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_2.c\n@@ -0,0 +1,69 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing zero/sign extend SLP and patterns. */\n+/*\n+** v2hi_v2si_sext:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsxtl\tv([0-9]+).4s, v\\1.4h\n+**\tstr\td\\2, \\[x1\\]\n+**\tret\n+*/\n+\n+\n+void v2hi_v2si_sext(signed short *t, int *t1)\n+{\n+  signed short tmp[2] = {t[0], t[1]};\n+  t1[0] = tmp[0];\n+  t1[1] = tmp[1];\n+}\n+\n+/*\n+** v2hi_v2si_zext:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuxtl\tv([0-9]+).4s, v\\1.4h\n+**\tstr\td\\2, \\[x1\\]\n+**\tret\n+*/\n+void v2hi_v2si_zext(unsigned short *t, int *t1)\n+{\n+  unsigned short tmp[2] = {t[0], t[1]};\n+  t1[0] = tmp[0];\n+  t1[1] = tmp[1];\n+}\n+\n+\n+/*\n+** v4qi_v4hi_sext:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsxtl\tv([0-9]+).8h, v\\1.8b\n+**\tstr\td\\2, \\[x1\\]\n+**\tret\n+*/\n+\n+void v4qi_v4hi_sext(signed char *t, short *t1)\n+{\n+  signed char tmp[4] = {t[0], t[1], t[2], t[3]};\n+  t1[0] = tmp[0];\n+  t1[1] = tmp[1];\n+  t1[2] = tmp[2];\n+  t1[3] = tmp[3];\n+}\n+\n+/*\n+** v4qi_v4hi_zext:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuxtl\tv([0-9]+).8h, v\\1.8b\n+**\tstr\td\\2, \\[x1\\]\n+**\tret\n+*/\n+void v4qi_v4hi_zext(unsigned char *t, short *t1)\n+{\n+  unsigned char tmp[4] = {t[0], t[1], t[2], t[3]};\n+  t1[0] = tmp[0];\n+  t1[1] = tmp[1];\n+  t1[2] = tmp[2];\n+  t1[3] = tmp[3];\n+}\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_3.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_3.c\nnew file mode 100644\nindex 000000000000..88b6f694036f\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_3.c\n@@ -0,0 +1,34 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing dup SLP and pattern. */\n+\n+/*\n+** v2hi_dup:\n+**\tdup\tv([0-9]+).4h, w1\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_dup(short *t, short tt)\n+{\n+  t[0] = tt;\n+  t[1] = tt;\n+}\n+\n+/*\n+** v4qi_dup:\n+**\tdup\tv([0-9]+).8b, w1\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_dup(char *t, char tt)\n+{\n+  t[0] = tt;\n+  t[1] = tt;\n+  t[2] = tt;\n+  t[3] = tt;\n+}\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_4.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_4.c\nnew file mode 100644\nindex 000000000000..dbb6618bbed5\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_4.c\n@@ -0,0 +1,171 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing orn/bic/and/xor/ior SLP and patterns. */\n+\n+/*\n+** v2hi_orn:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\torn\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_orn(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] |= ~tt[0];\n+  t[1] |= ~tt[1];\n+}\n+\n+/*\n+** v2hi_bic:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\tbic\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_bic(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] &= ~tt[0];\n+  t[1] &= ~tt[1];\n+}\n+\n+/*\n+** v4qi_orn:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\torn\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_orn(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] |= ~tt[0];\n+  t[1] |= ~tt[1];\n+  t[2] |= ~tt[2];\n+  t[3] |= ~tt[3];\n+}\n+\n+\n+/*\n+** v4qi_bic:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\tbic\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_bic(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] &= ~tt[0];\n+  t[1] &= ~tt[1];\n+  t[2] &= ~tt[2];\n+  t[3] &= ~tt[3];\n+}\n+\n+\n+\n+/*\n+** v2hi_ior:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\torr\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_ior(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] |= tt[0];\n+  t[1] |= tt[1];\n+}\n+\n+/*\n+** v2hi_and:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\tand\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_and(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] &= tt[0];\n+  t[1] &= tt[1];\n+}\n+\n+/*\n+** v2hi_xor:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\teor\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_xor(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] ^= tt[0];\n+  t[1] ^= tt[1];\n+}\n+\n+/*\n+** v4qi_ior:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\torr\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_ior(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] |= tt[0];\n+  t[1] |= tt[1];\n+  t[2] |= tt[2];\n+  t[3] |= tt[3];\n+}\n+\n+\n+/*\n+** v4qi_and:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\tand\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_and(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] &= tt[0];\n+  t[1] &= tt[1];\n+  t[2] &= tt[2];\n+  t[3] &= tt[3];\n+}\n+\n+\n+/*\n+** v4qi_xor:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\teor\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_xor(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] ^= tt[0];\n+  t[1] ^= tt[1];\n+  t[2] ^= tt[2];\n+  t[3] ^= tt[3];\n+}\n\\ No newline at end of file\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_5.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_5.c\nnew file mode 100644\nindex 000000000000..a7fccde54b22\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_5.c\n@@ -0,0 +1,72 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing mul SLP and pattern. */\n+\n+/*\n+** v2hi_umul:\n+**\tdup\tv([0-9]+).4h, w1\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tmul\tv([0-9]+).4h, v\\2.4h, v\\1.4h\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_umul(unsigned short *t, unsigned short tt)\n+{\n+  t[0] *= tt;\n+  t[1] *= tt;\n+}\n+\n+/*\n+ PR tree-optimization/115833\n+** v2hi_smul: { xfail *-*-* }\n+**\tdup\tv([0-9]+).4h, w1\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tmul\tv([0-9]+).4h, v\\2.4h, v\\1.4h\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_smul(signed short *t, signed short tt)\n+{\n+  t[0] *= tt;\n+  t[1] *= tt;\n+}\n+\n+/*\n+** v4qi_umul:\n+**\tdup\tv([0-9]+).8b, w1\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tmul\tv([0-9]+).8b, v\\2.8b, v\\1.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_umul(unsigned char *t, unsigned char tt)\n+{\n+  t[0] *= tt;\n+  t[1] *= tt;\n+  t[2] *= tt;\n+  t[3] *= tt;\n+}\n+\n+/*\n+ PR tree-optimization/115833\n+** v4qi_smul: { xfail *-*-* }\n+**\tdup\tv([0-9]+).8b, w1\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tmul\tv([0-9]+).8b, v\\2.8b, v\\1.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_smul(signed char *t, signed char tt)\n+{\n+  t[0] *= tt;\n+  t[1] *= tt;\n+  t[2] *= tt;\n+  t[3] *= tt;\n+}\n\\ No newline at end of file\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_6.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_6.c\nnew file mode 100644\nindex 000000000000..74b1487063a6\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_6.c\n@@ -0,0 +1,96 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing neg/not/abs SLP and pattern. */\n+\n+/*\n+** v2hi_neg:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tneg\tv([0-9]+).4h, v\\1.4h\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_neg(short *t)\n+{\n+  t[0] = -t[0];\n+  t[1] = -t[1];\n+}\n+\n+/*\n+** v2hi_not:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tnot\tv([0-9]+).8b, v\\1.8b\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_not(short *t)\n+{\n+  t[0] = ~t[0];\n+  t[1] = ~t[1];\n+}\n+\n+/*\n+** v2hi_abs:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tabs\tv([0-9]+).4h, v\\1.4h\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_abs(short *t)\n+{\n+  t[0] = t[0] > 0 ? t[0] : -t[0];\n+  t[1] = t[1] > 0 ? t[1] : -t[1];\n+}\n+\n+/*\n+** v4qi_neg:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tneg\tv([0-9]+).8b, v\\1.8b\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_neg(char *t)\n+{\n+  t[0] = -t[0];\n+  t[1] = -t[1];\n+  t[2] = -t[2];\n+  t[3] = -t[3];\n+}\n+\n+/*\n+** v4qi_not:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tnot\tv([0-9]+).8b, v\\1.8b\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_not(char *t, char tt)\n+{\n+  t[0] = ~t[0];\n+  t[1] = ~t[1];\n+  t[2] = ~t[2];\n+  t[3] = ~t[3];\n+}\n+\n+/*\n+** v4qi_abs:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tabs\tv([0-9]+).8b, v\\1.8b\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_abs(signed char *t)\n+{\n+  t[0] = t[0] > 0 ? t[0] : -t[0];\n+  t[1] = t[1] > 0 ? t[1] : -t[1];\n+  t[2] = t[2] > 0 ? t[2] : -t[2];\n+  t[3] = t[3] > 0 ? t[3] : -t[3];\n+}\n\\ No newline at end of file\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_7.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_7.c\nnew file mode 100644\nindex 000000000000..f1aa17ace0ac\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_7.c\n@@ -0,0 +1,97 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing shift SLP and pattern. */\n+\n+/*\n+** v2hi_lshift:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tshl\tv([0-9]+).4h, v\\1.4h, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_lshift(signed short *t)\n+{\n+  t[0] <<= 1;\n+  t[1] <<= 1;\n+}\n+\n+/*\n+** v2hi_ashiftrt:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsshr\tv([0-9]+).4h, v\\1.4h, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_ashiftrt(signed short *t)\n+{\n+  t[0] >>= 1;\n+  t[1] >>= 1;\n+}\n+\n+/*\n+** v2hi_lshiftrt:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tushr\tv([0-9]+).4h, v\\1.4h, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_lshiftrt(unsigned short *t)\n+{\n+  t[0] >>= 1;\n+  t[1] >>= 1;\n+}\n+\n+\n+/*\n+** v4qi_lshift:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tshl\tv([0-9]+).8b, v\\1.8b, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_lshift(signed char *t)\n+{\n+  t[0] <<= 1;\n+  t[1] <<= 1;\n+  t[2] <<= 1;\n+  t[3] <<= 1;\n+}\n+\n+/*\n+** v4qi_ashiftrt:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsshr\tv([0-9]+).8b, v\\1.8b, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_ashiftrt(signed char *t)\n+{\n+  t[0] >>= 1;\n+  t[1] >>= 1;\n+  t[2] >>= 1;\n+  t[3] >>= 1;\n+}\n+\n+/*\n+** v4qi_lshiftrt:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tushr\tv([0-9]+).8b, v\\1.8b, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_lshiftrt(unsigned char *t)\n+{\n+  t[0] >>= 1;\n+  t[1] >>= 1;\n+  t[2] >>= 1;\n+  t[3] >>= 1;\n+}\n\\ No newline at end of file\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_8.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_8.c\nnew file mode 100644\nindex 000000000000..416442477b0d\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_8.c\n@@ -0,0 +1,144 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing min/max SLP and pattern. */\n+\n+#define min(a,b) ((a)>(b) ? (b) : (a))\n+#define max(a,b) ((a)<(b) ? (b) : (a))\n+\n+/*\n+** v2hi_smin:\n+**\tmovi\tv[0-9]+.4h, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tsmin\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_smin(signed short *t)\n+{\n+  t[0] = min(t[0], 2);\n+  t[1] = min(t[1], 2);\n+}\n+\n+\n+/*\n+** v2hi_umin:\n+**\tmovi\tv[0-9]+.4h, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tumin\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_umin(unsigned short *t)\n+{\n+  t[0] = min(t[0], 2);\n+  t[1] = min(t[1], 2);\n+}\n+\n+\n+/*\n+** v2hi_smax:\n+**\tmovi\tv[0-9]+.4h, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tsmax\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_smax(signed short *t)\n+{\n+  t[0] = max(t[0], 2);\n+  t[1] = max(t[1], 2);\n+}\n+\n+\n+/*\n+** v2hi_umax:\n+**\tmovi\tv[0-9]+.4h, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tumax\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_umax(unsigned short *t)\n+{\n+  t[0] = max(t[0], 2);\n+  t[1] = max(t[1], 2);\n+}\n+\n+\n+/*\n+** v4qi_smin:\n+**\tmovi\tv[0-9]+.8b, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tsmin\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_smin(signed char *t)\n+{\n+  t[0] = min(t[0], 2);\n+  t[1] = min(t[1], 2);\n+  t[2] = min(t[2], 2);\n+  t[3] = min(t[3], 2);\n+}\n+\n+\n+/*\n+** v4qi_umin:\n+**\tmovi\tv[0-9]+.8b, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tumin\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_umin(unsigned char *t)\n+{\n+  t[0] = min(t[0], 2);\n+  t[1] = min(t[1], 2);\n+  t[2] = min(t[2], 2);\n+  t[3] = min(t[3], 2);\n+}\n+\n+\n+/*\n+** v4qi_smax:\n+**\tmovi\tv[0-9]+.8b, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tsmax\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_smax(signed char *t)\n+{\n+  t[0] = max(t[0], 2);\n+  t[1] = max(t[1], 2);\n+  t[2] = max(t[2], 2);\n+  t[3] = max(t[3], 2);\n+}\n+\n+\n+/*\n+** v4qi_umax:\n+**\tmovi\tv[0-9]+.8b, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tumax\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_umax(unsigned char *t)\n+{\n+  t[0] = max(t[0], 2);\n+  t[1] = max(t[1], 2);\n+  t[2] = max(t[2], 2);\n+  t[3] = max(t[3], 2);\n+}\n\\ No newline at end of file\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_9.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_9.c\nnew file mode 100644\nindex 000000000000..9c315e54d317\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_nocost_9.c\n@@ -0,0 +1,150 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate v4qi with V4HI and V4QI with V8QI,\n+   testing min/max SLP reduction and pattern. */\n+\n+#define min(a,b) ((a)>(b) ? (b) : (a))\n+#define max(a,b) ((a)<(b) ? (b) : (a))\n+\n+\n+/*\n+** v2hi_sminv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tsminv\th([0-9]+), v\\2.4h\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+signed short v2hi_sminv(signed short *t)\n+{\n+  signed short tt = t[0];\n+  tt = min(t[0], tt);\n+  tt = min(t[1], tt);\n+  return tt;\n+}\n+/*\n+** v2hi_uminv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tuminv\th([0-9]+), v\\2.4h\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+unsigned short v2hi_uminv(unsigned short *t)\n+{\n+  unsigned short tt = t[0];\n+  tt = min(t[0], tt);\n+  tt = min(t[1], tt);\n+  return tt;\n+}\n+\n+/*\n+** v2hi_smaxv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tsmaxv\th([0-9]+), v\\2.4h\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+signed short v2hi_smaxv(signed short *t)\n+{\n+  signed short tt = t[0];\n+  tt = max(t[0], tt);\n+  tt = max(t[1], tt);\n+  return tt;\n+}\n+/*  Note uzp1/fmov is not needed here for v2hi_umaxv as\n+    the ldr is already zero extended.\n+** v2hi_umaxv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tumaxv\th([0-9]+), v\\1.4h\n+**\tumov\tx0, v\\2.d\\[0\\]\n+**\tret\n+*/\n+\n+unsigned short v2hi_umaxv(unsigned short *t)\n+{\n+  unsigned short tt = t[0];\n+  tt = max(t[0], tt);\n+  tt = max(t[1], tt);\n+  return tt;\n+}\n+\n+/*\n+** v4qi_sminv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tsminv\tb([0-9]+), v\\2.8b\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+signed char v4qi_sminv(signed char *t)\n+{\n+  signed char tt = t[0];\n+  tt = min(t[0], tt);\n+  tt = min(t[1], tt);\n+  tt = min(t[2], tt);\n+  tt = min(t[3], tt);\n+  return tt;\n+}\n+/*\n+** v4qi_uminv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tuminv\tb([0-9]+), v\\2.8b\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+unsigned char v4qi_uminv(unsigned char *t)\n+{\n+  unsigned char tt = t[0];\n+  tt = min(t[0], tt);\n+  tt = min(t[1], tt);\n+  tt = min(t[2], tt);\n+  tt = min(t[3], tt);\n+  return tt;\n+}\n+\n+/*\n+** v4qi_smaxv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tsmaxv\tb([0-9]+), v\\2.8b\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+signed char v4qi_smaxv(signed char *t)\n+{\n+  signed char tt = t[0];\n+  tt = max(t[0], tt);\n+  tt = max(t[1], tt);\n+  tt = max(t[2], tt);\n+  tt = max(t[3], tt);\n+  return tt;\n+}\n+/*  Note uzp1/fmov is not needed here for v4qi_umaxv as\n+    the ldr is already zero extended.\n+** v4qi_umaxv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tumaxv\tb([0-9]+), v\\1.8b\n+**\tumov\tx0, v\\2.d\\[0\\]\n+**\tret\n+*/\n+\n+unsigned char v4qi_umaxv(unsigned char *t)\n+{\n+  unsigned char tt = t[0];\n+  tt = max(t[0], tt);\n+  tt = max(t[1], tt);\n+  tt = max(t[2], tt);\n+  tt = max(t[3], tt);\n+  return tt;\n+}\n\\ No newline at end of file\n",
    "prefixes": [
        "v1",
        "11/11"
    ]
}