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GET /api/1.2/patches/2226198/?format=api
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{
    "id": 2226198,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/2226198/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.4@forge-stage.sourceware.org/",
    "project": {
        "id": 17,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/17/?format=api",
        "name": "GNU Compiler Collection",
        "link_name": "gcc",
        "list_id": "gcc-patches.gcc.gnu.org",
        "list_email": "gcc-patches@gcc.gnu.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.4@forge-stage.sourceware.org>",
    "list_archive_url": null,
    "date": "2026-04-22T10:29:49",
    "name": "[v1,04/11] Add 4 testcase.",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "824ba71759531b03356b0425e1db696c096733ef",
    "submitter": {
        "id": 93219,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/93219/?format=api",
        "name": "Andrew Pinski via Sourceware Forge",
        "email": "forge-bot+pinskia@forge-stage.sourceware.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.4@forge-stage.sourceware.org/mbox/",
    "series": [
        {
            "id": 500972,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/500972/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500972",
            "date": "2026-04-22T10:29:49",
            "name": "WIP: v2hiv4qi",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/500972/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2226198/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2226198/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>",
        "X-Original-To": [
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            "gcc-patches@gcc.gnu.org"
        ],
        "Delivered-To": [
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            "gcc-patches@gcc.gnu.org"
        ],
        "Authentication-Results": [
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            "from forge-stage.sourceware.org (vm08.sourceware.org [38.145.34.39])\n by sourceware.org (Postfix) with ESMTPS id 6D2F948FEF55\n for <gcc-patches@gcc.gnu.org>; Wed, 22 Apr 2026 10:31:06 +0000 (GMT)",
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        ],
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        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776853866; c=relaxed/simple;\n bh=eOc3yABQR/7e4MWVGhZ/cHN97yec9kxTDHi3Cd2ZazY=;\n h=From:Date:Subject:To:Message-ID;\n b=Yn3hotS7hVaGm6AUiFOHzxp5IhBE3HOFJ1/RirBfc/jsg+vrhLxcx/8cAS2LPwFu13w5cPuGp+wxxZhrvX4iLNwYMnB1dcv/pL8Gn8JAgVGVSg8FWhAmXExNlgxwy9jgBO7Gy7n9m1iBpWhdsDW5O46ftdnn24VeReksa77qPsc=",
        "ARC-Authentication-Results": "i=1; server2.sourceware.org",
        "From": "Andrew Pinski via Sourceware Forge\n <forge-bot+pinskia@forge-stage.sourceware.org>",
        "Date": "Wed, 22 Apr 2026 10:29:49 +0000",
        "Subject": "[PATCH v1 04/11] Add 4 testcase.",
        "To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>",
        "Message-ID": "\n <bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.4@forge-stage.sourceware.org>",
        "X-Mailer": "batrachomyomachia",
        "X-Pull-Request-Organization": "gcc",
        "X-Pull-Request-Repository": "gcc-TEST",
        "X-Pull-Request": "https://forge.sourceware.org/gcc/gcc-TEST/pulls/20",
        "References": "\n <bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.0@forge-stage.sourceware.org>",
        "In-Reply-To": "\n <bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.0@forge-stage.sourceware.org>",
        "X-Patch-URL": "\n https://forge.sourceware.org/pinskia/gcc-TEST/commit/fb1ebbed9431cf3dcc152500f36557789d538836",
        "X-BeenThere": "gcc-patches@gcc.gnu.org",
        "X-Mailman-Version": "2.1.30",
        "Precedence": "list",
        "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>",
        "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>",
        "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>",
        "List-Post": "<mailto:gcc-patches@gcc.gnu.org>",
        "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>",
        "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>",
        "Reply-To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>,\n pinskia@gcc.gnu.org",
        "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"
    },
    "content": "From: Andrew Pinski <quic_apinski@quicinc.com>\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/v2hiv8qi_1.c: New test.\n\t* gcc.target/aarch64/v2hiv8qi_2.c: New test.\n\t* gcc.target/aarch64/v2hiv8qi_3.c: New test.\n\t* gcc.target/aarch64/v2hiv8qi_4.c: New test.\n\nSigned-off-by: Andrew Pinski <quic_apinski@quicinc.com>\n---\n gcc/testsuite/gcc.target/aarch64/v2hiv8qi_1.c |  69 +++++++\n gcc/testsuite/gcc.target/aarch64/v2hiv8qi_2.c |  69 +++++++\n gcc/testsuite/gcc.target/aarch64/v2hiv8qi_3.c |  34 ++++\n gcc/testsuite/gcc.target/aarch64/v2hiv8qi_4.c | 171 ++++++++++++++++++\n 4 files changed, 343 insertions(+)\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_3.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_4.c",
    "diff": "diff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_1.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_1.c\nnew file mode 100644\nindex 000000000000..89537a2d4cc2\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_1.c\n@@ -0,0 +1,69 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fno-vect-cost-model\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing plus/minus SLP and pattern. */\n+\n+/*\n+** v2hi_add:\n+**\tmovi\tv[0-9]+.4h, 0x1\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tadd\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_add(short *t)\n+{\n+  t[0] += 1;\n+  t[1] += 1;\n+}\n+/*\n+** v2hi_minus:\n+**\tdup\tv([0-9]+).4h, w1\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsub\tv([0-9]+).4h, v\\2.4h, v\\3.4h\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_minus(short *t, short tt)\n+{\n+  t[0] -= tt;\n+  t[1] -= tt;\n+}\n+\n+/*\n+** v4qi_add:\n+**\tmovi\tv[0-9]+.8b, 0x1\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tadd\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_add(char *t)\n+{\n+  t[0] += 1;\n+  t[1] += 1;\n+  t[2] += 1;\n+  t[3] += 1;\n+}\n+\n+/*\n+** v4qi_minus:\n+**\tdup\tv([0-9]+).8b, w1\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsub\tv([0-9]+).8b, v\\2.8b, v\\3.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_minus(char *t, char tt)\n+{\n+  t[0] -= tt;\n+  t[1] -= tt;\n+  t[2] -= tt;\n+  t[3] -= tt;\n+}\n\\ No newline at end of file\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_2.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_2.c\nnew file mode 100644\nindex 000000000000..4156fb491a20\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_2.c\n@@ -0,0 +1,69 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fno-vect-cost-model\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing zero/sign extend SLP and patterns. */\n+/*\n+** v2hi_v2si_sext:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsxtl\tv([0-9]+).4s, v\\1.4h\n+**\tstr\td\\2, \\[x1\\]\n+**\tret\n+*/\n+\n+\n+void v2hi_v2si_sext(signed short *t, int *t1)\n+{\n+  signed short tmp[2] = {t[0], t[1]};\n+  t1[0] = tmp[0];\n+  t1[1] = tmp[1];\n+}\n+\n+/*\n+** v2hi_v2si_zext:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuxtl\tv([0-9]+).4s, v\\1.4h\n+**\tstr\td\\2, \\[x1\\]\n+**\tret\n+*/\n+void v2hi_v2si_zext(unsigned short *t, int *t1)\n+{\n+  unsigned short tmp[2] = {t[0], t[1]};\n+  t1[0] = tmp[0];\n+  t1[1] = tmp[1];\n+}\n+\n+\n+/*\n+** v4qi_v4hi_sext:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsxtl\tv([0-9]+).8h, v\\1.8b\n+**\tstr\td\\2, \\[x1\\]\n+**\tret\n+*/\n+\n+void v4qi_v4hi_sext(signed char *t, short *t1)\n+{\n+  signed char tmp[4] = {t[0], t[1], t[2], t[3]};\n+  t1[0] = tmp[0];\n+  t1[1] = tmp[1];\n+  t1[2] = tmp[2];\n+  t1[3] = tmp[3];\n+}\n+\n+/*\n+** v4qi_v4hi_zext:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuxtl\tv([0-9]+).8h, v\\1.8b\n+**\tstr\td\\2, \\[x1\\]\n+**\tret\n+*/\n+void v4qi_v4hi_zext(unsigned char *t, short *t1)\n+{\n+  unsigned char tmp[4] = {t[0], t[1], t[2], t[3]};\n+  t1[0] = tmp[0];\n+  t1[1] = tmp[1];\n+  t1[2] = tmp[2];\n+  t1[3] = tmp[3];\n+}\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_3.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_3.c\nnew file mode 100644\nindex 000000000000..46f640f4030f\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_3.c\n@@ -0,0 +1,34 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fno-vect-cost-model\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing dup SLP and pattern. */\n+\n+/*\n+** v2hi_dup:\n+**\tdup\tv([0-9]+).4h, w1\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_dup(short *t, short tt)\n+{\n+  t[0] = tt;\n+  t[1] = tt;\n+}\n+\n+/*\n+** v4qi_dup:\n+**\tdup\tv([0-9]+).8b, w1\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_dup(char *t, char tt)\n+{\n+  t[0] = tt;\n+  t[1] = tt;\n+  t[2] = tt;\n+  t[3] = tt;\n+}\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_4.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_4.c\nnew file mode 100644\nindex 000000000000..3872268a4fc5\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_4.c\n@@ -0,0 +1,171 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fno-vect-cost-model\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing orn/bic/and/xor/ior SLP and patterns. */\n+\n+/*\n+** v2hi_orn:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\torn\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_orn(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] |= ~tt[0];\n+  t[1] |= ~tt[1];\n+}\n+\n+/*\n+** v2hi_bic:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\tbic\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_bic(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] &= ~tt[0];\n+  t[1] &= ~tt[1];\n+}\n+\n+/*\n+** v4qi_orn:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\torn\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_orn(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] |= ~tt[0];\n+  t[1] |= ~tt[1];\n+  t[2] |= ~tt[2];\n+  t[3] |= ~tt[3];\n+}\n+\n+\n+/*\n+** v4qi_bic:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\tbic\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_bic(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] &= ~tt[0];\n+  t[1] &= ~tt[1];\n+  t[2] &= ~tt[2];\n+  t[3] &= ~tt[3];\n+}\n+\n+\n+\n+/*\n+** v2hi_ior:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\torr\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_ior(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] |= tt[0];\n+  t[1] |= tt[1];\n+}\n+\n+/*\n+** v2hi_and:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\tand\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_and(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] &= tt[0];\n+  t[1] &= tt[1];\n+}\n+\n+/*\n+** v2hi_xor:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\teor\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_xor(short * __restrict t, short * __restrict tt)\n+{\n+  t[0] ^= tt[0];\n+  t[1] ^= tt[1];\n+}\n+\n+/*\n+** v4qi_ior:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\torr\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_ior(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] |= tt[0];\n+  t[1] |= tt[1];\n+  t[2] |= tt[2];\n+  t[3] |= tt[3];\n+}\n+\n+\n+/*\n+** v4qi_and:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\tand\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_and(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] &= tt[0];\n+  t[1] &= tt[1];\n+  t[2] &= tt[2];\n+  t[3] &= tt[3];\n+}\n+\n+\n+/*\n+** v4qi_xor:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tldr\ts([0-9]+), \\[x1\\]\n+**\teor\tv([0-9]+).8b, v\\1.8b, v\\2.8b\n+**\tstr\ts\\3, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_xor(char * __restrict t, char * __restrict tt)\n+{\n+  t[0] ^= tt[0];\n+  t[1] ^= tt[1];\n+  t[2] ^= tt[2];\n+  t[3] ^= tt[3];\n+}\n\\ No newline at end of file\n",
    "prefixes": [
        "v1",
        "04/11"
    ]
}