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GET /api/1.2/patches/2225536/?format=api
{ "id": 2225536, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2225536/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260421065226.3907745-6-gaurav.sharma_7@nxp.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260421065226.3907745-6-gaurav.sharma_7@nxp.com>", "list_archive_url": null, "date": "2026-04-21T06:52:16", "name": "[PATCHv7,05/15] hw/arm/fsl-imx8mm: Implemented support for SNVS", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f86f26c75dfc1b1e5a04da5222ec49e3fea04129", "submitter": { "id": 92057, "url": "http://patchwork.ozlabs.org/api/1.2/people/92057/?format=api", "name": "Gaurav Sharma", "email": "gaurav.sharma_7@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260421065226.3907745-6-gaurav.sharma_7@nxp.com/mbox/", "series": [ { "id": 500745, "url": "http://patchwork.ozlabs.org/api/1.2/series/500745/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500745", "date": "2026-04-21T06:52:17", "name": "Adding comprehensive support for i.MX8MM EVK board", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500745/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225536/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225536/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g0Cjr15QKz1yGs\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 21 Apr 2026 16:53:20 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wF4yO-0003kw-Qx; Tue, 21 Apr 2026 02:52:40 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <gaurav.sharma_7@nxp.com>)\n id 1wF4yN-0003jl-0y\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 02:52:39 -0400", "from inva021.nxp.com ([92.121.34.21])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <gaurav.sharma_7@nxp.com>)\n id 1wF4yJ-000071-0l\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 02:52:38 -0400", "from inva021.nxp.com (localhost [127.0.0.1])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 1B4CA201B16;\n Tue, 21 Apr 2026 08:52:33 +0200 (CEST)", "from aprdc01srsp001v.ap-rdc01.nxp.com\n (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D94E0201AFD;\n Tue, 21 Apr 2026 08:52:32 +0200 (CEST)", "from lsv031015.swis.in-blr01.nxp.com\n (lsv031015.swis.in-blr01.nxp.com [10.12.177.77])\n by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 083F418002A8;\n Tue, 21 Apr 2026 14:52:31 +0800 (+08)" ], "From": "Gaurav Sharma <gaurav.sharma_7@nxp.com>", "To": "qemu-devel@nongnu.org", "Cc": "pbonzini@redhat.com, peter.maydell@linaro.org,\n Gaurav Sharma <gaurav.sharma_7@nxp.com>", "Subject": "[PATCHv7 05/15] hw/arm/fsl-imx8mm: Implemented support for SNVS", "Date": "Tue, 21 Apr 2026 12:22:16 +0530", "Message-Id": "<20260421065226.3907745-6-gaurav.sharma_7@nxp.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260421065226.3907745-1-gaurav.sharma_7@nxp.com>", "References": "<20260421065226.3907745-1-gaurav.sharma_7@nxp.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Received-SPF": "pass client-ip=92.121.34.21;\n envelope-from=gaurav.sharma_7@nxp.com; helo=inva021.nxp.com", "X-Spam_score_int": "-41", "X-Spam_score": "-4.2", "X-Spam_bar": "----", "X-Spam_report": "(-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "SNVS contains an RTC which allows Linux to deal correctly with time\n\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Gaurav Sharma <gaurav.sharma_7@nxp.com>\n---\n hw/arm/fsl-imx8mm.c | 10 ++++++++++\n include/hw/arm/fsl-imx8mm.h | 2 ++\n 2 files changed, 12 insertions(+)", "diff": "diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c\nindex 053434412c..8999bc701e 100644\n--- a/hw/arm/fsl-imx8mm.c\n+++ b/hw/arm/fsl-imx8mm.c\n@@ -173,6 +173,8 @@ static void fsl_imx8mm_init(Object *obj)\n \n object_initialize_child(obj, \"analog\", &s->analog, TYPE_IMX8MP_ANALOG);\n \n+ object_initialize_child(obj, \"snvs\", &s->snvs, TYPE_IMX7_SNVS);\n+\n for (i = 0; i < FSL_IMX8MM_NUM_UARTS; i++) {\n g_autofree char *name = g_strdup_printf(\"uart%d\", i + 1);\n object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL);\n@@ -355,6 +357,13 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)\n fsl_imx8mm_memmap[FSL_IMX8MM_OCRAM].addr,\n &s->ocram);\n \n+ /* SNVS */\n+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {\n+ return;\n+ }\n+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0,\n+ fsl_imx8mm_memmap[FSL_IMX8MM_SNVS_HP].addr);\n+\n /* Unimplemented devices */\n for (i = 0; i < ARRAY_SIZE(fsl_imx8mm_memmap); i++) {\n switch (i) {\n@@ -364,6 +373,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)\n case FSL_IMX8MM_GIC_REDIST:\n case FSL_IMX8MM_RAM:\n case FSL_IMX8MM_OCRAM:\n+ case FSL_IMX8MM_SNVS_HP:\n case FSL_IMX8MM_UART1 ... FSL_IMX8MM_UART4:\n /* device implemented and treated above */\n break;\ndiff --git a/include/hw/arm/fsl-imx8mm.h b/include/hw/arm/fsl-imx8mm.h\nindex df35f0f5ac..8a172b89e0 100644\n--- a/include/hw/arm/fsl-imx8mm.h\n+++ b/include/hw/arm/fsl-imx8mm.h\n@@ -13,6 +13,7 @@\n #include \"cpu.h\"\n #include \"hw/char/imx_serial.h\"\n #include \"hw/intc/arm_gicv3_common.h\"\n+#include \"hw/misc/imx7_snvs.h\"\n #include \"hw/misc/imx8mp_analog.h\"\n #include \"hw/misc/imx8mp_ccm.h\"\n #include \"qom/object.h\"\n@@ -37,6 +38,7 @@ struct FslImx8mmState {\n GICv3State gic;\n IMX8MPCCMState ccm;\n IMX8MPAnalogState analog;\n+ IMX7SNVSState snvs;\n IMXSerialState uart[FSL_IMX8MM_NUM_UARTS];\n MemoryRegion ocram;\n };\n", "prefixes": [ "PATCHv7", "05/15" ] }