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GET /api/1.2/patches/2224586/?format=api
HTTP 200 OK
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{
    "id": 2224586,
    "url": "http://patchwork.ozlabs.org/api/1.2/patches/2224586/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417164328.1009132-8-alex.bennee@linaro.org/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260417164328.1009132-8-alex.bennee@linaro.org>",
    "list_archive_url": null,
    "date": "2026-04-17T16:43:27",
    "name": "[7/7] tests/tcg: add basic test for aarch64 wf[ie][t] insns",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "c0cf16ea3173985d2c3c6f1525909155b3894dfc",
    "submitter": {
        "id": 39532,
        "url": "http://patchwork.ozlabs.org/api/1.2/people/39532/?format=api",
        "name": "Alex Bennée",
        "email": "alex.bennee@linaro.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417164328.1009132-8-alex.bennee@linaro.org/mbox/",
    "series": [
        {
            "id": 500373,
            "url": "http://patchwork.ozlabs.org/api/1.2/series/500373/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500373",
            "date": "2026-04-17T16:43:20",
            "name": "tests/tcg: more capabilities for aarch64-softmmu tests",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/500373/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2224586/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2224586/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "=?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>",
        "To": "qemu-devel@nongnu.org",
        "Cc": "qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,\n\t=?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>",
        "Subject": "[PATCH 7/7] tests/tcg: add basic test for aarch64 wf[ie][t] insns",
        "Date": "Fri, 17 Apr 2026 17:43:27 +0100",
        "Message-ID": "<20260417164328.1009132-8-alex.bennee@linaro.org>",
        "X-Mailer": "git-send-email 2.47.3",
        "In-Reply-To": "<20260417164328.1009132-1-alex.bennee@linaro.org>",
        "References": "<20260417164328.1009132-1-alex.bennee@linaro.org>",
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    },
    "content": "This is based on a generated test case which I've since refined and\ncleaned up.\n\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\n---\n tests/tcg/aarch64/system/wfx.c            | 143 ++++++++++++++++++++++\n tests/tcg/aarch64/Makefile.softmmu-target |   8 ++\n tests/tcg/aarch64/system/boot.S           |  16 ++-\n 3 files changed, 164 insertions(+), 3 deletions(-)\n create mode 100644 tests/tcg/aarch64/system/wfx.c",
    "diff": "diff --git a/tests/tcg/aarch64/system/wfx.c b/tests/tcg/aarch64/system/wfx.c\nnew file mode 100644\nindex 00000000000..fa4c6761215\n--- /dev/null\n+++ b/tests/tcg/aarch64/system/wfx.c\n@@ -0,0 +1,143 @@\n+/*\n+ * WFX Instructions Test (WFI, WFE, WFIT, WFET)\n+ *\n+ * Copyright (c) 2026 Linaro Ltd\n+ *\n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ */\n+\n+#include <stdint.h>\n+#include <stdbool.h>\n+#include <minilib.h>\n+#include \"sysregs.h\"\n+#include \"gicv3.h\"\n+\n+#define TIMEOUT 200000\n+\n+#define sev() asm volatile(\"sev\" : : : \"memory\")\n+#define sevl() asm volatile(\"sevl\" : : : \"memory\")\n+#define wfi() asm volatile(\"wfi\" : : : \"memory\")\n+#define wfe() asm volatile(\"wfe\" : : : \"memory\")\n+#define wfit(reg) asm volatile(\"wfit %0\" : : \"r\" (reg) : \"memory\")\n+#define wfet(reg) asm volatile(\"wfet %0\" : : \"r\" (reg) : \"memory\")\n+\n+#define enable_irq()  asm volatile(\"msr daifclr, #2\" : : : \"memory\")\n+#define disable_irq() asm volatile(\"msr daifset, #2\" : : : \"memory\")\n+\n+static bool check_elapsed(uint64_t start, uint64_t threshold, const char *test, bool more)\n+{\n+    uint64_t end = read_sysreg(cntvct_el0);\n+    uint64_t elapsed = end - start;\n+    if (more ? elapsed < threshold : elapsed > threshold) {\n+        ml_printf(\"FAILED: %s %s (%ld ticks)\\n\", test,\n+                  more ? \"woke too early\" : \"slept despite SEV\",\n+                  elapsed);\n+        return false;\n+    }\n+    ml_printf(\"PASSED (%ld ticks)\\n\", elapsed);\n+    return true;\n+}\n+\n+int main(void)\n+{\n+    uint64_t start, timeout;\n+\n+    gicv3_init();\n+    gicv3_enable_irq(27); /* Virtual Timer PPI */\n+\n+    ml_printf(\"WFx[T] Tests\\n\");\n+\n+    /*\n+     * 1. Test WFI with timer interrupt\n+     *\n+     * We don't have a full interrupt handler, but WFI should wake up\n+     * when the interrupt is pending even if we have it masked at the CPU.\n+     * PSTATE.I is set by boot code.\n+     *\n+     * We unmask interrupts here to ensure the CPU can take the minimal\n+     * exception handler defined in boot.S.\n+     */\n+    ml_printf(\"Testing WFI...\");\n+\n+    start = read_sysreg(cntvct_el0);\n+    write_sysreg(TIMEOUT, cntv_tval_el0);\n+    write_sysreg(1, cntv_ctl_el0); /* Enable timer, no mask */\n+    isb();\n+\n+    enable_irq();\n+    wfi();\n+    disable_irq();\n+\n+    if (!check_elapsed(start, TIMEOUT, \"WFI\", true)) {\n+        return 1;\n+    }\n+\n+    /* Validate the timer fired and then disable for future tests */\n+    if (!read_sysreg(cntv_ctl_el0) & 0x4) {\n+        ml_printf(\"Time ISTATUS not set!\\n\");\n+        return 1;\n+    }\n+    write_sysreg(0, cntv_ctl_el0);\n+\n+    /*\n+     * 2. Test WFE and SEV[L]\n+     *\n+     * There are two SEV instructions, the normal one is a broadcast\n+     * from any PE on the system, the other is local only.\n+     * Functionally they have the same effect (setting the event\n+     * register) and should be immediately consumed by the WFE.\n+     *\n+     * As we want to detect an early exit the sense of the timeout\n+     * check is reversed.\n+     */\n+    ml_printf(\"Testing WFE/SEV...\");\n+    sev();\n+    start = read_sysreg(cntvct_el0);\n+    wfe();\n+    if (!check_elapsed(start, TIMEOUT, \"WFE\", false)) {\n+        return 1;\n+    }\n+\n+    ml_printf(\"Testing WFE/SEVL...\");\n+    sevl();\n+    start = read_sysreg(cntvct_el0);\n+    wfe();\n+    if (!check_elapsed(start, TIMEOUT, \"WFE\", false)) {\n+        return 1;\n+    }\n+\n+    /*\n+     * 3. Test WFIT\n+     *\n+     * With the timer now disabled and no other IRQ sources firing the\n+     * WFIT instruction should timeout. Although the architecture\n+     * permits this being treated as a NOP we have enabled it.\n+     */\n+    ml_printf(\"Testing WFIT...\");\n+    start = read_sysreg(cntvct_el0);\n+    timeout = start + TIMEOUT;\n+    wfit(timeout);\n+    if (!check_elapsed(start, TIMEOUT, \"WFIT\", true)) {\n+        return 1;\n+    }\n+\n+    /*\n+     * 4. Test WFET\n+     *\n+     * Much like WFIT there are no IRQs to wake us up. However the\n+     * event_register is a latch so we must first consume the event\n+     * register with a normal WFE before we do the timeout version.\n+       */\n+    ml_printf(\"Testing WFET...\");\n+    sev();\n+    wfe();\n+    start = read_sysreg(cntvct_el0);\n+    timeout = start + TIMEOUT;\n+    wfet(timeout);\n+    if (!check_elapsed(start, TIMEOUT, \"WFET\", true)) {\n+        return 1;\n+    }\n+\n+    ml_printf(\"ALL WFX TESTS PASSED\\n\");\n+    return 0;\n+}\ndiff --git a/tests/tcg/aarch64/Makefile.softmmu-target b/tests/tcg/aarch64/Makefile.softmmu-target\nindex 543d638e819..6a1e867fba0 100644\n--- a/tests/tcg/aarch64/Makefile.softmmu-target\n+++ b/tests/tcg/aarch64/Makefile.softmmu-target\n@@ -108,6 +108,14 @@ endif\n \n gicv3.o: gicv3.c gicv3.h\n \t$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@\n+\n+wfx: CFLAGS += -march=armv8.7-a\n+wfx: LDFLAGS += gicv3.o\n+wfx: gicv3.o\n+\n+QEMU_GICV3_MACHINE=-M virt,gic-version=3 -cpu max -display none\n+run-wfx: QEMU_OPTS=$(QEMU_GICV3_MACHINE) $(QEMU_BASE_ARGS) -kernel\n+\n ifneq ($(CROSS_CC_HAS_ARMV8_MTE),)\n QEMU_MTE_ENABLED_MACHINE=-M virt,mte=on -cpu max -display none\n QEMU_OPTS_WITH_MTE_ON = $(QEMU_MTE_ENABLED_MACHINE) $(QEMU_BASE_ARGS) -kernel\ndiff --git a/tests/tcg/aarch64/system/boot.S b/tests/tcg/aarch64/system/boot.S\nindex bee8d9372e7..ba9000a749d 100644\n--- a/tests/tcg/aarch64/system/boot.S\n+++ b/tests/tcg/aarch64/system/boot.S\n@@ -35,7 +35,7 @@ vector_table:\n \n \t/* Current EL with SPx.\t */\n \tventry\tcurr_spx_sync\t\t/* Synchronous\t*/\n-\tventry\tcurr_spx_irq\t\t/* IRQ/vIRQ  */\n+\tventry\tcurr_spx_irq\t\t/* Basic handler for IRQ/vIRQ */\n \tventry\tcurr_spx_fiq\t\t/* FIQ/vFIQ  */\n \tventry\tcurr_spx_serror\t\t/* SError/VSError  */\n \n@@ -54,13 +54,12 @@ vector_table:\n \t.text\n \t.align 4\n \n-\t/* Common vector handling for now */\n+\t/* Apart from curr_spx_irq we error out with an unexpected exception */\n curr_sp0_sync:\n curr_sp0_irq:\n curr_sp0_fiq:\n curr_sp0_serror:\n curr_spx_sync:\n-curr_spx_irq:\n curr_spx_fiq:\n curr_spx_serror:\n lower_a64_sync:\n@@ -275,6 +274,17 @@ _exit:\n \tsemihosting_call\n \t/* never returns */\n \n+\t/*\n+\t * IRQ handler\n+\t */\n+\t.global curr_spx_irq\n+curr_spx_irq:\n+\t/* Minimal IRQ handler: just mask the timer and return */\n+\tmrs\tx0, cntv_ctl_el0\n+\torr\tx0, x0, #2\t\t/* IMASK=1 */\n+\tmsr\tcntv_ctl_el0, x0\n+\teret\n+\n \t/*\n \t * Helper Functions\n \t*/\n",
    "prefixes": [
        "7/7"
    ]
}