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GET /api/1.2/patches/2224408/?format=api
{ "id": 2224408, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2224408/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417105618.3621-19-magnuskulke@linux.microsoft.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260417105618.3621-19-magnuskulke@linux.microsoft.com>", "list_archive_url": null, "date": "2026-04-17T10:56:02", "name": "[18/34] accel/mshv: store partition proc features", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "1d2e34863108107619f68c4377f4f2a30be776e8", "submitter": { "id": 90753, "url": "http://patchwork.ozlabs.org/api/1.2/people/90753/?format=api", "name": "Magnus Kulke", "email": "magnuskulke@linux.microsoft.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417105618.3621-19-magnuskulke@linux.microsoft.com/mbox/", "series": [ { "id": 500310, "url": "http://patchwork.ozlabs.org/api/1.2/series/500310/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500310", "date": "2026-04-17T10:55:44", "name": "Add migration support to the MSHV accelerator", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500310/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224408/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224408/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=linux.microsoft.com header.i=@linux.microsoft.com\n header.a=rsa-sha256 header.s=default header.b=F15xUZaa;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxsMt0GM7z1yD3\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 17 Apr 2026 20:59:38 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wDgtN-0002GQ-DE; Fri, 17 Apr 2026 06:57:45 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <magnuskulke@linux.microsoft.com>)\n id 1wDgtK-00022B-Rw\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 06:57:42 -0400", "from linux.microsoft.com ([13.77.154.182])\n by eggs.gnu.org with esmtp (Exim 4.90_1)\n (envelope-from <magnuskulke@linux.microsoft.com>) id 1wDgtI-0001cB-Ti\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 06:57:42 -0400", "from DESKTOP-TUU1E5L.fritz.box (p5086d620.dip0.t-ipconnect.de\n [80.134.214.32])\n by linux.microsoft.com (Postfix) with ESMTPSA id 3FB0020B712B;\n Fri, 17 Apr 2026 03:57:27 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 3FB0020B712B", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1776423450;\n bh=woE1TvbqFZZTyZVe1cjv9efbwCWr2liX43DCXsc8dHo=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=F15xUZaaKJXoks7R/bmLO1uLjfKTWI39N+Mp36n1Y7ER5Yzi6eOxpGKamn6K4KpT1\n XUoLHMNxAnJUxRNjdRYgIR4ly2BuvkwmJ14Mx477TTbbbi4DRsyclzyD4ByaSF+vac\n 58Vm/yf67v1UmHmk750SZICCCy3sm+NAIkPag0GY=", "From": "Magnus Kulke <magnuskulke@linux.microsoft.com>", "To": "qemu-devel@nongnu.org", "Cc": "kvm@vger.kernel.org, Magnus Kulke <magnuskulke@microsoft.com>,\n Wei Liu <liuwe@microsoft.com>, \"Michael S. Tsirkin\" <mst@redhat.com>,\n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@redhat.com>,\n Zhao Liu <zhao1.liu@intel.com>,\n Richard Henderson <richard.henderson@linaro.org>,\n Paolo Bonzini <pbonzini@redhat.com>, Wei Liu <wei.liu@kernel.org>,\n Magnus Kulke <magnuskulke@linux.microsoft.com>,\n Alex Williamson <alex@shazbot.org>,\n Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, =?utf-8?q?Philippe_Mathieu-D?=\n\t=?utf-8?q?aud=C3=A9?= <philmd@linaro.org>,\n Marcelo Tosatti <mtosatti@redhat.com>", "Subject": "[PATCH 18/34] accel/mshv: store partition proc features", "Date": "Fri, 17 Apr 2026 12:56:02 +0200", "Message-Id": "<20260417105618.3621-19-magnuskulke@linux.microsoft.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260417105618.3621-1-magnuskulke@linux.microsoft.com>", "References": "<20260417105618.3621-1-magnuskulke@linux.microsoft.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=13.77.154.182;\n envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com", "X-Spam_score_int": "-42", "X-Spam_score": "-4.3", "X-Spam_bar": "----", "X-Spam_report": "(-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "We retrieve and store processor features on the state, so we can query\nthem later when deciding which MSRs to migrate.\n\nSigned-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>\n---\n accel/mshv/mshv-all.c | 57 +++++++++++++++\n include/hw/hyperv/hvhdk.h | 150 ++++++++++++++++++++++++++++++++++++++\n include/system/mshv_int.h | 2 +\n 3 files changed, 209 insertions(+)", "diff": "diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c\nindex 056b19b3b8..4c1a42d002 100644\n--- a/accel/mshv/mshv-all.c\n+++ b/accel/mshv/mshv-all.c\n@@ -106,6 +106,57 @@ static int resume_vm(int vm_fd)\n return 0;\n }\n \n+static int get_partition_property(int vm_fd, uint32_t feature_bank,\n+ uint64_t *value)\n+{\n+ struct hv_input_get_partition_property in = {0};\n+ struct hv_output_get_partition_property out = {0};\n+ struct mshv_root_hvcall args = {0};\n+ int ret;\n+\n+ in.property_code = feature_bank;\n+\n+ args.code = HVCALL_GET_PARTITION_PROPERTY;\n+ args.in_sz = sizeof(in);\n+ args.in_ptr = (uint64_t)∈\n+ args.out_sz = sizeof(out);\n+ args.out_ptr = (uint64_t)&out;\n+\n+ ret = ioctl(vm_fd, MSHV_ROOT_HVCALL, &args);\n+ if (ret < 0) {\n+ error_report(\"Failed to get guest partition property bank: %s\",\n+ strerror(errno));\n+ return -1;\n+ }\n+\n+ *value = out.property_value;\n+ return 0;\n+}\n+\n+static int get_proc_features(int vm_fd,\n+ union hv_partition_processor_features *features)\n+{\n+ int ret;\n+\n+ ret = get_partition_property(vm_fd,\n+ HV_PARTITION_PROPERTY_PROCESSOR_FEATURES0,\n+ features[0].as_uint64);\n+ if (ret < 0) {\n+ error_report(\"Failed to get processor features bank 0\");\n+ return -1;\n+ }\n+\n+ ret = get_partition_property(vm_fd,\n+ HV_PARTITION_PROPERTY_PROCESSOR_FEATURES1,\n+ features[1].as_uint64);\n+ if (ret < 0) {\n+ error_report(\"Failed to get processor features bank 1\");\n+ return -1;\n+ }\n+\n+ return 0;\n+}\n+\n static int create_partition(int mshv_fd, int *vm_fd)\n {\n int ret;\n@@ -441,6 +492,12 @@ static int mshv_init(AccelState *as, MachineState *ms)\n \n s->vm = vm_fd;\n s->fd = mshv_fd;\n+\n+ ret = get_proc_features(vm_fd, &s->processor_features);\n+ if (ret < 0) {\n+ return -1;\n+ }\n+\n s->nr_as = 1;\n s->as = g_new0(MshvAddressSpace, s->nr_as);\n \ndiff --git a/include/hw/hyperv/hvhdk.h b/include/hw/hyperv/hvhdk.h\nindex 41af743847..95524f317c 100644\n--- a/include/hw/hyperv/hvhdk.h\n+++ b/include/hw/hyperv/hvhdk.h\n@@ -11,6 +11,16 @@\n \n #define HV_PARTITION_SYNTHETIC_PROCESSOR_FEATURES_BANKS 1\n \n+struct hv_input_get_partition_property {\n+ uint64_t partition_id;\n+ uint32_t property_code; /* enum hv_partition_property_code */\n+ uint32_t padding;\n+} QEMU_PACKED;\n+\n+struct hv_output_get_partition_property {\n+ uint64_t property_value;\n+} QEMU_PACKED;\n+\n struct hv_input_set_partition_property {\n uint64_t partition_id;\n uint32_t property_code; /* enum hv_partition_property_code */\n@@ -161,6 +171,146 @@ union hv_partition_synthetic_processor_features {\n };\n };\n \n+#define HV_PARTITION_PROCESSOR_FEATURES_BANKS 2\n+#define HV_PARTITION_PROCESSOR_FEATURES_RESERVEDBANK1_BITFIELD_COUNT 4\n+\n+\n+union hv_partition_processor_features {\n+ uint64_t as_uint64[HV_PARTITION_PROCESSOR_FEATURES_BANKS];\n+ struct {\n+ uint64_t sse3_support:1;\n+ uint64_t lahf_sahf_support:1;\n+ uint64_t ssse3_support:1;\n+ uint64_t sse4_1_support:1;\n+ uint64_t sse4_2_support:1;\n+ uint64_t sse4a_support:1;\n+ uint64_t xop_support:1;\n+ uint64_t pop_cnt_support:1;\n+ uint64_t cmpxchg16b_support:1;\n+ uint64_t altmovcr8_support:1;\n+ uint64_t lzcnt_support:1;\n+ uint64_t mis_align_sse_support:1;\n+ uint64_t mmx_ext_support:1;\n+ uint64_t amd3dnow_support:1;\n+ uint64_t extended_amd3dnow_support:1;\n+ uint64_t page_1gb_support:1;\n+ uint64_t aes_support:1;\n+ uint64_t pclmulqdq_support:1;\n+ uint64_t pcid_support:1;\n+ uint64_t fma4_support:1;\n+ uint64_t f16c_support:1;\n+ uint64_t rd_rand_support:1;\n+ uint64_t rd_wr_fs_gs_support:1;\n+ uint64_t smep_support:1;\n+ uint64_t enhanced_fast_string_support:1;\n+ uint64_t bmi1_support:1;\n+ uint64_t bmi2_support:1;\n+ uint64_t hle_support_deprecated:1;\n+ uint64_t rtm_support_deprecated:1;\n+ uint64_t movbe_support:1;\n+ uint64_t npiep1_support:1;\n+ uint64_t dep_x87_fpu_save_support:1;\n+ uint64_t rd_seed_support:1;\n+ uint64_t adx_support:1;\n+ uint64_t intel_prefetch_support:1;\n+ uint64_t smap_support:1;\n+ uint64_t hle_support:1;\n+ uint64_t rtm_support:1;\n+ uint64_t rdtscp_support:1;\n+ uint64_t clflushopt_support:1;\n+ uint64_t clwb_support:1;\n+ uint64_t sha_support:1;\n+ uint64_t x87_pointers_saved_support:1;\n+ uint64_t invpcid_support:1;\n+ uint64_t ibrs_support:1;\n+ uint64_t stibp_support:1;\n+ uint64_t ibpb_support:1;\n+ uint64_t unrestricted_guest_support:1;\n+ uint64_t mdd_support:1;\n+ uint64_t fast_short_rep_mov_support:1;\n+ uint64_t l1dcache_flush_support:1;\n+ uint64_t rdcl_no_support:1;\n+ uint64_t ibrs_all_support:1;\n+ uint64_t skip_l1df_support:1;\n+ uint64_t ssb_no_support:1;\n+ uint64_t rsb_a_no_support:1;\n+ uint64_t virt_spec_ctrl_support:1;\n+ uint64_t rd_pid_support:1;\n+ uint64_t umip_support:1;\n+ uint64_t mbs_no_support:1;\n+ uint64_t mb_clear_support:1;\n+ uint64_t taa_no_support:1;\n+ uint64_t tsx_ctrl_support:1;\n+ uint64_t reserved_bank0:1;\n+\n+ /* N.B. Begin bank 1 processor features. */\n+ uint64_t a_count_m_count_support:1;\n+ uint64_t tsc_invariant_support:1;\n+ uint64_t cl_zero_support:1;\n+ uint64_t rdpru_support:1;\n+ uint64_t la57_support:1;\n+ uint64_t mbec_support:1;\n+ uint64_t nested_virt_support:1;\n+ uint64_t psfd_support:1;\n+ uint64_t cet_ss_support:1;\n+ uint64_t cet_ibt_support:1;\n+ uint64_t vmx_exception_inject_support:1;\n+ uint64_t enqcmd_support:1;\n+ uint64_t umwait_tpause_support:1;\n+ uint64_t movdiri_support:1;\n+ uint64_t movdir64b_support:1;\n+ uint64_t cldemote_support:1;\n+ uint64_t serialize_support:1;\n+ uint64_t tsc_deadline_tmr_support:1;\n+ uint64_t tsc_adjust_support:1;\n+ uint64_t fzl_rep_movsb:1;\n+ uint64_t fs_rep_stosb:1;\n+ uint64_t fs_rep_cmpsb:1;\n+ uint64_t tsx_ld_trk_support:1;\n+ uint64_t vmx_ins_outs_exit_info_support:1;\n+ uint64_t hlat_support:1;\n+ uint64_t sbdr_ssdp_no_support:1;\n+ uint64_t fbsdp_no_support:1;\n+ uint64_t psdp_no_support:1;\n+ uint64_t fb_clear_support:1;\n+ uint64_t btc_no_support:1;\n+ uint64_t ibpb_rsb_flush_support:1;\n+ uint64_t stibp_always_on_support:1;\n+ uint64_t perf_global_ctrl_support:1;\n+ uint64_t npt_execute_only_support:1;\n+ uint64_t npt_ad_flags_support:1;\n+ uint64_t npt1_gb_page_support:1;\n+ uint64_t amd_processor_topology_node_id_support:1;\n+ uint64_t local_machine_check_support:1;\n+ uint64_t extended_topology_leaf_fp256_amd_support:1;\n+ uint64_t gds_no_support:1;\n+ uint64_t cmpccxadd_support:1;\n+ uint64_t tsc_aux_virtualization_support:1;\n+ uint64_t rmp_query_support:1;\n+ uint64_t bhi_no_support:1;\n+ uint64_t bhi_dis_support:1;\n+ uint64_t prefetch_i_support:1;\n+ uint64_t sha512_support:1;\n+ uint64_t mitigation_ctrl_support:1;\n+ uint64_t rfds_no_support:1;\n+ uint64_t rfds_clear_support:1;\n+ uint64_t sm3_support:1;\n+ uint64_t sm4_support:1;\n+ uint64_t secure_avic_support:1;\n+ uint64_t guest_intercept_ctrl_support:1;\n+ uint64_t sbpb_supported:1;\n+ uint64_t ibpb_br_type_supported:1;\n+ uint64_t srso_no_supported:1;\n+ uint64_t srso_user_kernel_no_supported:1;\n+ uint64_t vrew_clear_supported:1;\n+ uint64_t tsa_l1_no_supported:1;\n+ uint64_t tsa_sq_no_supported:1;\n+ uint64_t lass_support:1;\n+ uint64_t idle_hlt_intercept_support:1;\n+ uint64_t msr_list_support:1;\n+ } QEMU_PACKED;\n+};\n+\n enum hv_translate_gva_result_code {\n HV_TRANSLATE_GVA_SUCCESS = 0,\n \ndiff --git a/include/system/mshv_int.h b/include/system/mshv_int.h\nindex f86c7a3be6..2b6d7b2f35 100644\n--- a/include/system/mshv_int.h\n+++ b/include/system/mshv_int.h\n@@ -15,6 +15,7 @@\n #define QEMU_MSHV_INT_H\n \n #define MSHV_MSR_ENTRIES_COUNT 64\n+#include \"hw/hyperv/hvhdk.h\"\n \n struct mshv_get_set_vp_state;\n \n@@ -55,6 +56,7 @@ struct MshvState {\n int nr_allocated_irq_routes;\n unsigned long *used_gsi_bitmap;\n unsigned int gsi_count;\n+ union hv_partition_processor_features processor_features;\n };\n \n typedef struct MshvMsiControl {\n", "prefixes": [ "18/34" ] }