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GET /api/1.2/patches/2224369/?format=api
{ "id": 2224369, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2224369/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417104652.17857-15-xiaoou@iscas.ac.cn/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260417104652.17857-15-xiaoou@iscas.ac.cn>", "list_archive_url": null, "date": "2026-04-17T10:46:51", "name": "[14/14] target/riscv: rvp: update to v020, add SHL and PNCLIP[U]P.* instructions", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9881846a1ac9c4b5fb6d281783498d20a68c82bf", "submitter": { "id": 89843, "url": "http://patchwork.ozlabs.org/api/1.2/people/89843/?format=api", "name": "Molly Chen", "email": "xiaoou@iscas.ac.cn" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417104652.17857-15-xiaoou@iscas.ac.cn/mbox/", "series": [ { "id": 500307, "url": "http://patchwork.ozlabs.org/api/1.2/series/500307/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500307", "date": "2026-04-17T10:46:37", "name": "target/riscv: add support for RISC-V P extension (v0.20 draft)", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500307/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224369/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224369/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxs8G1JGJz1yHp\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 17 Apr 2026 20:49:34 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wDgjq-0001XR-Ue; Fri, 17 Apr 2026 06:47:54 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <xiaoou@iscas.ac.cn>)\n id 1wDgjo-0001Tu-Hj; Fri, 17 Apr 2026 06:47:52 -0400", "from smtp21.cstnet.cn ([159.226.251.21] helo=cstnet.cn)\n by eggs.gnu.org with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256)\n (Exim 4.90_1) (envelope-from <xiaoou@iscas.ac.cn>)\n id 1wDgjl-000846-F4; Fri, 17 Apr 2026 06:47:52 -0400", "from Huawei.localdomain (unknown [36.110.52.2])\n by APP-01 (Coremail) with SMTP id qwCowAB3H2ulD+JpLDmSDQ--.804S16;\n Fri, 17 Apr 2026 18:47:25 +0800 (CST)" ], "From": "Molly Chen <xiaoou@iscas.ac.cn>", "To": "palmer@dabbelt.com, alistair.francis@wdc.com, liwei1518@gmail.com,\n daniel.barboza@oss.qualcomm.com, zhiwei_liu@linux.alibaba.com,\n chao.liu.zevorn@gmail.com", "Cc": "xiaoou@iscas.ac.cn,\n\tqemu-riscv@nongnu.org,\n\tqemu-devel@nongnu.org", "Subject": "[PATCH 14/14] target/riscv: rvp: update to v020,\n add SHL and PNCLIP[U]P.* instructions", "Date": "Fri, 17 Apr 2026 18:46:51 +0800", "Message-Id": "<20260417104652.17857-15-xiaoou@iscas.ac.cn>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260417104652.17857-1-xiaoou@iscas.ac.cn>", "References": "<20260417104652.17857-1-xiaoou@iscas.ac.cn>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-CM-TRANSID": "qwCowAB3H2ulD+JpLDmSDQ--.804S16", "X-Coremail-Antispam": "1UD129KBjvAXoWfJF4UWrWxCFyfXr4UGFyUZFb_yoW8Gw1xZo\n WrKw45Ar1fGw13u34F9w4UXr1UZr92vw1kGr48Zr42qas7Wr12gFn8J3s5AF40qrWayrW7\n XrZ3WryrtF1akr9rn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3\n AaLaJ3UjIYCTnIWjp_UUUOb7AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva\n j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r126s0DM28Irc\n Ia0xkI8VCY1x0267AKxVW5JVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l\n 84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4UJV\n WxJr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE\n 3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2I\n x0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8\n JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc7CjxVAaw2AFwI0_Jw\n 0_GFyl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AK\n xVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrx\n kI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Gr0_Xr1lIxAIcVC0I7IYx2IY6xkF7I0E14v2\n 6r4UJVWxJr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F\n 4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr1j6F4UJbIYCTnIWIevJa73UjIFyTuYvjfU5Tmh\n DUUUU", "X-Originating-IP": "[36.110.52.2]", "X-CM-SenderInfo": "50ld003x6l2u1dvotugofq/", "Received-SPF": "pass client-ip=159.226.251.21; envelope-from=xiaoou@iscas.ac.cn;\n helo=cstnet.cn", "X-Spam_score_int": "-21", "X-Spam_score": "-2.2", "X-Spam_bar": "--", "X-Spam_report": "(-2.2 / 5.0 requ) BAYES_00=-1.9, HK_RANDOM_ENVFROM=0.998,\n HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Signed-off-by: Molly Chen <xiaoou@iscas.ac.cn>\n---\n target/riscv/helper.h | 14 +\n target/riscv/insn32.decode | 22 ++\n target/riscv/insn_trans/trans_rvp.c.inc | 18 ++\n target/riscv/psimd_helper.c | 370 ++++++++++++++++++++++++\n 4 files changed, 424 insertions(+)", "diff": "diff --git a/target/riscv/helper.h b/target/riscv/helper.h\nindex 85d4fe1b67..a9dbe53dbf 100644\n--- a/target/riscv/helper.h\n+++ b/target/riscv/helper.h\n@@ -1483,6 +1483,14 @@ DEF_HELPER_3(ssha, i32, env, i32, i32)\n DEF_HELPER_3(sshar, i32, env, i32, i32)\n DEF_HELPER_3(sha, i64, env, i64, i64)\n DEF_HELPER_3(shar, i64, env, i64, i64)\n+DEF_HELPER_3(psshl_hs, tl, env, tl, tl)\n+DEF_HELPER_3(psshlr_hs, tl, env, tl, tl)\n+DEF_HELPER_3(psshl_ws, i64, env, i64, i64)\n+DEF_HELPER_3(psshlr_ws, i64, env, i64, i64)\n+DEF_HELPER_3(sshl, i32, env, i32, i32)\n+DEF_HELPER_3(sshlr, i32, env, i32, i32)\n+DEF_HELPER_3(shl, i64, env, i64, i64)\n+DEF_HELPER_3(shlr, i64, env, i64, i64)\n \n /* Packed SIMD - Exchange Operations */\n DEF_HELPER_3(pas_hx, tl, env, tl, tl)\n@@ -1538,6 +1546,12 @@ DEF_HELPER_4(srx, tl, env, tl, tl, tl)\n DEF_HELPER_4(mvm, tl, env, tl, tl, tl)\n DEF_HELPER_4(mvmn, tl, env, tl, tl, tl)\n DEF_HELPER_4(merge, tl, env, tl, tl, tl)\n+DEF_HELPER_3(pnclipp_b, i64, env, i64, i64)\n+DEF_HELPER_3(pnclipup_b, i64, env, i64, i64)\n+DEF_HELPER_3(pnclipp_h, i64, env, i64, i64)\n+DEF_HELPER_3(pnclipup_h, i64, env, i64, i64)\n+DEF_HELPER_3(pnclipp_w, i64, env, i64, i64)\n+DEF_HELPER_3(pnclipup_w, i64, env, i64, i64)\n \n /* Packed SIMD - Count Leading Operations */\n DEF_HELPER_2(cls, tl, env, tl)\ndiff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode\nindex 7be0b9e5e6..d7aebd55e2 100644\n--- a/target/riscv/insn32.decode\n+++ b/target/riscv/insn32.decode\n@@ -1293,6 +1293,18 @@ psshar_hs 1111100 ..... ..... 010 ..... 0011011 @r\n }\n sha 1110111 ..... ..... 010 ..... 0011011 @r\n shar 1111111 ..... ..... 010 ..... 0011011 @r\n+psshl_hs 1010100 ..... ..... 010 ..... 0011011 @r\n+psshlr_hs 1011100 ..... ..... 010 ..... 0011011 @r\n+{\n+ psshl_ws 1010101 ..... ..... 010 ..... 0011011 @r\n+ sshl 1010101 ..... ..... 010 ..... 0011011 @r\n+}\n+{\n+ psshlr_ws 1011101 ..... ..... 010 ..... 0011011 @r\n+ sshlr 1011101 ..... ..... 010 ..... 0011011 @r\n+}\n+shl 1010111 ..... ..... 010 ..... 0011011 @r\n+shlr 1011111 ..... ..... 010 ..... 0011011 @r\n \n # Packed SIMD - Exchange Operations\n pas_hx 1000000 ..... ..... 110 ..... 0111011 @r\n@@ -1346,6 +1358,12 @@ srx 1010111 ..... ..... 001 ..... 0111011 @r\n mvm 1010100 ..... ..... 001 ..... 0111011 @r\n mvmn 1010101 ..... ..... 001 ..... 0111011 @r\n merge 1010110 ..... ..... 001 ..... 0111011 @r\n+pnclipp_b 1100000 ..... ..... 010 ..... 0111011 @r\n+pnclipup_b 1000000 ..... ..... 010 ..... 0111011 @r\n+pnclipp_h 1100001 ..... ..... 010 ..... 0111011 @r\n+pnclipup_h 1000001 ..... ..... 010 ..... 0111011 @r\n+pnclipp_w 1100011 ..... ..... 010 ..... 0111011 @r\n+pnclipup_w 1000011 ..... ..... 010 ..... 0111011 @r\n \n # Packed SIMD - Count Leading Operations\n cls 01100 0000011 ..... 001 ..... 0010011 @r2\n@@ -1790,12 +1808,16 @@ psrl_dhs 0000100 ..... .... 1110 .... 00011011 @r_p_3\n psra_dhs 0100100 ..... .... 1110 .... 00011011 @r_p_3\n pssha_dhs 0110100 ..... .... 0110 .... 00011011 @r_p_3\n psshar_dhs 0111100 ..... .... 0110 .... 00011011 @r_p_3\n+psshl_dhs 0010100 ..... .... 0110 .... 00011011 @r_p_3\n+psshlr_dhs 0011100 ..... .... 0110 .... 00011011 @r_p_3\n padd_dws 0001101 ..... .... 0110 .... 00011011 @r_p_3\n psll_dws 0000101 ..... .... 0110 .... 00011011 @r_p_3\n psrl_dws 0000101 ..... .... 1110 .... 00011011 @r_p_3\n psra_dws 0100101 ..... .... 1110 .... 00011011 @r_p_3\n pssha_dws 0110101 ..... .... 0110 .... 00011011 @r_p_3\n psshar_dws 0111101 ..... .... 0110 .... 00011011 @r_p_3\n+psshl_dws 0010101 ..... .... 0110 .... 00011011 @r_p_3\n+psshlr_dws 0011101 ..... .... 0110 .... 00011011 @r_p_3\n \n # register-pair operands\n ppaire_db 1000000 .... 0 .... 1110 .... 00011011 @r_p_2\ndiff --git a/target/riscv/insn_trans/trans_rvp.c.inc b/target/riscv/insn_trans/trans_rvp.c.inc\nindex ca459293a3..b4142adcfb 100644\n--- a/target/riscv/insn_trans/trans_rvp.c.inc\n+++ b/target/riscv/insn_trans/trans_rvp.c.inc\n@@ -686,6 +686,14 @@ GEN_SIMD_TRANS_32(ssha)\n GEN_SIMD_TRANS_32(sshar)\n GEN_SIMD_TRANS_64(sha)\n GEN_SIMD_TRANS_64(shar)\n+GEN_SIMD_TRANS(psshl_hs)\n+GEN_SIMD_TRANS(psshlr_hs)\n+GEN_SIMD_TRANS_64(psshl_ws)\n+GEN_SIMD_TRANS_64(psshlr_ws)\n+GEN_SIMD_TRANS_32(sshl)\n+GEN_SIMD_TRANS_32(sshlr)\n+GEN_SIMD_TRANS_64(shl)\n+GEN_SIMD_TRANS_64(shlr)\n \n /* Packed SIMD - Exchange Operations */\n GEN_SIMD_TRANS(pas_hx)\n@@ -739,6 +747,12 @@ GEN_SIMD_TRANS_ACC(srx)\n GEN_SIMD_TRANS_ACC(mvm)\n GEN_SIMD_TRANS_ACC(mvmn)\n GEN_SIMD_TRANS_ACC(merge)\n+GEN_SIMD_TRANS_64(pnclipp_b)\n+GEN_SIMD_TRANS_64(pnclipup_b)\n+GEN_SIMD_TRANS_64(pnclipp_h)\n+GEN_SIMD_TRANS_64(pnclipup_h)\n+GEN_SIMD_TRANS_64(pnclipp_w)\n+GEN_SIMD_TRANS_64(pnclipup_w)\n \n /* Packed SIMD - Count Leading Operations */\n GEN_SIMD_TRANS_R1(cls)\n@@ -1066,8 +1080,12 @@ GEN_SIMD_TRANS_REG_PAIR_3(psrl_dhs, psrl_hs)\n GEN_SIMD_TRANS_REG_PAIR_3(psra_dhs, psra_hs)\n GEN_SIMD_TRANS_REG_PAIR_3(pssha_dhs, pssha_hs)\n GEN_SIMD_TRANS_REG_PAIR_3(psshar_dhs, psshar_hs)\n+GEN_SIMD_TRANS_REG_PAIR_3(psshl_dhs, psshl_hs)\n+GEN_SIMD_TRANS_REG_PAIR_3(psshlr_dhs, psshlr_hs)\n GEN_SIMD_TRANS_REG_PAIR_DW(pssha_dws, ssha)\n GEN_SIMD_TRANS_REG_PAIR_DW(psshar_dws, sshar)\n+GEN_SIMD_TRANS_REG_PAIR_DW(psshl_dws, sshl)\n+GEN_SIMD_TRANS_REG_PAIR_DW(psshlr_dws, sshlr)\n \n GEN_SIMD_TRANS_REG_PAIR_2(ppairo_db, ppairo_b)\n GEN_SIMD_TRANS_REG_PAIR_2(ppairo_dh, ppairo_h)\ndiff --git a/target/riscv/psimd_helper.c b/target/riscv/psimd_helper.c\nindex 4c91800128..96e016d90d 100644\n--- a/target/riscv/psimd_helper.c\n+++ b/target/riscv/psimd_helper.c\n@@ -2704,6 +2704,242 @@ uint64_t HELPER(shar)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n }\n }\n \n+/**\n+ * PSSHL.HS - Packed 16-bit variable shift with unsigned saturation\n+ * Positive shift left (saturating), negative shift right (logical)\n+ */\n+target_ulong HELPER(psshl_hs)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+ int sat = 0;\n+ int8_t shamt = (int8_t)(rs2 & 0xFF);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = (uint16_t)EXTRACT16(rs1, i);\n+ uint16_t res;\n+\n+ if (shamt >= 0) {\n+ uint32_t shifted = (shamt >= 16) ? ((uint32_t)e1 << 16)\n+ : ((uint32_t)e1 << shamt);\n+ res = unsigned_saturate_h(shifted, &sat);\n+ } else {\n+ int right = -shamt;\n+ if (right >= 16) {\n+ res = 0;\n+ } else {\n+ res = e1 >> right;\n+ }\n+ }\n+\n+ rd = INSERT16(rd, res, i);\n+ }\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PSSHLR.HS - Packed 16-bit variable shift with rounding\n+ * and unsigned saturation\n+ * Positive shift left (saturating), negative shift right (logical, rounded)\n+ */\n+target_ulong HELPER(psshlr_hs)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+ int sat = 0;\n+ int8_t shamt = (int8_t)(rs2 & 0xFF);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = (uint16_t)EXTRACT16(rs1, i);\n+ uint16_t res;\n+\n+ if (shamt >= 0) {\n+ uint32_t shifted = (shamt >= 16) ? ((uint32_t)e1 << 16)\n+ : ((uint32_t)e1 << shamt);\n+ res = unsigned_saturate_h(shifted, &sat);\n+ } else {\n+ int right = -shamt;\n+ if (right > 16) {\n+ res = 0;\n+ } else {\n+ uint32_t rounded = ((uint32_t)e1 >> (right - 1)) + 1;\n+ res = (uint16_t)(rounded >> 1);\n+ }\n+ }\n+\n+ rd = INSERT16(rd, res, i);\n+ }\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PSSHL.WS - Packed 32-bit variable shift with unsigned saturation (RV64 only)\n+ * Positive shift left (saturating), negative shift right (logical)\n+ */\n+uint64_t HELPER(psshl_ws)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ int sat = 0;\n+ int8_t shamt = (int8_t)(rs2 & 0xFF);\n+\n+ for (int i = 0; i < 2; i++) {\n+ uint32_t e1 = (uint32_t)EXTRACT32(rs1, i);\n+ uint32_t res;\n+\n+ if (shamt >= 0) {\n+ uint64_t shifted = (shamt >= 32) ? ((uint64_t)e1 << 32)\n+ : ((uint64_t)e1 << shamt);\n+ res = unsigned_saturate_w(shifted, &sat);\n+ } else {\n+ int right = -shamt;\n+ if (right >= 32) {\n+ res = 0;\n+ } else {\n+ res = e1 >> right;\n+ }\n+ }\n+\n+ rd = INSERT32(rd, res, i);\n+ }\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PSSHLR.WS - Packed 32-bit variable shift with rounding\n+ * and unsigned saturation (RV64 only)\n+ * Positive shift left (saturating), negative shift right (logical, rounded)\n+ */\n+uint64_t HELPER(psshlr_ws)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ int sat = 0;\n+ int8_t shamt = (int8_t)(rs2 & 0xFF);\n+\n+ for (int i = 0; i < 2; i++) {\n+ uint32_t e1 = (uint32_t)EXTRACT32(rs1, i);\n+ uint32_t res;\n+\n+ if (shamt >= 0) {\n+ uint64_t shifted = (shamt >= 32) ? ((uint64_t)e1 << 32)\n+ : ((uint64_t)e1 << shamt);\n+ res = unsigned_saturate_w(shifted, &sat);\n+ } else {\n+ int right = -shamt;\n+ if (right > 32) {\n+ res = 0;\n+ } else {\n+ uint64_t rounded = ((uint64_t)e1 >> (right - 1)) + 1;\n+ res = (uint32_t)(rounded >> 1);\n+ }\n+ }\n+\n+ rd = INSERT32(rd, res, i);\n+ }\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * SSHL - 32-bit scalar variable shift with unsigned saturation\n+ */\n+uint32_t HELPER(sshl)(CPURISCVState *env, uint32_t rs1, uint32_t rs2)\n+{\n+ int sat = 0;\n+ int8_t shamt = (int8_t)(rs2 & 0xFF);\n+\n+ if (shamt < 0) {\n+ int right = -shamt;\n+ return (right >= 32) ? 0 : (rs1 >> right);\n+ } else {\n+ uint64_t shifted = (shamt >= 32) ? ((uint64_t)rs1 << 32)\n+ : ((uint64_t)rs1 << shamt);\n+ uint32_t res = unsigned_saturate_w(shifted, &sat);\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return res;\n+ }\n+}\n+\n+/**\n+ * SSHLR - 32-bit scalar variable shift with rounding and unsigned saturation\n+ */\n+uint32_t HELPER(sshlr)(CPURISCVState *env, uint32_t rs1, uint32_t rs2)\n+{\n+ int sat = 0;\n+ int8_t shamt = (int8_t)(rs2 & 0xFF);\n+\n+ if (shamt < 0) {\n+ int right = -shamt;\n+ if (right > 32) {\n+ return 0;\n+ } else {\n+ uint64_t rounded = ((uint64_t)rs1 >> (right - 1)) + 1;\n+ return rounded >> 1;\n+ }\n+ } else {\n+ uint64_t shifted = (shamt >= 32) ? ((uint64_t)rs1 << 32)\n+ : ((uint64_t)rs1 << shamt);\n+ uint32_t res = unsigned_saturate_w(shifted, &sat);\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return res;\n+ }\n+}\n+\n+/**\n+ * SHL - 64-bit scalar variable logical shift\n+ */\n+uint64_t HELPER(shl)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ int8_t shamt = (int8_t)(rs2 & 0xFF);\n+\n+ if (shamt < 0) {\n+ int right = -shamt;\n+ return (right >= 64) ? 0 : (rs1 >> right);\n+ } else {\n+ return (shamt >= 64) ? 0 : (rs1 << shamt);\n+ }\n+}\n+\n+/**\n+ * SHLR - 64-bit scalar variable logical shift with rounding\n+ */\n+uint64_t HELPER(shlr)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ int8_t shamt = (int8_t)(rs2 & 0xFF);\n+\n+ if (shamt < 0) {\n+ int right = -shamt;\n+ if (right > 64) {\n+ return 0;\n+ } else {\n+ uint64_t rounded = (rs1 >> (right - 1)) + 1;\n+ return rounded >> 1;\n+ }\n+ } else {\n+ return (shamt >= 64) ? 0 : (rs1 << shamt);\n+ }\n+}\n+\n /* Exchange operations (AS/SA/AS/SA with X suffix) */\n \n /**\n@@ -3573,6 +3809,140 @@ target_ulong HELPER(merge)(CPURISCVState *env, target_ulong rs1,\n return (~rd & rs1) | (rd & rs2);\n }\n \n+/**\n+ * PNCLIPP.B - Pack narrow clip signed halfwords to bytes (RV64 only)\n+ */\n+uint64_t HELPER(pnclipp_b)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ int sat = 0;\n+\n+ for (int i = 0; i < 4; i++) {\n+ int16_t lo = (int16_t)EXTRACT16(rs1, i);\n+ int16_t hi = (int16_t)EXTRACT16(rs2, i);\n+ int8_t res_lo = signed_saturate_b(lo, &sat);\n+ int8_t res_hi = signed_saturate_b(hi, &sat);\n+\n+ rd = (uint64_t)INSERT8(rd, res_lo, i);\n+ rd = (uint64_t)INSERT8(rd, res_hi, i + 4);\n+ }\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PNCLIPUP.B - Pack narrow clip unsigned halfwords to bytes (RV64 only)\n+ */\n+uint64_t HELPER(pnclipup_b)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ int sat = 0;\n+\n+ for (int i = 0; i < 4; i++) {\n+ uint16_t lo = (uint16_t)EXTRACT16(rs1, i);\n+ uint16_t hi = (uint16_t)EXTRACT16(rs2, i);\n+ uint8_t res_lo = unsigned_saturate_b(lo, &sat);\n+ uint8_t res_hi = unsigned_saturate_b(hi, &sat);\n+\n+ rd = (uint64_t)INSERT8(rd, res_lo, i);\n+ rd = (uint64_t)INSERT8(rd, res_hi, i + 4);\n+ }\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PNCLIPP.H - Pack narrow clip signed words to halfwords (RV64 only)\n+ */\n+uint64_t HELPER(pnclipp_h)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ int sat = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ int32_t lo = (int32_t)EXTRACT32(rs1, i);\n+ int32_t hi = (int32_t)EXTRACT32(rs2, i);\n+ int16_t res_lo = signed_saturate_h(lo, &sat);\n+ int16_t res_hi = signed_saturate_h(hi, &sat);\n+\n+ rd = (uint64_t)INSERT16(rd, res_lo, i);\n+ rd = (uint64_t)INSERT16(rd, res_hi, i + 2);\n+ }\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PNCLIPUP.H - Pack narrow clip unsigned words to halfwords (RV64 only)\n+ */\n+uint64_t HELPER(pnclipup_h)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ int sat = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ uint32_t lo = (uint32_t)EXTRACT32(rs1, i);\n+ uint32_t hi = (uint32_t)EXTRACT32(rs2, i);\n+ uint16_t res_lo = unsigned_saturate_h(lo, &sat);\n+ uint16_t res_hi = unsigned_saturate_h(hi, &sat);\n+\n+ rd = (uint64_t)INSERT16(rd, res_lo, i);\n+ rd = (uint64_t)INSERT16(rd, res_hi, i + 2);\n+ }\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PNCLIPP.W - Pack narrow clip signed doublewords to words (RV64 only)\n+ */\n+uint64_t HELPER(pnclipp_w)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ int sat = 0;\n+ int32_t res_lo = signed_saturate_w((int64_t)rs1, &sat);\n+ int32_t res_hi = signed_saturate_w((int64_t)rs2, &sat);\n+\n+ rd = (uint64_t)(uint32_t)res_lo;\n+ rd |= (uint64_t)(uint32_t)res_hi << 32;\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PNCLIPUP.W - Pack narrow clip unsigned doublewords to words (RV64 only)\n+ */\n+uint64_t HELPER(pnclipup_w)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ int sat = 0;\n+ uint32_t res_lo = unsigned_saturate_w(rs1, &sat);\n+ uint32_t res_hi = unsigned_saturate_w(rs2, &sat);\n+\n+ rd = (uint64_t)res_lo;\n+ rd |= (uint64_t)res_hi << 32;\n+\n+ if (sat) {\n+ env->vxsat = 1;\n+ }\n+ return rd;\n+}\n+\n /* Count leading operations */\n \n /**\n", "prefixes": [ "14/14" ] }