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GET /api/1.2/patches/2224367/?format=api
{ "id": 2224367, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2224367/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417104652.17857-10-xiaoou@iscas.ac.cn/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260417104652.17857-10-xiaoou@iscas.ac.cn>", "list_archive_url": null, "date": "2026-04-17T10:46:46", "name": "[09/14] target/riscv: rvp: add multiply-accumulate operations", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "0cea65800e7fc13193f54cd5aac4a0e2fb6cc068", "submitter": { "id": 89843, "url": "http://patchwork.ozlabs.org/api/1.2/people/89843/?format=api", "name": "Molly Chen", "email": "xiaoou@iscas.ac.cn" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417104652.17857-10-xiaoou@iscas.ac.cn/mbox/", "series": [ { "id": 500307, "url": "http://patchwork.ozlabs.org/api/1.2/series/500307/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500307", "date": "2026-04-17T10:46:37", "name": "target/riscv: add support for RISC-V P extension (v0.20 draft)", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500307/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224367/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224367/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxs7s4gX4z1yCv\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 17 Apr 2026 20:49:13 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wDgjU-0001EB-Vr; Fri, 17 Apr 2026 06:47:33 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <xiaoou@iscas.ac.cn>)\n id 1wDgjP-00017F-38; Fri, 17 Apr 2026 06:47:27 -0400", "from smtp21.cstnet.cn ([159.226.251.21] helo=cstnet.cn)\n by eggs.gnu.org with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256)\n (Exim 4.90_1) (envelope-from <xiaoou@iscas.ac.cn>)\n id 1wDgjK-0007zf-9k; Fri, 17 Apr 2026 06:47:26 -0400", "from Huawei.localdomain (unknown [36.110.52.2])\n by APP-01 (Coremail) with SMTP id qwCowAB3H2ulD+JpLDmSDQ--.804S11;\n Fri, 17 Apr 2026 18:47:17 +0800 (CST)" ], "From": "Molly Chen <xiaoou@iscas.ac.cn>", "To": "palmer@dabbelt.com, alistair.francis@wdc.com, liwei1518@gmail.com,\n daniel.barboza@oss.qualcomm.com, zhiwei_liu@linux.alibaba.com,\n chao.liu.zevorn@gmail.com", "Cc": "xiaoou@iscas.ac.cn,\n\tqemu-riscv@nongnu.org,\n\tqemu-devel@nongnu.org", "Subject": "[PATCH 09/14] target/riscv: rvp: add multiply-accumulate operations", "Date": "Fri, 17 Apr 2026 18:46:46 +0800", "Message-Id": "<20260417104652.17857-10-xiaoou@iscas.ac.cn>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260417104652.17857-1-xiaoou@iscas.ac.cn>", "References": "<20260417104652.17857-1-xiaoou@iscas.ac.cn>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-CM-TRANSID": "qwCowAB3H2ulD+JpLDmSDQ--.804S11", "X-Coremail-Antispam": "1UD129KBjvAXoWfAw1fXr1xZF4xtF4DGr47CFg_yoWrJrWxto\n W3Gw1Yy395ur4xu3yF9w4UXr1jqrWIvw1DJw4Fvr43Xas7Gr9rKr15J34kAa4xCrWayrWr\n WrZayFyrtFy3C3sxn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3\n AaLaJ3UjIYCTnIWjp_UUUOj7AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva\n j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r126s0DM28Irc\n Ia0xkI8VCY1x0267AKxVW5JVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l\n 84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4UJV\n WxJr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE\n 3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2I\n x0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8\n JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc7CjxVAaw2AFwI0_Jw\n 0_GFyl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AK\n xVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrx\n kI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Gr0_Xr1lIxAIcVC0I7IYx2IY6xkF7I0E14v2\n 6F4j6r4UJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Gr0_Cr\n 1lIxAIcVC2z280aVCY1x0267AKxVW8Jr0_Cr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUqLvNU\n UUUU=", "X-Originating-IP": "[36.110.52.2]", "X-CM-SenderInfo": "50ld003x6l2u1dvotugofq/", "Received-SPF": "pass client-ip=159.226.251.21; envelope-from=xiaoou@iscas.ac.cn;\n helo=cstnet.cn", "X-Spam_score_int": "-21", "X-Spam_score": "-2.2", "X-Spam_bar": "--", "X-Spam_report": "(-2.2 / 5.0 requ) BAYES_00=-1.9, HK_RANDOM_ENVFROM=0.998,\n HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Signed-off-by: Molly Chen <xiaoou@iscas.ac.cn>\n---\n target/riscv/helper.h | 56 ++\n target/riscv/insn32.decode | 92 +++\n target/riscv/insn_trans/trans_rvp.c.inc | 56 ++\n target/riscv/psimd_helper.c | 946 ++++++++++++++++++++++++\n 4 files changed, 1150 insertions(+)", "diff": "diff --git a/target/riscv/helper.h b/target/riscv/helper.h\nindex 4b3f01f8d0..54f8591672 100644\n--- a/target/riscv/helper.h\n+++ b/target/riscv/helper.h\n@@ -1605,3 +1605,59 @@ DEF_HELPER_3(mulsu_w11, i64, env, i64, i64)\n DEF_HELPER_3(mulu_w00, i64, env, i64, i64)\n DEF_HELPER_3(mulu_w01, i64, env, i64, i64)\n DEF_HELPER_3(mulu_w11, i64, env, i64, i64)\n+\n+/* Packed SIMD - Multiply-Accumulate Operations */\n+DEF_HELPER_4(pmhacc_h, tl, env, tl, tl, tl)\n+DEF_HELPER_4(pmhaccsu_h, tl, env, tl, tl, tl)\n+DEF_HELPER_4(pmhaccu_h, tl, env, tl, tl, tl)\n+DEF_HELPER_4(pmhracc_h, tl, env, tl, tl, tl)\n+DEF_HELPER_4(pmhraccsu_h, tl, env, tl, tl, tl)\n+DEF_HELPER_4(pmhraccu_h, tl, env, tl, tl, tl)\n+DEF_HELPER_4(pmhacc_w, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmhracc_w, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmhaccsu_w, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmhraccsu_w, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmhaccu_w, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmhraccu_w, i64, env, i64, i64, i64)\n+DEF_HELPER_4(mhacc, i32, env, i32, i32, i32)\n+DEF_HELPER_4(mhracc, i32, env, i32, i32, i32)\n+DEF_HELPER_4(mhaccsu, i32, env, i32, i32, i32)\n+DEF_HELPER_4(mhraccsu, i32, env, i32, i32, i32)\n+DEF_HELPER_4(mhaccu, i32, env, i32, i32, i32)\n+DEF_HELPER_4(mhraccu, i32, env, i32, i32, i32)\n+DEF_HELPER_4(pmhacc_h_b0, tl, env, tl, tl, tl)\n+DEF_HELPER_4(pmhacc_h_b1, tl, env, tl, tl, tl)\n+DEF_HELPER_4(pmhaccsu_h_b0, tl, env, tl, tl, tl)\n+DEF_HELPER_4(pmhaccsu_h_b1, tl, env, tl, tl, tl)\n+DEF_HELPER_4(mhacc_h0, i32, env, i32, i32, i32)\n+DEF_HELPER_4(mhacc_h1, i32, env, i32, i32, i32)\n+DEF_HELPER_4(mhaccsu_h0, i32, env, i32, i32, i32)\n+DEF_HELPER_4(mhaccsu_h1, i32, env, i32, i32, i32)\n+DEF_HELPER_4(pmhacc_w_h0, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmhacc_w_h1, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmhaccsu_w_h0, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmhaccsu_w_h1, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmacc_w_h00, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmacc_w_h01, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmacc_w_h11, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmaccsu_w_h00, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmaccsu_w_h11, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmaccu_w_h00, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmaccu_w_h01, i64, env, i64, i64, i64)\n+DEF_HELPER_4(pmaccu_w_h11, i64, env, i64, i64, i64)\n+DEF_HELPER_4(macc_h00, i32, env, i32, i32, i32)\n+DEF_HELPER_4(macc_h01, i32, env, i32, i32, i32)\n+DEF_HELPER_4(macc_h11, i32, env, i32, i32, i32)\n+DEF_HELPER_4(maccsu_h00, i32, env, i32, i32, i32)\n+DEF_HELPER_4(maccsu_h11, i32, env, i32, i32, i32)\n+DEF_HELPER_4(maccu_h00, i32, env, i32, i32, i32)\n+DEF_HELPER_4(maccu_h01, i32, env, i32, i32, i32)\n+DEF_HELPER_4(maccu_h11, i32, env, i32, i32, i32)\n+DEF_HELPER_4(macc_w00, i64, env, i64, i64, i64)\n+DEF_HELPER_4(macc_w01, i64, env, i64, i64, i64)\n+DEF_HELPER_4(macc_w11, i64, env, i64, i64, i64)\n+DEF_HELPER_4(maccsu_w00, i64, env, i64, i64, i64)\n+DEF_HELPER_4(maccsu_w11, i64, env, i64, i64, i64)\n+DEF_HELPER_4(maccu_w00, i64, env, i64, i64, i64)\n+DEF_HELPER_4(maccu_w01, i64, env, i64, i64, i64)\n+DEF_HELPER_4(maccu_w11, i64, env, i64, i64, i64)\ndiff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode\nindex bd3b14af5b..9944d0b52c 100644\n--- a/target/riscv/insn32.decode\n+++ b/target/riscv/insn32.decode\n@@ -1413,3 +1413,95 @@ mulsu_w11 11110 11 ..... ..... 011 ..... 0111011 @r\n mulu_w00 10100 11 ..... ..... 011 ..... 0111011 @r\n mulu_w01 10110 11 ..... ..... 001 ..... 0111011 @r\n mulu_w11 10110 11 ..... ..... 011 ..... 0111011 @r\n+\n+# Packed SIMD - Multiply-Accumulate Operations\n+pmhacc_h 10001 00 ..... ..... 111 ..... 0111011 @r\n+pmhaccsu_h 11001 00 ..... ..... 111 ..... 0111011 @r\n+pmhaccu_h 10011 00 ..... ..... 111 ..... 0111011 @r\n+pmhracc_h 10001 10 ..... ..... 111 ..... 0111011 @r\n+pmhraccsu_h 11001 10 ..... ..... 111 ..... 0111011 @r\n+pmhraccu_h 10011 10 ..... ..... 111 ..... 0111011 @r\n+{\n+ mhacc 10001 01 ..... ..... 111 ..... 0111011 @r\n+ pmhacc_w 10001 01 ..... ..... 111 ..... 0111011 @r\n+}\n+{\n+ mhracc 10001 11 ..... ..... 111 ..... 0111011 @r\n+ pmhracc_w 10001 11 ..... ..... 111 ..... 0111011 @r\n+}\n+{\n+ mhaccsu 11001 01 ..... ..... 111 ..... 0111011 @r\n+ pmhaccsu_w 11001 01 ..... ..... 111 ..... 0111011 @r\n+}\n+{\n+ mhraccsu 11001 11 ..... ..... 111 ..... 0111011 @r\n+ pmhraccsu_w 11001 11 ..... ..... 111 ..... 0111011 @r\n+}\n+{\n+ mhaccu 10011 01 ..... ..... 111 ..... 0111011 @r\n+ pmhaccu_w 10011 01 ..... ..... 111 ..... 0111011 @r\n+}\n+{\n+ mhraccu 10011 11 ..... ..... 111 ..... 0111011 @r\n+ pmhraccu_w 10011 11 ..... ..... 111 ..... 0111011 @r\n+}\n+pmhacc_h_b0 10101 00 ..... ..... 111 ..... 0111011 @r\n+pmhacc_h_b1 10111 00 ..... ..... 111 ..... 0111011 @r\n+pmhaccsu_h_b0 10101 10 ..... ..... 111 ..... 0111011 @r\n+pmhaccsu_h_b1 10111 10 ..... ..... 111 ..... 0111011 @r\n+{\n+ mhacc_h0 10101 01 ..... ..... 111 ..... 0111011 @r\n+ pmhacc_w_h0 10101 01 ..... ..... 111 ..... 0111011 @r\n+}\n+{\n+ mhacc_h1 10111 01 ..... ..... 111 ..... 0111011 @r\n+ pmhacc_w_h1 10111 01 ..... ..... 111 ..... 0111011 @r\n+}\n+{\n+ mhaccsu_h0 10101 11 ..... ..... 111 ..... 0111011 @r\n+ pmhaccsu_w_h0 10101 11 ..... ..... 111 ..... 0111011 @r\n+}\n+{\n+ mhaccsu_h1 10111 11 ..... ..... 111 ..... 0111011 @r\n+ pmhaccsu_w_h1 10111 11 ..... ..... 111 ..... 0111011 @r\n+}\n+{\n+ macc_h00 10001 01 ..... ..... 011 ..... 0111011 @r\n+ pmacc_w_h00 10001 01 ..... ..... 011 ..... 0111011 @r\n+}\n+{\n+ macc_h01 10011 01 ..... ..... 001 ..... 0111011 @r\n+ pmacc_w_h01 10011 01 ..... ..... 001 ..... 0111011 @r\n+}\n+{\n+ macc_h11 10011 01 ..... ..... 011 ..... 0111011 @r\n+ pmacc_w_h11 10011 01 ..... ..... 011 ..... 0111011 @r\n+}\n+{\n+ maccsu_h00 11101 01 ..... ..... 011 ..... 0111011 @r\n+ pmaccsu_w_h00 11101 01 ..... ..... 011 ..... 0111011 @r\n+}\n+{\n+ maccsu_h11 11111 01 ..... ..... 011 ..... 0111011 @r\n+ pmaccsu_w_h11 11111 01 ..... ..... 011 ..... 0111011 @r\n+}\n+{\n+ maccu_h00 10101 01 ..... ..... 011 ..... 0111011 @r\n+ pmaccu_w_h00 10101 01 ..... ..... 011 ..... 0111011 @r\n+}\n+{\n+ maccu_h01 10111 01 ..... ..... 001 ..... 0111011 @r\n+ pmaccu_w_h01 10111 01 ..... ..... 001 ..... 0111011 @r\n+}\n+{\n+ maccu_h11 10111 01 ..... ..... 011 ..... 0111011 @r\n+ pmaccu_w_h11 10111 01 ..... ..... 011 ..... 0111011 @r\n+}\n+macc_w00 10001 11 ..... ..... 011 ..... 0111011 @r\n+macc_w01 10011 11 ..... ..... 001 ..... 0111011 @r\n+macc_w11 10011 11 ..... ..... 011 ..... 0111011 @r\n+maccsu_w00 11101 11 ..... ..... 011 ..... 0111011 @r\n+maccsu_w11 11111 11 ..... ..... 011 ..... 0111011 @r\n+maccu_w00 10101 11 ..... ..... 011 ..... 0111011 @r\n+maccu_w01 10111 11 ..... ..... 001 ..... 0111011 @r\n+maccu_w11 10111 11 ..... ..... 011 ..... 0111011 @r\ndiff --git a/target/riscv/insn_trans/trans_rvp.c.inc b/target/riscv/insn_trans/trans_rvp.c.inc\nindex b01656ffb0..b3476c26ad 100644\n--- a/target/riscv/insn_trans/trans_rvp.c.inc\n+++ b/target/riscv/insn_trans/trans_rvp.c.inc\n@@ -774,3 +774,59 @@ GEN_SIMD_TRANS_64(mulsu_w11)\n GEN_SIMD_TRANS_64(mulu_w00)\n GEN_SIMD_TRANS_64(mulu_w01)\n GEN_SIMD_TRANS_64(mulu_w11)\n+\n+/* Packed SIMD - Multiply-Accumulate Operations */\n+GEN_SIMD_TRANS_ACC(pmhacc_h)\n+GEN_SIMD_TRANS_ACC(pmhaccsu_h)\n+GEN_SIMD_TRANS_ACC(pmhaccu_h)\n+GEN_SIMD_TRANS_ACC(pmhracc_h)\n+GEN_SIMD_TRANS_ACC(pmhraccsu_h)\n+GEN_SIMD_TRANS_ACC(pmhraccu_h)\n+GEN_SIMD_TRANS_ACC_64(pmhacc_w)\n+GEN_SIMD_TRANS_ACC_64(pmhracc_w)\n+GEN_SIMD_TRANS_ACC_64(pmhaccsu_w)\n+GEN_SIMD_TRANS_ACC_64(pmhraccsu_w)\n+GEN_SIMD_TRANS_ACC_64(pmhaccu_w)\n+GEN_SIMD_TRANS_ACC_64(pmhraccu_w)\n+GEN_SIMD_TRANS_ACC_32(mhacc)\n+GEN_SIMD_TRANS_ACC_32(mhracc)\n+GEN_SIMD_TRANS_ACC_32(mhaccsu)\n+GEN_SIMD_TRANS_ACC_32(mhraccsu)\n+GEN_SIMD_TRANS_ACC_32(mhaccu)\n+GEN_SIMD_TRANS_ACC_32(mhraccu)\n+GEN_SIMD_TRANS_ACC(pmhacc_h_b0)\n+GEN_SIMD_TRANS_ACC(pmhacc_h_b1)\n+GEN_SIMD_TRANS_ACC(pmhaccsu_h_b0)\n+GEN_SIMD_TRANS_ACC(pmhaccsu_h_b1)\n+GEN_SIMD_TRANS_ACC_32(mhacc_h0)\n+GEN_SIMD_TRANS_ACC_32(mhacc_h1)\n+GEN_SIMD_TRANS_ACC_32(mhaccsu_h0)\n+GEN_SIMD_TRANS_ACC_32(mhaccsu_h1)\n+GEN_SIMD_TRANS_ACC_64(pmhacc_w_h0)\n+GEN_SIMD_TRANS_ACC_64(pmhacc_w_h1)\n+GEN_SIMD_TRANS_ACC_64(pmhaccsu_w_h0)\n+GEN_SIMD_TRANS_ACC_64(pmhaccsu_w_h1)\n+GEN_SIMD_TRANS_ACC_64(pmacc_w_h00)\n+GEN_SIMD_TRANS_ACC_64(pmacc_w_h01)\n+GEN_SIMD_TRANS_ACC_64(pmacc_w_h11)\n+GEN_SIMD_TRANS_ACC_64(pmaccsu_w_h00)\n+GEN_SIMD_TRANS_ACC_64(pmaccsu_w_h11)\n+GEN_SIMD_TRANS_ACC_64(pmaccu_w_h00)\n+GEN_SIMD_TRANS_ACC_64(pmaccu_w_h01)\n+GEN_SIMD_TRANS_ACC_64(pmaccu_w_h11)\n+GEN_SIMD_TRANS_ACC_32(macc_h00)\n+GEN_SIMD_TRANS_ACC_32(macc_h01)\n+GEN_SIMD_TRANS_ACC_32(macc_h11)\n+GEN_SIMD_TRANS_ACC_32(maccsu_h00)\n+GEN_SIMD_TRANS_ACC_32(maccsu_h11)\n+GEN_SIMD_TRANS_ACC_32(maccu_h00)\n+GEN_SIMD_TRANS_ACC_32(maccu_h01)\n+GEN_SIMD_TRANS_ACC_32(maccu_h11)\n+GEN_SIMD_TRANS_ACC_64(macc_w00)\n+GEN_SIMD_TRANS_ACC_64(macc_w01)\n+GEN_SIMD_TRANS_ACC_64(macc_w11)\n+GEN_SIMD_TRANS_ACC_64(maccsu_w00)\n+GEN_SIMD_TRANS_ACC_64(maccsu_w11)\n+GEN_SIMD_TRANS_ACC_64(maccu_w00)\n+GEN_SIMD_TRANS_ACC_64(maccu_w01)\n+GEN_SIMD_TRANS_ACC_64(maccu_w11)\ndiff --git a/target/riscv/psimd_helper.c b/target/riscv/psimd_helper.c\nindex b60fd3094c..7f32a13ba0 100644\n--- a/target/riscv/psimd_helper.c\n+++ b/target/riscv/psimd_helper.c\n@@ -4682,3 +4682,949 @@ uint64_t HELPER(mulu_w11)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n uint64_t mul = (uint64_t)s1_w1 * (uint64_t)s2_w1;\n return mul;\n }\n+\n+/* Multiply-Accumulate Operations */\n+\n+/**\n+ * PMHACC.H - Packed signed 16-bit multiply high with accumulate\n+ */\n+target_ulong HELPER(pmhacc_h)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t e1 = (int16_t)EXTRACT16(rs1, i);\n+ int16_t e2 = (int16_t)EXTRACT16(rs2, i);\n+ int16_t d = (int16_t)EXTRACT16(dest, i);\n+ int32_t prod = (int32_t)e1 * (int32_t)e2;\n+ int16_t high = (int16_t)(prod >> 16);\n+ uint16_t res = (uint16_t)(high + d);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACCSU.H - Packed signed x unsigned 16-bit multiply high with accumulate\n+ */\n+target_ulong HELPER(pmhaccsu_h)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t e1 = (int16_t)EXTRACT16(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i);\n+ int16_t d = (int16_t)EXTRACT16(dest, i);\n+ int32_t prod = (int32_t)e1 * (uint32_t)e2;\n+ int16_t high = (int16_t)(prod >> 16);\n+ uint16_t res = (uint16_t)(high + d);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACCU.H - Packed unsigned 16-bit multiply high with accumulate\n+ */\n+target_ulong HELPER(pmhaccu_h)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = EXTRACT16(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i);\n+ uint16_t d = (uint16_t)EXTRACT16(dest, i);\n+ uint32_t prod = (uint32_t)e1 * (uint32_t)e2;\n+ uint16_t high = (uint16_t)(prod >> 16);\n+ uint16_t res = high + d;\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHRACC.H - Packed signed 16-bit multiply high with rounding and accumulate\n+ */\n+target_ulong HELPER(pmhracc_h)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t e1 = (int16_t)EXTRACT16(rs1, i);\n+ int16_t e2 = (int16_t)EXTRACT16(rs2, i);\n+ int16_t d = (int16_t)EXTRACT16(dest, i);\n+ int32_t prod = (int32_t)e1 * (int32_t)e2 + (1 << 15);\n+ int16_t high = (int16_t)(prod >> 16);\n+ uint16_t res = (uint16_t)(high + d);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHRACCSU.H - Packed signed x unsigned 16-bit\n+ * multiply high with rounding and accumulate\n+ */\n+target_ulong HELPER(pmhraccsu_h)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t e1 = (int16_t)EXTRACT16(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i);\n+ int16_t d = (int16_t)EXTRACT16(dest, i);\n+ int32_t prod = (int32_t)e1 * (uint32_t)e2 + (1 << 15);\n+ int16_t high = (int16_t)(prod >> 16);\n+ uint16_t res = (uint16_t)(high + d);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHRACCU.H - Packed unsigned 16-bit multiply\n+ * high with rounding and accumulate\n+ */\n+target_ulong HELPER(pmhraccu_h)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = EXTRACT16(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i);\n+ uint16_t d = (uint16_t)EXTRACT16(dest, i);\n+ uint32_t prod = (uint32_t)e1 * (uint32_t)e2 + (1 << 15);\n+ uint16_t high = (uint16_t)(prod >> 16);\n+ uint16_t res = high + d;\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACC.W - Packed signed 32-bit multiply high with accumulate (RV64 only)\n+ */\n+uint64_t HELPER(pmhacc_w)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int32_t e1 = (int32_t)EXTRACT32(rs1, i);\n+ int32_t e2 = (int32_t)EXTRACT32(rs2, i);\n+ int32_t d = (int32_t)EXTRACT32(dest, i);\n+ int64_t prod = (int64_t)e1 * (int64_t)e2;\n+ int32_t high = (int32_t)(prod >> 32);\n+ uint32_t res = (uint32_t)(high + d);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHRACC.W - Packed signed 32-bit multiply high\n+ * with rounding and accumulate (RV64 only)\n+ */\n+uint64_t HELPER(pmhracc_w)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int32_t e1 = (int32_t)EXTRACT32(rs1, i);\n+ int32_t e2 = (int32_t)EXTRACT32(rs2, i);\n+ int32_t d = (int32_t)EXTRACT32(dest, i);\n+ int64_t prod = (int64_t)e1 * (int64_t)e2 + (1LL << 31);\n+ int32_t high = (int32_t)(prod >> 32);\n+ uint32_t res = (uint32_t)(high + d);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACCSU.W - Packed signed x unsigned 32-bit\n+ * multiply high with accumulate (RV64 only)\n+ */\n+uint64_t HELPER(pmhaccsu_w)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int32_t e1 = (int32_t)EXTRACT32(rs1, i);\n+ uint32_t e2 = EXTRACT32(rs2, i);\n+ int32_t d = (int32_t)EXTRACT32(dest, i);\n+ int64_t prod = (int64_t)e1 * (uint64_t)e2;\n+ int32_t high = (int32_t)(prod >> 32);\n+ uint32_t res = (uint32_t)(high + d);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHRACCSU.W - Packed signed x unsigned 32-bit\n+ * multiply high with rounding and accumulate\n+ * (RV64 only)\n+ */\n+uint64_t HELPER(pmhraccsu_w)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int32_t e1 = (int32_t)EXTRACT32(rs1, i);\n+ uint32_t e2 = EXTRACT32(rs2, i);\n+ int32_t d = (int32_t)EXTRACT32(dest, i);\n+ int64_t prod = (int64_t)e1 * (uint64_t)e2 + (1LL << 31);\n+ int32_t high = (int32_t)(prod >> 32);\n+ uint32_t res = (uint32_t)(high + d);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACCU.W - Packed unsigned 32-bit multiply high with accumulate (RV64 only)\n+ */\n+uint64_t HELPER(pmhaccu_w)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint32_t e1 = EXTRACT32(rs1, i);\n+ uint32_t e2 = EXTRACT32(rs2, i);\n+ uint32_t d = EXTRACT32(dest, i);\n+ uint64_t prod = (uint64_t)e1 * (uint64_t)e2;\n+ uint32_t high = (uint32_t)(prod >> 32);\n+ uint32_t res = high + d;\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHRACCU.W - Packed unsigned 32-bit multiply\n+ * high with rounding and accumulate (RV64 only)\n+ */\n+uint64_t HELPER(pmhraccu_w)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint32_t e1 = EXTRACT32(rs1, i);\n+ uint32_t e2 = EXTRACT32(rs2, i);\n+ uint32_t d = EXTRACT32(dest, i);\n+ uint64_t prod = (uint64_t)e1 * (uint64_t)e2 + (1LL << 31);\n+ uint32_t high = (uint32_t)(prod >> 32);\n+ uint32_t res = high + d;\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * MHACC - 32-bit signed multiply high with accumulate\n+ */\n+uint32_t HELPER(mhacc)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int32_t a = (int32_t)rs1;\n+ int32_t b = (int32_t)rs2;\n+ int32_t d = (int32_t)dest;\n+ int64_t prod = (int64_t)a * (int64_t)b;\n+ return (uint32_t)(d + (prod >> 32));\n+}\n+\n+/**\n+ * MHRACC - 32-bit signed multiply high with rounding and accumulate\n+ */\n+uint32_t HELPER(mhracc)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int32_t a = (int32_t)rs1;\n+ int32_t b = (int32_t)rs2;\n+ int32_t d = (int32_t)dest;\n+ int64_t prod = (int64_t)a * (int64_t)b + (1LL << 31);\n+ return (uint32_t)(d + (prod >> 32));\n+}\n+\n+/**\n+ * MHACCSU - 32-bit signed x unsigned multiply high with accumulate\n+ */\n+uint32_t HELPER(mhaccsu)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int32_t a = (int32_t)rs1;\n+ uint32_t b = rs2;\n+ int32_t d = (int32_t)dest;\n+ int64_t prod = (int64_t)a * (uint64_t)b;\n+ return (uint32_t)(d + (prod >> 32));\n+}\n+\n+/**\n+ * MHRACCSU - 32-bit signed x unsigned multiply high\n+ * with rounding and accumulate\n+ */\n+uint32_t HELPER(mhraccsu)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int32_t a = (int32_t)rs1;\n+ uint32_t b = rs2;\n+ int32_t d = (int32_t)dest;\n+ int64_t prod = (int64_t)a * (uint64_t)b + (1LL << 31);\n+ return (uint32_t)(d + (prod >> 32));\n+}\n+\n+/**\n+ * MHACCU - 32-bit unsigned multiply high with accumulate\n+ */\n+uint32_t HELPER(mhaccu)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ uint32_t a = rs1;\n+ uint32_t b = rs2;\n+ uint32_t d = dest;\n+ uint64_t prod = (uint64_t)a * (uint64_t)b;\n+ return (uint32_t)(d + (prod >> 32));\n+}\n+\n+/**\n+ * MHRACCU - 32-bit unsigned multiply high with rounding and accumulate\n+ */\n+uint32_t HELPER(mhraccu)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ uint32_t a = rs1;\n+ uint32_t b = rs2;\n+ uint32_t d = dest;\n+ uint64_t prod = (uint64_t)a * (uint64_t)b + (1LL << 31);\n+ return (uint32_t)(d + (prod >> 32));\n+}\n+\n+/**\n+ * PMHACC.H.B0 - Multiply halfword by low byte and accumulate (high halfword)\n+ */\n+target_ulong HELPER(pmhacc_h_b0)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t e1 = (int16_t)EXTRACT16(rs1, i);\n+ int8_t e2 = (int8_t)EXTRACT8(rs2, i * 2);\n+ int16_t d = (int16_t)EXTRACT16(dest, i);\n+ int32_t prod = (int32_t)e1 * (int32_t)e2;\n+ int16_t high = (int16_t)(prod >> 8);\n+ uint16_t res = (uint16_t)(high + d);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACC.H.B1 - Multiply halfword by high byte and accumulate (high halfword)\n+ */\n+target_ulong HELPER(pmhacc_h_b1)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t e1 = (int16_t)EXTRACT16(rs1, i);\n+ int8_t e2 = (int8_t)EXTRACT8(rs2, i * 2 + 1);\n+ int16_t d = (int16_t)EXTRACT16(dest, i);\n+ int32_t prod = (int32_t)e1 * (int32_t)e2;\n+ int16_t high = (int16_t)(prod >> 8);\n+ uint16_t res = (uint16_t)(high + d);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACCSU.H.B0 - Multiply signed halfword by unsigned low byte and accumulate\n+ */\n+target_ulong HELPER(pmhaccsu_h_b0)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t e1 = (int16_t)EXTRACT16(rs1, i);\n+ uint8_t e2 = EXTRACT8(rs2, i * 2);\n+ int16_t d = (int16_t)EXTRACT16(dest, i);\n+ int32_t prod = (int32_t)e1 * (uint32_t)e2;\n+ int16_t high = (int16_t)(prod >> 8);\n+ uint16_t res = (uint16_t)(high + d);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACCSU.H.B1 - Multiply signed halfword by unsigned high byte and accumulate\n+ */\n+target_ulong HELPER(pmhaccsu_h_b1)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong dest)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t e1 = (int16_t)EXTRACT16(rs1, i);\n+ uint8_t e2 = EXTRACT8(rs2, i * 2 + 1);\n+ int16_t d = (int16_t)EXTRACT16(dest, i);\n+ int32_t prod = (int32_t)e1 * (uint32_t)e2;\n+ int16_t high = (int16_t)(prod >> 8);\n+ uint16_t res = (uint16_t)(high + d);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * MHACC.H0 - 32-bit multiply by low halfword high accumulate\n+ */\n+uint32_t HELPER(mhacc_h0)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int32_t a = (int32_t)rs1;\n+ int16_t b = (int16_t)(rs2 & 0xFFFF);\n+ int32_t d = (int32_t)dest;\n+ int64_t prod = (int64_t)a * (int64_t)b;\n+ return (uint32_t)(d + (prod >> 16));\n+}\n+\n+/**\n+ * MHACC.H1 - 32-bit multiply by high halfword high accumulate\n+ */\n+uint32_t HELPER(mhacc_h1)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int32_t a = (int32_t)rs1;\n+ int16_t b = (int16_t)((rs2 >> 16) & 0xFFFF);\n+ int32_t d = (int32_t)dest;\n+ int64_t prod = (int64_t)a * (int64_t)b;\n+ return (uint32_t)(d + (prod >> 16));\n+}\n+\n+/**\n+ * MHACCSU.H0 - 32-bit signed multiply by unsigned low halfword high accumulate\n+ */\n+uint32_t HELPER(mhaccsu_h0)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int32_t a = (int32_t)rs1;\n+ uint16_t b = (uint16_t)(rs2 & 0xFFFF);\n+ int32_t d = (int32_t)dest;\n+ int64_t prod = (int64_t)a * (uint64_t)b;\n+ return (uint32_t)(d + (prod >> 16));\n+}\n+\n+/**\n+ * MHACCSU.H1 - 32-bit signed multiply by unsigned high halfword high accumulate\n+ */\n+uint32_t HELPER(mhaccsu_h1)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int32_t a = (int32_t)rs1;\n+ uint16_t b = (uint16_t)((rs2 >> 16) & 0xFFFF);\n+ int32_t d = (int32_t)dest;\n+ int64_t prod = (int64_t)a * (uint64_t)b;\n+ return (uint32_t)(d + (prod >> 16));\n+}\n+\n+/**\n+ * PMHACC.W.H0 - Multiply word by low halfword high accumulate (RV64 only)\n+ */\n+uint64_t HELPER(pmhacc_w_h0)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ int32_t e1 = (int32_t)EXTRACT32(rs1, i);\n+ int16_t e2 = (int16_t)EXTRACT16(rs2, i * 2);\n+ int32_t d = (int32_t)EXTRACT32(dest, i);\n+ int64_t prod = (int64_t)e1 * (int64_t)e2;\n+ int32_t high = (int32_t)(prod >> 16);\n+ uint32_t res = (uint32_t)(high + d);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACC.W.H1 - Multiply word by high halfword high accumulate (RV64 only)\n+ */\n+uint64_t HELPER(pmhacc_w_h1)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ int32_t e1 = (int32_t)EXTRACT32(rs1, i);\n+ int16_t e2 = (int16_t)EXTRACT16(rs2, i * 2 + 1);\n+ int32_t d = (int32_t)EXTRACT32(dest, i);\n+ int64_t prod = (int64_t)e1 * (int64_t)e2;\n+ int32_t high = (int32_t)(prod >> 16);\n+ uint32_t res = (uint32_t)(high + d);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACCSU.W.H0 - Multiply signed word by unsigned low halfword\n+ * high accumulate (RV64 only)\n+ */\n+uint64_t HELPER(pmhaccsu_w_h0)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ int32_t e1 = (int32_t)EXTRACT32(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i * 2);\n+ int32_t d = (int32_t)EXTRACT32(dest, i);\n+ int64_t prod = (int64_t)e1 * (uint64_t)e2;\n+ int32_t high = (int32_t)(prod >> 16);\n+ uint32_t res = (uint32_t)(high + d);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMHACCSU.W.H1 - Multiply signed word by unsigned high halfword\n+ * high accumulate (RV64 only)\n+ */\n+uint64_t HELPER(pmhaccsu_w_h1)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ int32_t e1 = (int32_t)EXTRACT32(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i * 2 + 1);\n+ int32_t d = (int32_t)EXTRACT32(dest, i);\n+ int64_t prod = (int64_t)e1 * (uint64_t)e2;\n+ int32_t high = (int32_t)(prod >> 16);\n+ uint32_t res = (uint32_t)(high + d);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMACC.W.H00 - Packed multiply-accumulate, low halfwords\n+ * For each word: rd[i] = dest[i] + (rs1[i][15:0] * rs2[i][15:0])\n+ */\n+uint64_t HELPER(pmacc_w_h00)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t s1_h0 = (int16_t)EXTRACT16(rs1, i * 2);\n+ int16_t s2_h0 = (int16_t)EXTRACT16(rs2, i * 2);\n+ int32_t d_h = (int32_t)EXTRACT32(dest, i);\n+ int32_t mul = (int32_t)s1_h0 * (int32_t)s2_h0;\n+ rd = INSERT32(rd, (uint32_t)(d_h + mul), i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMACC.W.H01 - Packed multiply-accumulate, rs1 low x rs2 high\n+ * For each word: rd[i] = dest[i] + (rs1[i][15:0] * rs2[i][31:16])\n+ */\n+uint64_t HELPER(pmacc_w_h01)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t s1_h0 = (int16_t)EXTRACT16(rs1, i * 2);\n+ int16_t s2_h1 = (int16_t)EXTRACT16(rs2, i * 2 + 1);\n+ int32_t d_h = (int32_t)EXTRACT32(dest, i);\n+ int32_t mul = (int32_t)s1_h0 * (int32_t)s2_h1;\n+ rd = INSERT32(rd, (uint32_t)(d_h + mul), i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMACC.W.H11 - Packed multiply-accumulate, high halfwords\n+ * For each word: rd[i] = dest[i] + (rs1[i][31:16] * rs2[i][31:16])\n+ */\n+uint64_t HELPER(pmacc_w_h11)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t s1_h1 = (int16_t)EXTRACT16(rs1, i * 2 + 1);\n+ int16_t s2_h1 = (int16_t)EXTRACT16(rs2, i * 2 + 1);\n+ int32_t d_h = (int32_t)EXTRACT32(dest, i);\n+ int32_t mul = (int32_t)s1_h1 * (int32_t)s2_h1;\n+ rd = INSERT32(rd, (uint32_t)(d_h + mul), i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMACCSU.W.H00 - Packed signed x unsigned multiply-accumulate, low halfwords\n+ * For each word: rd[i] = dest[i] +\n+ * (signed)rs1[i][15:0] * (unsigned)rs2[i][15:0]\n+ */\n+uint64_t HELPER(pmaccsu_w_h00)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t s1_h0 = (int16_t)EXTRACT16(rs1, i * 2);\n+ uint16_t s2_h0 = EXTRACT16(rs2, i * 2);\n+ int32_t d_h = (int32_t)EXTRACT32(dest, i);\n+ int32_t mul = (int32_t)s1_h0 * (uint32_t)s2_h0;\n+ rd = INSERT32(rd, (uint32_t)(d_h + mul), i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMACCSU.W.H11 - Packed signed x unsigned multiply-accumulate, high halfwords\n+ * For each word: rd[i] = dest[i] +\n+ * (signed)rs1[i][31:16] * (unsigned)rs2[i][31:16]\n+ */\n+uint64_t HELPER(pmaccsu_w_h11)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t s1_h1 = (int16_t)EXTRACT16(rs1, i * 2 + 1);\n+ uint16_t s2_h1 = EXTRACT16(rs2, i * 2 + 1);\n+ int32_t d_h = (int32_t)EXTRACT32(dest, i);\n+ int32_t mul = (int32_t)s1_h1 * (uint32_t)s2_h1;\n+ rd = INSERT32(rd, (uint32_t)(d_h + mul), i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMACCU.W.H00 - Packed unsigned multiply-accumulate, low halfwords\n+ * For each word: rd[i] = dest[i] + rs1[i][15:0] * rs2[i][15:0] (unsigned)\n+ */\n+uint64_t HELPER(pmaccu_w_h00)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t s1_h0 = EXTRACT16(rs1, i * 2);\n+ uint16_t s2_h0 = EXTRACT16(rs2, i * 2);\n+ uint32_t d_h = EXTRACT32(dest, i);\n+ uint32_t mul = (uint32_t)s1_h0 * (uint32_t)s2_h0;\n+ rd = INSERT32(rd, d_h + mul, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMACCU.W.H01 - Packed unsigned multiply-accumulate, rs1 low x rs2 high\n+ * For each word: rd[i] = dest[i] + rs1[i][15:0] * rs2[i][31:16] (unsigned)\n+ */\n+uint64_t HELPER(pmaccu_w_h01)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t s1_h0 = EXTRACT16(rs1, i * 2);\n+ uint16_t s2_h1 = EXTRACT16(rs2, i * 2 + 1);\n+ uint32_t d_h = EXTRACT32(dest, i);\n+ uint32_t mul = (uint32_t)s1_h0 * (uint32_t)s2_h1;\n+ rd = INSERT32(rd, d_h + mul, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PMACCU.W.H11 - Packed unsigned multiply-accumulate, high halfwords\n+ * For each word: rd[i] = dest[i] + rs1[i][31:16] * rs2[i][31:16] (unsigned)\n+ */\n+uint64_t HELPER(pmaccu_w_h11)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t s1_h1 = EXTRACT16(rs1, i * 2 + 1);\n+ uint16_t s2_h1 = EXTRACT16(rs2, i * 2 + 1);\n+ uint32_t d_h = EXTRACT32(dest, i);\n+ uint32_t mul = (uint32_t)s1_h1 * (uint32_t)s2_h1;\n+ rd = INSERT32(rd, d_h + mul, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * MACC.H00 - 32-bit signed multiply-accumulate, low halfwords\n+ * dest = dest + (rs1[15:0] * rs2[15:0])\n+ */\n+uint32_t HELPER(macc_h00)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int16_t s1_h0 = (int16_t)EXTRACT16(rs1, 0);\n+ int16_t s2_h0 = (int16_t)EXTRACT16(rs2, 0);\n+ int32_t d_h = (int32_t)dest;\n+ int32_t mul = (int32_t)s1_h0 * (int32_t)s2_h0;\n+ return (uint32_t)(d_h + mul);\n+}\n+\n+/**\n+ * MACC.H01 - 32-bit signed multiply-accumulate, rs1 low x rs2 high\n+ * dest = dest + (rs1[15:0] * rs2[31:16])\n+ */\n+uint32_t HELPER(macc_h01)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int16_t s1_h0 = (int16_t)EXTRACT16(rs1, 0);\n+ int16_t s2_h1 = (int16_t)EXTRACT16(rs2, 1);\n+ int32_t d_h = (int32_t)dest;\n+ int32_t mul = (int32_t)s1_h0 * (int32_t)s2_h1;\n+ return (uint32_t)(d_h + mul);\n+}\n+\n+/**\n+ * MACC.H11 - 32-bit signed multiply-accumulate, high halfwords\n+ * dest = dest + (rs1[31:16] * rs2[31:16])\n+ */\n+uint32_t HELPER(macc_h11)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int16_t s1_h1 = (int16_t)EXTRACT16(rs1, 1);\n+ int16_t s2_h1 = (int16_t)EXTRACT16(rs2, 1);\n+ int32_t d_h = (int32_t)dest;\n+ int32_t mul = (int32_t)s1_h1 * (int32_t)s2_h1;\n+ return (uint32_t)(d_h + mul);\n+}\n+\n+/**\n+ * MACCSU.H00 - 32-bit signed x unsigned multiply-accumulate, low halfwords\n+ * dest = dest + (rs1[15:0] * rs2[15:0]) with rs2 unsigned\n+ */\n+uint32_t HELPER(maccsu_h00)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int16_t s1_h0 = (int16_t)EXTRACT16(rs1, 0);\n+ uint16_t s2_h0 = EXTRACT16(rs2, 0);\n+ int32_t d_h = (int32_t)dest;\n+ int32_t mul = (int32_t)s1_h0 * (uint32_t)s2_h0;\n+ return (uint32_t)(d_h + mul);\n+}\n+\n+/**\n+ * MACCSU.H11 - 32-bit signed x unsigned multiply-accumulate, high halfwords\n+ * dest = dest + (rs1[31:16] * rs2[31:16]) with rs2 unsigned\n+ */\n+uint32_t HELPER(maccsu_h11)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ int16_t s1_h1 = (int16_t)EXTRACT16(rs1, 1);\n+ uint16_t s2_h1 = EXTRACT16(rs2, 1);\n+ int32_t d_h = (int32_t)dest;\n+ int32_t mul = (int32_t)s1_h1 * (uint32_t)s2_h1;\n+ return (uint32_t)(d_h + mul);\n+}\n+\n+/**\n+ * MACCU.H00 - 32-bit unsigned multiply-accumulate, low halfwords\n+ * dest = dest + (rs1[15:0] * rs2[15:0]) (unsigned)\n+ */\n+uint32_t HELPER(maccu_h00)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ uint16_t s1_h0 = EXTRACT16(rs1, 0);\n+ uint16_t s2_h0 = EXTRACT16(rs2, 0);\n+ uint32_t d_h = dest;\n+ uint32_t mul = (uint32_t)s1_h0 * (uint32_t)s2_h0;\n+ return d_h + mul;\n+}\n+\n+/**\n+ * MACCU.H01 - 32-bit unsigned multiply-accumulate, rs1 low x rs2 high\n+ * dest = dest + (rs1[15:0] * rs2[31:16]) (unsigned)\n+ */\n+uint32_t HELPER(maccu_h01)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ uint16_t s1_h0 = EXTRACT16(rs1, 0);\n+ uint16_t s2_h1 = EXTRACT16(rs2, 1);\n+ uint32_t d_h = dest;\n+ uint32_t mul = (uint32_t)s1_h0 * (uint32_t)s2_h1;\n+ return d_h + mul;\n+}\n+\n+/**\n+ * MACCU.H11 - 32-bit unsigned multiply-accumulate, high halfwords\n+ * dest = dest + (rs1[31:16] * rs2[31:16]) (unsigned)\n+ */\n+uint32_t HELPER(maccu_h11)(CPURISCVState *env, uint32_t rs1,\n+ uint32_t rs2, uint32_t dest)\n+{\n+ uint16_t s1_h1 = EXTRACT16(rs1, 1);\n+ uint16_t s2_h1 = EXTRACT16(rs2, 1);\n+ uint32_t d_h = dest;\n+ uint32_t mul = (uint32_t)s1_h1 * (uint32_t)s2_h1;\n+ return d_h + mul;\n+}\n+\n+/**\n+ * MACC.W00 - 64-bit signed multiply-accumulate, low word x low word\n+ * dest = dest + (rs1[31:0] * rs2[31:0])\n+ */\n+uint64_t HELPER(macc_w00)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ int32_t s1_w0 = (int32_t)EXTRACT32(rs1, 0);\n+ int32_t s2_w0 = (int32_t)EXTRACT32(rs2, 0);\n+ int64_t d_w = (int64_t)dest;\n+ int64_t mul = (int64_t)s1_w0 * (int64_t)s2_w0;\n+ return (uint64_t)(d_w + mul);\n+}\n+\n+/**\n+ * MACC.W01 - 64-bit signed multiply-accumulate, low word x high word\n+ * dest = dest + (rs1[31:0] * rs2[63:32])\n+ */\n+uint64_t HELPER(macc_w01)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ int32_t s1_w0 = (int32_t)EXTRACT32(rs1, 0);\n+ int32_t s2_w1 = (int32_t)EXTRACT32(rs2, 1);\n+ int64_t d_w = (int64_t)dest;\n+ int64_t mul = (int64_t)s1_w0 * (int64_t)s2_w1;\n+ return (uint64_t)(d_w + mul);\n+}\n+\n+/**\n+ * MACC.W11 - 64-bit signed multiply-accumulate, high word x high word\n+ * dest = dest + (rs1[63:32] * rs2[63:32])\n+ */\n+uint64_t HELPER(macc_w11)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ int32_t s1_w1 = (int32_t)EXTRACT32(rs1, 1);\n+ int32_t s2_w1 = (int32_t)EXTRACT32(rs2, 1);\n+ int64_t d_w = (int64_t)dest;\n+ int64_t mul = (int64_t)s1_w1 * (int64_t)s2_w1;\n+ return (uint64_t)(d_w + mul);\n+}\n+\n+/**\n+ * MACCSU.W00 - 64-bit signed x unsigned\n+ * multiply-accumulate, low word x low word\n+ * dest = dest + (rs1[31:0] * rs2[31:0]) with rs2 interpreted as unsigned\n+ */\n+uint64_t HELPER(maccsu_w00)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ int32_t s1_w0 = (int32_t)EXTRACT32(rs1, 0);\n+ uint32_t s2_w0 = EXTRACT32(rs2, 0);\n+ int64_t d_w = (int64_t)dest;\n+ int64_t mul = (int64_t)s1_w0 * (uint64_t)s2_w0;\n+ return (uint64_t)(d_w + mul);\n+}\n+\n+/**\n+ * MACCSU.W11 - 64-bit signed x unsigned\n+ * multiply-accumulate, high word x high word\n+ * dest = dest + (rs1[63:32] * rs2[63:32]) with rs2 interpreted as unsigned\n+ */\n+uint64_t HELPER(maccsu_w11)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ int32_t s1_w1 = (int32_t)EXTRACT32(rs1, 1);\n+ uint32_t s2_w1 = EXTRACT32(rs2, 1);\n+ int64_t d_w = (int64_t)dest;\n+ int64_t mul = (int64_t)s1_w1 * (uint64_t)s2_w1;\n+ return (uint64_t)(d_w + mul);\n+}\n+\n+/**\n+ * MACCU.W00 - 64-bit unsigned multiply-accumulate, low word x low word\n+ * dest = dest + (rs1[31:0] * rs2[31:0]) (unsigned)\n+ */\n+uint64_t HELPER(maccu_w00)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint32_t s1_w0 = EXTRACT32(rs1, 0);\n+ uint32_t s2_w0 = EXTRACT32(rs2, 0);\n+ uint64_t d_w = dest;\n+ uint64_t mul = (uint64_t)s1_w0 * (uint64_t)s2_w0;\n+ return d_w + mul;\n+}\n+\n+/**\n+ * MACCU.W01 - 64-bit unsigned multiply-accumulate, low word x high word\n+ * dest = dest + (rs1[31:0] * rs2[63:32]) (unsigned)\n+ */\n+uint64_t HELPER(maccu_w01)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint32_t s1_w0 = EXTRACT32(rs1, 0);\n+ uint32_t s2_w1 = EXTRACT32(rs2, 1);\n+ uint64_t d_w = dest;\n+ uint64_t mul = (uint64_t)s1_w0 * (uint64_t)s2_w1;\n+ return d_w + mul;\n+}\n+\n+/**\n+ * MACCU.W11 - 64-bit unsigned multiply-accumulate, high word x high word\n+ * dest = dest + (rs1[63:32] * rs2[63:32]) (unsigned)\n+ */\n+uint64_t HELPER(maccu_w11)(CPURISCVState *env, uint64_t rs1,\n+ uint64_t rs2, uint64_t dest)\n+{\n+ uint32_t s1_w1 = EXTRACT32(rs1, 1);\n+ uint32_t s2_w1 = EXTRACT32(rs2, 1);\n+ uint64_t d_w = dest;\n+ uint64_t mul = (uint64_t)s1_w1 * (uint64_t)s2_w1;\n+ return d_w + mul;\n+}\n", "prefixes": [ "09/14" ] }