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GET /api/1.2/patches/2224366/?format=api
{ "id": 2224366, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2224366/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417104652.17857-8-xiaoou@iscas.ac.cn/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260417104652.17857-8-xiaoou@iscas.ac.cn>", "list_archive_url": null, "date": "2026-04-17T10:46:44", "name": "[07/14] target/riscv: rvp: add horizontal reduction, pack, merge and cout leading operations", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "de6c33eaec788bea5383e99239f826689caad590", "submitter": { "id": 89843, "url": "http://patchwork.ozlabs.org/api/1.2/people/89843/?format=api", "name": "Molly Chen", "email": "xiaoou@iscas.ac.cn" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417104652.17857-8-xiaoou@iscas.ac.cn/mbox/", "series": [ { "id": 500307, "url": "http://patchwork.ozlabs.org/api/1.2/series/500307/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500307", "date": "2026-04-17T10:46:37", "name": "target/riscv: add support for RISC-V P extension (v0.20 draft)", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500307/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224366/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224366/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxs7s4kXxz1yHp\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 17 Apr 2026 20:49:13 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wDgjU-0001DX-F4; Fri, 17 Apr 2026 06:47:32 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <xiaoou@iscas.ac.cn>)\n id 1wDgjN-00015O-8P; Fri, 17 Apr 2026 06:47:27 -0400", "from smtp21.cstnet.cn ([159.226.251.21] helo=cstnet.cn)\n by eggs.gnu.org with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA1:256)\n (Exim 4.90_1) (envelope-from <xiaoou@iscas.ac.cn>)\n id 1wDgjJ-0007za-FI; Fri, 17 Apr 2026 06:47:24 -0400", "from Huawei.localdomain (unknown [36.110.52.2])\n by APP-01 (Coremail) with SMTP id qwCowAB3H2ulD+JpLDmSDQ--.804S9;\n Fri, 17 Apr 2026 18:47:15 +0800 (CST)" ], "From": "Molly Chen <xiaoou@iscas.ac.cn>", "To": "palmer@dabbelt.com, alistair.francis@wdc.com, liwei1518@gmail.com,\n daniel.barboza@oss.qualcomm.com, zhiwei_liu@linux.alibaba.com,\n chao.liu.zevorn@gmail.com", "Cc": "xiaoou@iscas.ac.cn,\n\tqemu-riscv@nongnu.org,\n\tqemu-devel@nongnu.org", "Subject": "[PATCH 07/14] target/riscv: rvp: add horizontal reduction, pack,\n merge and cout leading operations", "Date": "Fri, 17 Apr 2026 18:46:44 +0800", "Message-Id": "<20260417104652.17857-8-xiaoou@iscas.ac.cn>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260417104652.17857-1-xiaoou@iscas.ac.cn>", "References": "<20260417104652.17857-1-xiaoou@iscas.ac.cn>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-CM-TRANSID": "qwCowAB3H2ulD+JpLDmSDQ--.804S9", "X-Coremail-Antispam": "1UD129KBjvAXoWftFWxXrWkurWUWrW5ZryDAwb_yoW8ur4rXo\n Z3Gw15A34fGr1fZ34kCw47Xr17ZrZFvw1kWr4rursruas7Wr1agF15t3W8Aa4xGrWSyrW5\n X39aqF15J3W3u3sxn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3\n AaLaJ3UjIYCTnIWjp_UUUOU7AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva\n j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r126s0DM28Irc\n Ia0xkI8VCY1x0267AKxVW5JVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l\n 84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26F4j6r\n 4UJwA2z4x0Y4vEx4A2jsIE14v26rxl6s0DM28EF7xvwVC2z280aVCY1x0267AKxVW0oVCq\n 3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7\n IYx2IY67AKxVWUXVWUAwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFVCjc4AY6r1j6r4U\n M4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY1x0262kKe7AKxVWUtV\n W8ZwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v2\n 6r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2\n Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_\n Cr0_Gr1UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJw\n CI42IY6I8E87Iv6xkF7I0E14v26r4UJVWxJrUvcSsGvfC2KfnxnUUI43ZEXa7VUbnNVPUU\n UUU==", "X-Originating-IP": "[36.110.52.2]", "X-CM-SenderInfo": "50ld003x6l2u1dvotugofq/", "Received-SPF": "pass client-ip=159.226.251.21; envelope-from=xiaoou@iscas.ac.cn;\n helo=cstnet.cn", "X-Spam_score_int": "-21", "X-Spam_score": "-2.2", "X-Spam_bar": "--", "X-Spam_report": "(-2.2 / 5.0 requ) BAYES_00=-1.9, HK_RANDOM_ENVFROM=0.998,\n HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Signed-off-by: Molly Chen <xiaoou@iscas.ac.cn>\n---\n target/riscv/helper.h | 46 ++\n target/riscv/insn32.decode | 44 ++\n target/riscv/insn_trans/trans_rvp.c.inc | 44 ++\n target/riscv/psimd_helper.c | 619 ++++++++++++++++++++++++\n 4 files changed, 753 insertions(+)", "diff": "diff --git a/target/riscv/helper.h b/target/riscv/helper.h\nindex fc66712570..78ae034331 100644\n--- a/target/riscv/helper.h\n+++ b/target/riscv/helper.h\n@@ -1497,3 +1497,49 @@ DEF_HELPER_3(psas_wx, i64, env, i64, i64)\n DEF_HELPER_3(pssa_wx, i64, env, i64, i64)\n DEF_HELPER_3(paas_wx, i64, env, i64, i64)\n DEF_HELPER_3(pasa_wx, i64, env, i64, i64)\n+\n+/* Packed SIMD - Horizontal Reduction Operations */\n+DEF_HELPER_3(predsum_bs, tl, env, tl, tl)\n+DEF_HELPER_3(predsumu_bs, tl, env, tl, tl)\n+DEF_HELPER_3(predsum_hs, tl, env, tl, tl)\n+DEF_HELPER_3(predsumu_hs, tl, env, tl, tl)\n+DEF_HELPER_3(predsum_ws, i64, env, i64, i64)\n+DEF_HELPER_3(predsumu_ws, i64, env, i64, i64)\n+\n+/* Packed SIMD - Pack, Unpack, and Merge Operations */\n+DEF_HELPER_3(ppaire_b, tl, env, tl, tl)\n+DEF_HELPER_3(ppaireo_b, tl, env, tl, tl)\n+DEF_HELPER_3(ppairoe_b, tl, env, tl, tl)\n+DEF_HELPER_3(ppairo_b, tl, env, tl, tl)\n+\n+DEF_HELPER_3(ppaire_h, i64, env, i64, i64)\n+DEF_HELPER_3(ppaireo_h, tl, env, tl, tl)\n+DEF_HELPER_3(ppairoe_h, tl, env, tl, tl)\n+DEF_HELPER_3(ppairo_h, tl, env, tl, tl)\n+\n+DEF_HELPER_3(ppaireo_w, i64, env, i64, i64)\n+DEF_HELPER_3(ppairoe_w, i64, env, i64, i64)\n+DEF_HELPER_3(ppairo_w, i64, env, i64, i64)\n+DEF_HELPER_2(psext_h_b, tl, env, tl)\n+DEF_HELPER_2(psext_w_b, i64, env, i64)\n+DEF_HELPER_2(psext_w_h, i64, env, i64)\n+DEF_HELPER_2(rev, tl, env, tl)\n+DEF_HELPER_2(rev16, i64, env, i64)\n+DEF_HELPER_3(zip8p, i64, env, i64, i64)\n+DEF_HELPER_3(zip8hp, i64, env, i64, i64)\n+DEF_HELPER_3(unzip8p, i64, env, i64, i64)\n+DEF_HELPER_3(unzip8hp, i64, env, i64, i64)\n+DEF_HELPER_3(zip16p, i64, env, i64, i64)\n+DEF_HELPER_3(zip16hp, i64, env, i64, i64)\n+DEF_HELPER_3(unzip16p, i64, env, i64, i64)\n+DEF_HELPER_3(unzip16hp, i64, env, i64, i64)\n+DEF_HELPER_4(slx, tl, env, tl, tl, tl)\n+DEF_HELPER_4(srx, tl, env, tl, tl, tl)\n+DEF_HELPER_4(mvm, tl, env, tl, tl, tl)\n+DEF_HELPER_4(mvmn, tl, env, tl, tl, tl)\n+DEF_HELPER_4(merge, tl, env, tl, tl, tl)\n+\n+/* Packed SIMD - Count Leading Operations */\n+DEF_HELPER_2(cls, tl, env, tl)\n+DEF_HELPER_2(clsw, i64, env, i64)\n+\ndiff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode\nindex ba003ed513..09bb69b302 100644\n--- a/target/riscv/insn32.decode\n+++ b/target/riscv/insn32.decode\n@@ -1277,3 +1277,47 @@ psas_wx 1001001 ..... ..... 110 ..... 0111011 @r\n pssa_wx 1001011 ..... ..... 110 ..... 0111011 @r\n paas_wx 1001101 ..... ..... 110 ..... 0111011 @r\n pasa_wx 1001111 ..... ..... 110 ..... 0111011 @r\n+\n+# Packed SIMD - Horizontal Reduction Operations\n+predsum_bs 1001110 ..... ..... 100 ..... 0011011 @r\n+predsumu_bs 1011110 ..... ..... 100 ..... 0011011 @r\n+predsum_hs 1001100 ..... ..... 100 ..... 0011011 @r\n+predsumu_hs 1011100 ..... ..... 100 ..... 0011011 @r\n+predsum_ws 1001101 ..... ..... 100 ..... 0011011 @r\n+predsumu_ws 1011101 ..... ..... 100 ..... 0011011 @r\n+\n+# Packed SIMD - Pack, Unpack, and Merge Operations\n+ppaire_b 1000000 ..... ..... 100 ..... 0111011 @r\n+ppaireo_b 1001000 ..... ..... 100 ..... 0111011 @r\n+ppairoe_b 1010000 ..... ..... 100 ..... 0111011 @r\n+ppairo_b 1011000 ..... ..... 100 ..... 0111011 @r\n+ppaireo_h 1001001 ..... ..... 100 ..... 0111011 @r\n+ppairoe_h 1010001 ..... ..... 100 ..... 0111011 @r\n+ppairo_h 1011001 ..... ..... 100 ..... 0111011 @r\n+ppaire_h 1000001 ..... ..... 100 ..... 0111011 @r\n+ppaireo_w 1001011 ..... ..... 100 ..... 0111011 @r\n+ppairoe_w 1010011 ..... ..... 100 ..... 0111011 @r\n+ppairo_w 1011011 ..... ..... 100 ..... 0111011 @r\n+psext_h_b 1110000 00100 ..... 010 ..... 0011011 @r2\n+psext_w_b 1110001 00100 ..... 010 ..... 0011011 @r2\n+psext_w_h 1110001 00101 ..... 010 ..... 0011011 @r2\n+rev 01101 0111111 ..... 101 ..... 0010011 @r2\n+rev16 01101 0110000 ..... 101 ..... 0010011 @r2\n+zip8p 1111000 ..... ..... 010 ..... 0111011 @r\n+zip8hp 1111010 ..... ..... 010 ..... 0111011 @r\n+unzip8p 1110000 ..... ..... 010 ..... 0111011 @r\n+unzip8hp 1110010 ..... ..... 010 ..... 0111011 @r\n+zip16p 1111001 ..... ..... 010 ..... 0111011 @r\n+zip16hp 1111011 ..... ..... 010 ..... 0111011 @r\n+unzip16p 1110001 ..... ..... 010 ..... 0111011 @r\n+unzip16hp 1110011 ..... ..... 010 ..... 0111011 @r\n+slx 1000111 ..... ..... 001 ..... 0111011 @r\n+srx 1010111 ..... ..... 001 ..... 0111011 @r\n+mvm 1010100 ..... ..... 001 ..... 0111011 @r\n+mvmn 1010101 ..... ..... 001 ..... 0111011 @r\n+merge 1010110 ..... ..... 001 ..... 0111011 @r\n+\n+# Packed SIMD - Count Leading Operations\n+cls 01100 0000011 ..... 001 ..... 0010011 @r2\n+clsw 01100 0000011 ..... 001 ..... 0011011 @r2\n+\ndiff --git a/target/riscv/insn_trans/trans_rvp.c.inc b/target/riscv/insn_trans/trans_rvp.c.inc\nindex b24a8ef7c2..fc6254b395 100644\n--- a/target/riscv/insn_trans/trans_rvp.c.inc\n+++ b/target/riscv/insn_trans/trans_rvp.c.inc\n@@ -668,3 +668,47 @@ GEN_SIMD_TRANS_64(psas_wx)\n GEN_SIMD_TRANS_64(pssa_wx)\n GEN_SIMD_TRANS_64(paas_wx)\n GEN_SIMD_TRANS_64(pasa_wx)\n+\n+/* Packed SIMD - Horizontal Reduction Operations */\n+GEN_SIMD_TRANS(predsum_bs)\n+GEN_SIMD_TRANS(predsumu_bs)\n+GEN_SIMD_TRANS(predsum_hs)\n+GEN_SIMD_TRANS(predsumu_hs)\n+GEN_SIMD_TRANS_64(predsum_ws)\n+GEN_SIMD_TRANS_64(predsumu_ws)\n+\n+/* Packed SIMD - Pack, Unpack, and Merge Operations */\n+GEN_SIMD_TRANS(ppaire_b)\n+GEN_SIMD_TRANS(ppaireo_b)\n+GEN_SIMD_TRANS(ppairoe_b)\n+GEN_SIMD_TRANS(ppairo_b)\n+GEN_SIMD_TRANS_64(ppaire_h)\n+GEN_SIMD_TRANS(ppaireo_h)\n+GEN_SIMD_TRANS(ppairoe_h)\n+GEN_SIMD_TRANS(ppairo_h)\n+GEN_SIMD_TRANS_64(ppaireo_w)\n+GEN_SIMD_TRANS_64(ppairoe_w)\n+GEN_SIMD_TRANS_64(ppairo_w)\n+GEN_SIMD_TRANS_R1(psext_h_b)\n+GEN_SIMD_TRANS_R1_64(psext_w_b)\n+GEN_SIMD_TRANS_R1_64(psext_w_h)\n+GEN_SIMD_TRANS_R1(rev)\n+GEN_SIMD_TRANS_R1_64(rev16)\n+GEN_SIMD_TRANS_64(zip8p)\n+GEN_SIMD_TRANS_64(zip8hp)\n+GEN_SIMD_TRANS_64(unzip8p)\n+GEN_SIMD_TRANS_64(unzip8hp)\n+GEN_SIMD_TRANS_64(zip16p)\n+GEN_SIMD_TRANS_64(zip16hp)\n+GEN_SIMD_TRANS_64(unzip16p)\n+GEN_SIMD_TRANS_64(unzip16hp)\n+GEN_SIMD_TRANS_ACC(slx)\n+GEN_SIMD_TRANS_ACC(srx)\n+GEN_SIMD_TRANS_ACC(mvm)\n+GEN_SIMD_TRANS_ACC(mvmn)\n+GEN_SIMD_TRANS_ACC(merge)\n+\n+/* Packed SIMD - Count Leading Operations */\n+GEN_SIMD_TRANS_R1(cls)\n+GEN_SIMD_TRANS_R1_64(clsw)\n+\ndiff --git a/target/riscv/psimd_helper.c b/target/riscv/psimd_helper.c\nindex e48c9897ae..4080aab234 100644\n--- a/target/riscv/psimd_helper.c\n+++ b/target/riscv/psimd_helper.c\n@@ -2997,3 +2997,622 @@ uint64_t HELPER(pasa_wx)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n }\n return rd;\n }\n+\n+/* Horizontal sum operations */\n+\n+/**\n+ * PREDSUM.BS - Signed reduction sum of bytes\n+ * rd = rs2 + sum(sign_extend(rs1[i]))\n+ */\n+target_ulong HELPER(predsum_bs)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ int64_t sum = (int64_t)(int32_t)rs2;\n+ int elems = ELEMS_B(rs1);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int8_t e1 = (int8_t)EXTRACT8(rs1, i);\n+ sum += e1;\n+ }\n+\n+ return (target_ulong)sum;\n+}\n+\n+/**\n+ * PREDSUMU.BS - Unsigned reduction sum of bytes\n+ * rd = rs2 + sum(zero_extend(rs1[i]))\n+ */\n+target_ulong HELPER(predsumu_bs)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ uint64_t sum = rs2;\n+ int elems = ELEMS_B(rs1);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint8_t e1 = EXTRACT8(rs1, i);\n+ sum += e1;\n+ }\n+\n+ return (target_ulong)sum;\n+}\n+\n+/**\n+ * PREDSUM.HS - Signed reduction sum of halfwords\n+ * rd = rs2 + sum(sign_extend(rs1[i]))\n+ */\n+target_ulong HELPER(predsum_hs)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ int64_t sum = (int64_t)(int32_t)rs2;\n+ int elems = ELEMS_H(rs1);\n+\n+ for (int i = 0; i < elems; i++) {\n+ int16_t e1 = (int16_t)EXTRACT16(rs1, i);\n+ sum += e1;\n+ }\n+\n+ return (target_ulong)sum;\n+}\n+\n+/**\n+ * PREDSUMU.HS - Unsigned reduction sum of halfwords\n+ * rd = rs2 + sum(zero_extend(rs1[i]))\n+ */\n+target_ulong HELPER(predsumu_hs)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ uint64_t sum = rs2;\n+ int elems = ELEMS_H(rs1);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = EXTRACT16(rs1, i);\n+ sum += e1;\n+ }\n+\n+ return (target_ulong)sum;\n+}\n+\n+/**\n+ * PREDSUM.WS - Signed reduction sum of words (RV64 only)\n+ * rd = rs2 + sum(sign_extend(rs1[i]))\n+ */\n+uint64_t HELPER(predsum_ws)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ int64_t sum = (int64_t)rs2;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ int32_t e1 = (int32_t)EXTRACT32(rs1, i);\n+ sum += e1;\n+ }\n+\n+ return (uint64_t)sum;\n+}\n+\n+/**\n+ * PREDSUMU.WS - Unsigned reduction sum of words (RV64 only)\n+ * rd = rs2 + sum(zero_extend(rs1[i]))\n+ */\n+uint64_t HELPER(predsumu_ws)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t sum = rs2;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint32_t e1 = EXTRACT32(rs1, i);\n+ sum += e1;\n+ }\n+\n+ return sum;\n+}\n+\n+/* Packing/unpacking operations */\n+\n+/**\n+ * PPAIRE.B - Pair low bytes of corresponding halfwords\n+ * For each halfword: rd[i] = {rs2[i][7:0], rs1[i][7:0]}\n+ */\n+target_ulong HELPER(ppaire_b)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = EXTRACT16(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i);\n+ uint16_t res = ((e2 & 0x00FF) << 8) | (e1 & 0x00FF);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PPAIREO.B - Pair high byte of rs2 with low byte of rs1\n+ * For each halfword: rd[i] = {rs2[i][15:8], rs1[i][7:0]}\n+ */\n+target_ulong HELPER(ppaireo_b)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = EXTRACT16(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i);\n+ uint16_t res = ((e2 >> 8) << 8) | (e1 & 0x00FF);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PPAIROE.B - Pair low byte of rs2 with high byte of rs1\n+ * For each halfword: rd[i] = {rs2[i][7:0], rs1[i][15:8]}\n+ */\n+target_ulong HELPER(ppairoe_b)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = EXTRACT16(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i);\n+ uint16_t res = ((e2 & 0x00FF) << 8) | ((e1 >> 8) & 0x00FF);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PPAIRO.B - Pair high bytes of corresponding halfwords\n+ * For each halfword: rd[i] = {rs2[i][15:8], rs1[i][15:8]}\n+ */\n+target_ulong HELPER(ppairo_b)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = EXTRACT16(rs1, i);\n+ uint16_t e2 = EXTRACT16(rs2, i);\n+ uint16_t res = ((e2 >> 8) << 8) | ((e1 >> 8) & 0x00FF);\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PPAIRE.H - Pair low halfwords of corresponding words\n+ * (RV64 only)\n+ * For each word: rd[i] = {rs2[i][15:0], rs1[i][15:0]}\n+ */\n+uint64_t HELPER(ppaire_h)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ int elems = 2;\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint32_t e1 = EXTRACT32(rs1, i);\n+ uint32_t e2 = EXTRACT32(rs2, i);\n+ uint32_t res = ((e2 & 0x0000FFFF) << 16) | (e1 & 0x0000FFFF);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PPAIREO.H - Pair high halfword of rs2 with low halfword of rs1 (RV64 only)\n+ */\n+target_ulong HELPER(ppaireo_h)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_W(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint32_t e1 = EXTRACT32(rs1, i);\n+ uint32_t e2 = EXTRACT32(rs2, i);\n+ uint32_t res = ((e2 >> 16) << 16) | (e1 & 0x0000FFFF);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PPAIROE.H - Pair low halfword of rs2 with high halfword of rs1 (RV64 only)\n+ */\n+target_ulong HELPER(ppairoe_h)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_W(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint32_t e1 = EXTRACT32(rs1, i);\n+ uint32_t e2 = EXTRACT32(rs2, i);\n+ uint32_t res = ((e2 & 0x0000FFFF) << 16) | ((e1 >> 16) & 0x0000FFFF);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PPAIRO.H - Pair high halfwords of corresponding words (RV64 only)\n+ */\n+target_ulong HELPER(ppairo_h)(CPURISCVState *env,\n+ target_ulong rs1, target_ulong rs2)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_W(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint32_t e1 = EXTRACT32(rs1, i);\n+ uint32_t e2 = EXTRACT32(rs2, i);\n+ uint32_t res = ((e2 >> 16) << 16) | ((e1 >> 16) & 0x0000FFFF);\n+ rd = INSERT32(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PPAIREO.W - Pair low word of rs2 with low word of rs1 (RV64 only)\n+ */\n+uint64_t HELPER(ppaireo_w)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ uint32_t e1 = EXTRACT32(rs1, 0);\n+ uint32_t e2 = EXTRACT32(rs2, 1);\n+ rd = ((uint64_t)e2 << 32) | e1;\n+ return rd;\n+}\n+\n+/**\n+ * PPAIROE.W - Pair low word of rs2 with high word of rs1 (RV64 only)\n+ */\n+uint64_t HELPER(ppairoe_w)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ uint32_t e1 = EXTRACT32(rs1, 1);\n+ uint32_t e2 = EXTRACT32(rs2, 0);\n+ rd = ((uint64_t)e2 << 32) | e1;\n+ return rd;\n+}\n+\n+/**\n+ * PPAIRO.W - Pair high word of rs2 with high word of rs1 (RV64 only)\n+ */\n+uint64_t HELPER(ppairo_w)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+ uint32_t e1 = EXTRACT32(rs1, 1);\n+ uint32_t e2 = EXTRACT32(rs2, 1);\n+ rd = ((uint64_t)e2 << 32) | e1;\n+ return rd;\n+}\n+\n+/**\n+ * PSEXT.H.B - Sign-extend bytes to halfwords within each halfword\n+ */\n+target_ulong HELPER(psext_h_b)(CPURISCVState *env, target_ulong rs1)\n+{\n+ target_ulong rd = 0;\n+ int elems = ELEMS_H(rd);\n+\n+ for (int i = 0; i < elems; i++) {\n+ uint16_t e1 = EXTRACT16(rs1, i);\n+ int8_t b0 = (int8_t)(e1 & 0xFF);\n+ int16_t res = (int16_t)b0;\n+ rd = INSERT16(rd, res, i);\n+ }\n+ return rd;\n+}\n+\n+/**\n+ * PSEXT.W.B - Sign-extend bytes to words (RV64 only)\n+ */\n+uint64_t HELPER(psext_w_b)(CPURISCVState *env, uint64_t rs1)\n+{\n+ uint64_t rd = 0;\n+ int8_t b0 = (int8_t)EXTRACT8(rs1, 0);\n+ int8_t b4 = (int8_t)EXTRACT8(rs1, 4);\n+ uint32_t lo = (uint32_t)(int32_t)b0;\n+ uint32_t hi = (uint32_t)(int32_t)b4;\n+ rd = ((uint64_t)hi << 32) | lo;\n+ return rd;\n+}\n+\n+/**\n+ * PSEXT.W.H - Sign-extend halfwords to words (RV64 only)\n+ */\n+uint64_t HELPER(psext_w_h)(CPURISCVState *env, uint64_t rs1)\n+{\n+ uint64_t rd = 0;\n+ int16_t h0 = (int16_t)EXTRACT16(rs1, 0);\n+ int16_t h2 = (int16_t)EXTRACT16(rs1, 2);\n+ uint32_t lo = (uint32_t)(int32_t)h0;\n+ uint32_t hi = (uint32_t)(int32_t)h2;\n+ rd = ((uint64_t)hi << 32) | lo;\n+ return rd;\n+}\n+\n+/**\n+ * REV - Reverse all bits\n+ */\n+target_ulong HELPER(rev)(CPURISCVState *env, target_ulong rs1)\n+{\n+ target_ulong rd = 0;\n+\n+ for (int i = 0; i < TARGET_LONG_BITS; i++) {\n+ rd = (rd << 1) | (rs1 & 1);\n+ rs1 >>= 1;\n+ }\n+\n+ return rd;\n+}\n+\n+/**\n+ * REV16 - Reverse 16-bit chunks (RV64 only)\n+ */\n+uint64_t HELPER(rev16)(CPURISCVState *env, uint64_t rs1)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 4; i++) {\n+ uint16_t chunk = EXTRACT16(rs1, i);\n+ rd = (rd << 16) | chunk;\n+ }\n+\n+ return rd;\n+}\n+\n+/**\n+ * ZIP8P - Interleave bytes from rs2 and rs1 (RV64 only)\n+ * rd = {rs2[31:24], rs1[31:24], rs2[23:16], rs1[23:16],\n+ * rs2[15:8], rs1[15:8], rs2[7:0], rs1[7:0]}\n+ */\n+uint64_t HELPER(zip8p)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 4; i++) {\n+ uint8_t b1 = EXTRACT8(rs1, 3 - i);\n+ uint8_t b2 = EXTRACT8(rs2, 3 - i);\n+ rd = (rd << 16) | ((uint16_t)b2 << 8) | b1;\n+ }\n+\n+ return rd;\n+}\n+\n+/**\n+ * ZIP8HP - Interleave high bytes from rs2 and rs1 (RV64 only)\n+ */\n+uint64_t HELPER(zip8hp)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 4; i++) {\n+ uint8_t b1 = EXTRACT8(rs1, 7 - i);\n+ uint8_t b2 = EXTRACT8(rs2, 7 - i);\n+ rd = (rd << 16) | ((uint16_t)b2 << 8) | b1;\n+ }\n+\n+ return rd;\n+}\n+\n+/**\n+ * UNZIP8P - De-interleave bytes\n+ * (RV64 only)\n+ */\n+uint64_t HELPER(unzip8p)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 4; i++) {\n+ uint64_t b1 = EXTRACT8(rs1, 2 * i) << 8 * i;\n+ uint64_t b2 = EXTRACT8(rs2, 2 * i) << (32 + 8 * i);\n+ rd = rd | b2 | b1;\n+ }\n+\n+ return rd;\n+}\n+\n+/**\n+ * UNZIP8HP - De-interleave high bytes\n+ * (RV64 only)\n+ */\n+uint64_t HELPER(unzip8hp)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 4; i++) {\n+ uint64_t b1 = EXTRACT8(rs1, 2 * i + 1) << 8 * i;\n+ uint64_t b2 = EXTRACT8(rs2, 2 * i + 1) << (32 + 8 * i);\n+ rd = rd | b2 | b1;\n+ }\n+\n+ return rd;\n+}\n+\n+/**\n+ * ZIP16P - Interleave halfwords from rs2 and rs1 (RV64 only)\n+ */\n+uint64_t HELPER(zip16p)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ uint16_t h1 = EXTRACT16(rs1, 1 - i);\n+ uint16_t h2 = EXTRACT16(rs2, 1 - i);\n+ rd = (rd << 32) | ((uint32_t)h2 << 16) | h1;\n+ }\n+\n+ return rd;\n+}\n+\n+/**\n+ * ZIP16HP - Interleave high halfwords (RV64 only)\n+ */\n+uint64_t HELPER(zip16hp)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ uint16_t h1 = EXTRACT16(rs1, 3 - i);\n+ uint16_t h2 = EXTRACT16(rs2, 3 - i);\n+ rd = (rd << 32) | ((uint32_t)h2 << 16) | h1;\n+ }\n+\n+ return rd;\n+}\n+\n+/**\n+ * UNZIP16P - De-interleave halfwords (RV64 only)\n+ */\n+uint64_t HELPER(unzip16p)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ uint64_t b1 = EXTRACT16(rs1, 2 * i) << 16 * i;\n+ uint64_t b2 = EXTRACT16(rs2, 2 * i) << (32 + 16 * i);\n+ rd = rd | b2 | b1;\n+ }\n+\n+ return rd;\n+}\n+\n+/**\n+ * UNZIP16HP - De-interleave high halfwords (RV64 only)\n+ */\n+uint64_t HELPER(unzip16hp)(CPURISCVState *env, uint64_t rs1, uint64_t rs2)\n+{\n+ uint64_t rd = 0;\n+\n+ for (int i = 0; i < 2; i++) {\n+ uint64_t b1 = EXTRACT16(rs1, 2 * i + 1) << 16 * i;\n+ uint64_t b2 = EXTRACT16(rs2, 2 * i + 1) << (32 + 16 * i);\n+ rd = rd | b2 | b1;\n+ }\n+\n+ return rd;\n+}\n+\n+\n+/* Merge and mask operations */\n+\n+/**\n+ * SLX - Shift left extended (concatenate rd and rs1, shift left, take upper)\n+ */\n+target_ulong HELPER(slx)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong rd)\n+{\n+ int shamt = (TARGET_LONG_BITS == 32) ? (rs2 & 0x1F) : (rs2 & 0x3F);\n+ target_ulong xrs1 = 0;\n+ target_ulong xrd = 0;\n+\n+ if (shamt <= TARGET_LONG_BITS) {\n+ xrs1 = rs1 >> (TARGET_LONG_BITS - shamt);\n+ xrd = (rd << shamt) + xrs1;\n+ } else {\n+ xrd = rs1 << (shamt - TARGET_LONG_BITS);\n+ }\n+\n+ return xrd;\n+}\n+\n+/**\n+ * SRX - Shift right extended (concatenate rs1 and rd, shift right, take lower)\n+ */\n+target_ulong HELPER(srx)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong rd)\n+{\n+ int shamt = (TARGET_LONG_BITS == 32) ? (rs2 & 0x1F) : (rs2 & 0x3F);\n+ target_ulong xrs1 = 0;\n+ target_ulong xrd = 0;\n+\n+ if (shamt <= TARGET_LONG_BITS) {\n+ xrs1 = rs1 << (TARGET_LONG_BITS - shamt);\n+ xrd = (rd >> shamt) + xrs1;\n+ } else {\n+ xrd = rs1 >> (shamt - TARGET_LONG_BITS);\n+ }\n+\n+ return xrd;\n+}\n+\n+/**\n+ * MVM - Move masked\n+ * For each bit: rd[i] = rs2[i] ? rs1[i] : rd[i]\n+ */\n+target_ulong HELPER(mvm)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong rd)\n+{\n+ return (~rs2 & rd) | (rs2 & rs1);\n+}\n+\n+/**\n+ * MVMN - Move masked not\n+ * For each bit: rd[i] = rs2[i] ? rd[i] : rs1[i]\n+ */\n+target_ulong HELPER(mvmn)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong rd)\n+{\n+ return (~rs2 & rs1) | (rs2 & rd);\n+}\n+\n+/**\n+ * MERGE - Merge\n+ * For each bit: rd[i] = rd[i] ? rs2[i] : rs1[i]\n+ */\n+target_ulong HELPER(merge)(CPURISCVState *env, target_ulong rs1,\n+ target_ulong rs2, target_ulong rd)\n+{\n+ return (~rd & rs1) | (rd & rs2);\n+}\n+\n+/* Count leading operations */\n+\n+/**\n+ * CLS - Count leading redundant sign bits\n+ */\n+target_ulong HELPER(cls)(CPURISCVState *env, target_ulong rs1)\n+{\n+ target_long a = (target_long)rs1;\n+ target_ulong cnt = 0;\n+\n+#if TARGET_LONG_BITS == 64\n+ target_long lo_bound = 0xC000000000000000LL;\n+ target_long hi_bound = 0x3FFFFFFFFFFFFFFFLL;\n+#else\n+ target_long lo_bound = 0xC0000000;\n+ target_long hi_bound = 0x3FFFFFFF;\n+#endif\n+\n+ while (cnt < TARGET_LONG_BITS - 1 && a >= lo_bound && a <= hi_bound) {\n+ cnt++;\n+ a <<= 1;\n+ }\n+\n+ return cnt;\n+}\n+\n+/**\n+ * CLSW - Count leading redundant sign bits of low 32 bits (RV64)\n+ */\n+uint64_t HELPER(clsw)(CPURISCVState *env, uint64_t rs1)\n+{\n+ int32_t a = (int32_t)(rs1 & 0xFFFFFFFF);\n+ int32_t lo_bound = 0xC0000000;\n+ int32_t hi_bound = 0x3FFFFFFF;\n+ int c = 0;\n+\n+ while (c < 31 && a >= lo_bound && a <= hi_bound) {\n+ c++;\n+ a <<= 1;\n+ }\n+\n+ return c;\n+}\n", "prefixes": [ "07/14" ] }