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GET /api/1.2/patches/2224328/?format=api
{ "id": 2224328, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2224328/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/f0099668-6971-45b5-ba82-7a2771964ea2@arm.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.2/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<f0099668-6971-45b5-ba82-7a2771964ea2@arm.com>", "list_archive_url": null, "date": "2026-04-17T09:46:51", "name": "arm, bitint: Add support for FP_HANDLE_EXCEPTIONS and FP_ROUNDMODE with hard float abi", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "dd22613295cb922a59f9e5e8fcc3a05f7b3b369e", "submitter": { "id": 67095, "url": "http://patchwork.ozlabs.org/api/1.2/people/67095/?format=api", "name": "Andre Vieira", "email": "Andre.SimoesDiasVieira@arm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/f0099668-6971-45b5-ba82-7a2771964ea2@arm.com/mbox/", "series": [ { "id": 500295, "url": "http://patchwork.ozlabs.org/api/1.2/series/500295/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500295", "date": "2026-04-17T09:46:51", "name": "arm, bitint: Add support for FP_HANDLE_EXCEPTIONS and FP_ROUNDMODE with hard float abi", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/500295/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224328/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224328/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n unprotected) header.d=arm.com header.i=@arm.com header.a=rsa-sha256\n header.s=foss header.b=dj7BceD/;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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Fri, 17 Apr 2026 09:47:26 +0000 (GMT)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by sourceware.org (Postfix) with ESMTP id EB8084BAD145\n for <gcc-patches@gcc.gnu.org>; Fri, 17 Apr 2026 09:46:58 +0000 (GMT)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8A09219F0;\n Fri, 17 Apr 2026 02:46:52 -0700 (PDT)", "from [10.57.87.239] (unknown [10.57.87.239])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9CBE13F7B4;\n Fri, 17 Apr 2026 02:46:57 -0700 (PDT)" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org AF9094C515FA", "OpenDKIM Filter v2.11.0 sourceware.org EB8084BAD145" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org EB8084BAD145", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org EB8084BAD145", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1776419219; cv=none;\n b=J5RDnHAWFNsM0p1zWv7UoOz1gtJTFz7LzfjK/HVOO6/092Tdx9HI45wrMrUmrf7HrK+kFm24dTXbVsxgYF5H72ZiVRLhn8DQg+KFWkZrnbSKTLSnhT2oRiU8chy6c8MCEaeR+ZAUGYVEDgacqichILQ2J28X5OLe7v0DO9i6q8E=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776419219; c=relaxed/simple;\n bh=kQqJCcoG54QD8IbBeYohNfZp3whPvIdbg58sPfirXF8=;\n h=DKIM-Signature:Message-ID:Date:MIME-Version:From:Subject:To;\n b=ElHRVm5fMrKEdNd/ABNdifAagQqhLzNleLAx8H07PJ62DxvT11+StRFz2bcRS9P+wzct/uatvYga9/PQ14hKSTAYlAzB6hihcqTy0vL6miFjkt/45jdA9HX/S3M2WoDTSWRJ2ZyYxr6Yo9pZDNkR5xxp6TUX5i84G1szxKA1PiI=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "DKIM-Signature": "v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss;\n t=1776419218; bh=kQqJCcoG54QD8IbBeYohNfZp3whPvIdbg58sPfirXF8=;\n h=Date:From:Subject:To:From;\n b=dj7BceD/vuhynweEFwImE4hynvGUD+CU40GPWbjeQrMirDh8qBEnb0icG0I8c5OlE\n +iAZFGO9qHn1Q2TRAH5kUbMV6aUq9+eSi+6fBMDzZAhEcJS63a9+cRk94Y5xgK1Evc\n ugsEGVtbCp71oTdqDpUnFaIWyMJ5a+eoCwY1rUAQ=", "Content-Type": "multipart/mixed; boundary=\"------------KbeL8x0kstOSqPDNs8Zn1FZD\"", "Message-ID": "<f0099668-6971-45b5-ba82-7a2771964ea2@arm.com>", "Date": "Fri, 17 Apr 2026 10:46:51 +0100", "MIME-Version": "1.0", "User-Agent": "Mozilla Thunderbird", "Content-Language": "en-US", "From": "Andre Vieira <andre.simoesdiasvieira@arm.com>", "Subject": "[PATCH] arm, bitint: Add support for FP_HANDLE_EXCEPTIONS and\n FP_ROUNDMODE with hard float abi", "To": "Jakub Jelinek <jakub@redhat.com>,\n \"gcc-patches@gcc.gnu.org\" <gcc-patches@gcc.gnu.org>,\n Richard Earnshaw <rearnsha@arm.com>", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Hi,\n\nThis patch adds support for FP_HANDLE_EXCEPTIONS when using hard float \nabi. This is used by _BitInt software emulation used for floating point \nconversions to throw an exception.\nThis patch also adds support for FP_ROUNDMODE with hard float abit, \nwhich is also used by _BitInt floating point emulation.\n\nFP_ROUNDMODE remains broken for soft-float ABI, but that's not _BitInt \nspecific.\n\nlibgcc/ChangeLog:\n\n * config/arm/sfp-exceptions.c: New file.\n * config/arm/sfp-machine.h: Define FP_HANDLE_EXCEPTIONS, FP_EX_*\n MACROs, _FP_DECL_EX, FP_ROUNDMODE, FP_INIT_ROUNDMODE, FP_RND_* \nMACROs\n and declare __sfp_handle_exceptions.\n * config/arm/t-softfp: Add sfp-exceptions.c to LIB2ADD.", "diff": "diff --git a/libgcc/config/arm/sfp-exceptions.c b/libgcc/config/arm/sfp-exceptions.c\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..c066b49250b4ed908da0de96f1d7e37d5c915a91\n--- /dev/null\n+++ b/libgcc/config/arm/sfp-exceptions.c\n@@ -0,0 +1,53 @@\n+/*\n+ * Copyright (C) 2026 Free Software Foundation, Inc.\n+ *\n+ * This file is free software; you can redistribute it and/or modify it\n+ * under the terms of the GNU General Public License as published by the\n+ * Free Software Foundation; either version 3, or (at your option) any\n+ * later version.\n+ *\n+ * This file is distributed in the hope that it will be useful, but\n+ * WITHOUT ANY WARRANTY; without even the implied warranty of\n+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU\n+ * General Public License for more details.\n+ *\n+ * Under Section 7 of GPL version 3, you are granted additional\n+ * permissions described in the GCC Runtime Library Exception, version\n+ * 3.1, as published by the Free Software Foundation.\n+ *\n+ * You should have received a copy of the GNU General Public License and\n+ * a copy of the GCC Runtime Library Exception along with this program;\n+ * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see\n+ * <http://www.gnu.org/licenses/>.\n+ */\n+\n+#if __ARM_FP\n+#include \"sfp-machine.h\"\n+\n+/*\n+ _BitInt support for the arm port will use software emulation for conversions\n+ to and from any floating point type to _BitInt. These operations can throw\n+ exceptions and to make sure the exception state is set correctly when\n+ floating point hardware is available we execute floating point instructions\n+ that we know will set the exception state according to the exception bits\n+ set in _FEX. */\n+\n+void\n+__sfp_handle_exceptions (int _fex)\n+{\n+ volatile float fp_max = __FLT_MAX__;\n+ volatile float fp_min = __FLT_MIN__;\n+ volatile float fp_1e32 = 1.0e32f;\n+ volatile float fp_zero = 0.0;\n+ volatile float fp_one = 1.0;\n+\n+ if ((_fex & FP_EX_INVALID) || (_fex & FP_EX_DIVZERO))\n+ fp_zero = fp_zero/fp_zero;\n+ if (_fex & FP_EX_OVERFLOW)\n+ fp_1e32 += fp_max;\n+ if (_fex & FP_EX_UNDERFLOW)\n+ fp_min *= fp_min;\n+ if (_fex & FP_EX_INEXACT)\n+ fp_max -= fp_one;\n+}\n+#endif\ndiff --git a/libgcc/config/arm/sfp-machine.h b/libgcc/config/arm/sfp-machine.h\nindex b7b5171e702d533f9587f54228fccd6c88a4ae93..fe500fab46b957b4ab8758fd48bf619a75e8e0fa 100644\n--- a/libgcc/config/arm/sfp-machine.h\n+++ b/libgcc/config/arm/sfp-machine.h\n@@ -7,6 +7,36 @@\n match `__libgcc_cmp_return__' in GCC for the target. */\n typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));\n #define CMPtype __gcc_CMPtype\n+#if __ARM_FP\n+#define FP_EX_INVALID\t0x01\n+#define FP_EX_DIVZERO\t0x02\n+#define FP_EX_OVERFLOW\t0x04\n+#define FP_EX_UNDERFLOW\t0x08\n+#define FP_EX_INEXACT\t0x10\n+void __sfp_handle_exceptions (int);\n+#define FP_HANDLE_EXCEPTIONS\t\t\t\\\n+ do {\t\t\t\t\t\t\\\n+ if (__builtin_expect (_fex, 0))\t\t\\\n+ __sfp_handle_exceptions (_fex);\t\t\\\n+ } while (0)\n+\n+#define FP_RND_NEAREST\t\t0x000000\n+#define FP_RND_PINF\t\t0x400000\n+#define FP_RND_MINF\t\t0x800000\n+#define FP_RND_ZERO\t\t0xc00000\n+#define FP_RND_MASK\t\t0xc00000\n+\n+#define _FP_DECL_EX \\\n+ unsigned long int _fpcr __attribute__ ((unused)) = FP_RND_NEAREST\n+\n+#define FP_INIT_ROUNDMODE\t\t\t\\\n+ do {\t\t\t\t\t\t\\\n+ _fpcr = __builtin_arm_get_fpscr ();\t\t\\\n+ } while (0)\n+\n+#define FP_ROUNDMODE (_fpcr & FP_RND_MASK)\n+#endif\n+\n \n #define _FP_MUL_MEAT_S(R,X,Y)\t\t\t\t\\\n _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)\ndiff --git a/libgcc/config/arm/t-softfp b/libgcc/config/arm/t-softfp\nindex 68aff4de0687cfadb062069ad152ea0af7f8c5d6..ab3bbbd2fd05bdb30914bf21e97017f2ba8094e1 100644\n--- a/libgcc/config/arm/t-softfp\n+++ b/libgcc/config/arm/t-softfp\n@@ -2,3 +2,4 @@ softfp_wrap_start := '\\#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1'\n softfp_wrap_end := '\\#endif'\n bitint_extras += floatbitinthf\n softfp_cflags := -mfp16-format=ieee\n+LIB2ADD += $(srcdir)/config/arm/sfp-exceptions.c\n", "prefixes": [] }