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GET /api/1.2/patches/2224194/?format=api
{ "id": 2224194, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2224194/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417032837.2664122-6-jamin_lin@aspeedtech.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260417032837.2664122-6-jamin_lin@aspeedtech.com>", "list_archive_url": null, "date": "2026-04-17T03:28:45", "name": "[v4,05/21] hw/arm/ast27x0: Add DRAM alias for SSP SDRAM remap", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b9a5657a01c0f24deef565e62b173df9f0e353c5", "submitter": { "id": 81768, "url": "http://patchwork.ozlabs.org/api/1.2/people/81768/?format=api", "name": "Jamin Lin", "email": "jamin_lin@aspeedtech.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417032837.2664122-6-jamin_lin@aspeedtech.com/mbox/", "series": [ { "id": 500228, "url": "http://patchwork.ozlabs.org/api/1.2/series/500228/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500228", "date": "2026-04-17T03:28:41", "name": "Add SSP/TSP power control and DRAM remap support for AST2700", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/500228/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224194/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224194/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit 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b=GTn4RbwDAW3KHh+0lX8FCIbXLYaMG+iaFAFnPW6FuIXEQNcUGACBkyjheN9+ZgFtshn8ROktNrMMthuoU2cdsYX1AgvkiRk2dA8VedL+LtGTWzL6sD4ProIrLWzU6YpDoorXa2fOHxyx1OkPaVFnao6n3hhXlQxZJfFck3+7+iO/ALnqBtz78hUOj/AAjBGDrMYrvRsywm54gJpmySgGepJFEp8aPZX3IkXehY07bRaof8/wPZ6Qh04KkDe1j0ckHi9vOWvX1ZRLbaRNt8XYpDwpx5mjBxYzcHwp3AwxtiTYzB/FlxdOKUo9DLBcJupft5VlzT5KoiQAzAiIBF8XTw==", "From": "Jamin Lin <jamin_lin@aspeedtech.com>", "To": "=?iso-8859-1?q?C=E9dric_Le_Goater?= <clg@kaod.org>,\n Peter Maydell <peter.maydell@linaro.org>,\n Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>,\n Kane Chen <kane_chen@aspeedtech.com>,\n Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>,\n Pierrick Bouvier <pierrick.bouvier@linaro.org>,\n Alistair Francis <alistair@alistair23.me>, Kevin Wolf <kwolf@redhat.com>,\n Hanna Reitz <hreitz@redhat.com>,\n \"open list:ASPEED BMCs\" <qemu-arm@nongnu.org>,\n \"open list:All patches CC here\" <qemu-devel@nongnu.org>,\n \"open list:Block layer core\" <qemu-block@nongnu.org>", "CC": "Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>", "Subject": "[PATCH v4 05/21] hw/arm/ast27x0: Add DRAM alias for SSP SDRAM remap", "Thread-Topic": "[PATCH v4 05/21] hw/arm/ast27x0: Add DRAM alias for SSP SDRAM\n remap", "Thread-Index": "AQHczhpMih2bvP+gF0eQLYKwHPAx6Q==", "Date": "Fri, 17 Apr 2026 03:28:45 +0000", "Message-ID": "<20260417032837.2664122-6-jamin_lin@aspeedtech.com>", "References": "<20260417032837.2664122-1-jamin_lin@aspeedtech.com>", "In-Reply-To": "<20260417032837.2664122-1-jamin_lin@aspeedtech.com>", "Accept-Language": "zh-TW, en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "authentication-results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=GTn4RbwD;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) 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"X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-CrossTenant-userprincipalname": "\n mgjOqJ2iyBIW1bsJc9NHaXg+xKmgrham+ZqrkclXiB3hM1kUQtgnkSZ0deRy4uvraU3zMYPM/C4yjCnAPydEk49tiDAT6szrkWJYW3u0L6s=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "KL1PR06MB6299", "Received-SPF": "pass client-ip=2a01:111:f403:c405::5;\n envelope-from=jamin_lin@aspeedtech.com;\n helo=TYPPR03CU001.outbound.protection.outlook.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "This commit adds two MemoryRegion aliases to support PSP access to\nSSP SDRAM through shared memory remapping.\n\nThe SSP exposes two DRAM aliases:\n - remap1 maps PSP DRAM at 0x400000000 to SSP SDRAM offset 0x5880000\n - remap2 maps PSP DRAM at 0x42C000000 to SSP SDRAM offset 0x0\n\nThese mappings follow the default SCU register configuration used by\nthe ASPEED SDK firmware, which defines the memory window mapping\nbetween PSP and the SSP.\n\nSet SSP CPUID 4.\n\nSigned-off-by: Jamin Lin <jamin_lin@aspeedtech.com>\n---\n include/hw/misc/aspeed_scu.h | 4 ++++\n hw/arm/aspeed_ast27x0-fc.c | 2 ++\n hw/arm/aspeed_ast27x0-ssp.c | 6 ++++++\n hw/arm/aspeed_ast27x0.c | 4 ++++\n hw/misc/aspeed_scu.c | 36 ++++++++++++++++++++++++++++++++++++\n 5 files changed, 52 insertions(+)", "diff": "diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h\nindex fd30313e69..106ab4b04a 100644\n--- a/include/hw/misc/aspeed_scu.h\n+++ b/include/hw/misc/aspeed_scu.h\n@@ -44,6 +44,10 @@ struct AspeedSCUState {\n \n struct Aspeed2700SCUState {\n AspeedSCUState parent_obj;\n+\n+ MemoryRegion dram_remap_alias[3];\n+ MemoryRegion *dram;\n+ int ssp_cpuid;\n };\n \n #define AST2400_A1_SILICON_REV 0x02010303U\ndiff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c\nindex 46f0c97329..0688750e78 100644\n--- a/hw/arm/aspeed_ast27x0-fc.c\n+++ b/hw/arm/aspeed_ast27x0-fc.c\n@@ -100,6 +100,8 @@ static bool ast2700fc_ca35_init(MachineState *machine, Error **errp)\n sc->uarts_num, serial_hd(1));\n aspeed_soc_uart_set_chr(soc->uart, ASPEED_DEV_UART7, sc->uarts_base,\n sc->uarts_num, serial_hd(2));\n+ object_property_set_int(OBJECT(&s->ca35), \"ssp-cpuid\", 4,\n+ &error_abort);\n if (!qdev_realize(DEVICE(&s->ca35), NULL, errp)) {\n return false;\n }\ndiff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c\nindex edfcf1badb..0500c02755 100644\n--- a/hw/arm/aspeed_ast27x0-ssp.c\n+++ b/hw/arm/aspeed_ast27x0-ssp.c\n@@ -199,6 +199,12 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)\n memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU],\n &a->scu_alias);\n \n+ /* SDRAM remap alias used by PSP to access SSP SDRAM */\n+ memory_region_add_subregion(&s->sdram, 0, &a->scu->dram_remap_alias[1]);\n+ memory_region_add_subregion(&s->sdram,\n+ memory_region_size(&a->scu->dram_remap_alias[1]),\n+ &a->scu->dram_remap_alias[0]);\n+\n /* INTC */\n if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) {\n return;\ndiff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c\nindex e84975a9c4..e38b829cc7 100644\n--- a/hw/arm/aspeed_ast27x0.c\n+++ b/hw/arm/aspeed_ast27x0.c\n@@ -432,6 +432,8 @@ static void aspeed_soc_ast2700_init(Object *obj)\n \"hw-strap1\");\n object_property_add_alias(obj, \"hw-prot-key\", OBJECT(&a->scu),\n \"hw-prot-key\");\n+ object_property_add_alias(obj, \"ssp-cpuid\", OBJECT(&a->scu),\n+ \"ssp-cpuid\");\n \n object_initialize_child(obj, \"scuio\", &s->scuio, TYPE_ASPEED_2700_SCUIO);\n qdev_prop_set_uint32(DEVICE(&s->scuio), \"silicon-rev\",\n@@ -794,6 +796,8 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)\n sc->memmap[ASPEED_DEV_VBOOTROM], &s->vbootrom);\n \n /* SCU */\n+ object_property_set_link(OBJECT(&a->scu), \"dram\", OBJECT(s->dram_mr),\n+ &error_abort);\n if (!sysbus_realize(SYS_BUS_DEVICE(&a->scu), errp)) {\n return;\n }\ndiff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c\nindex 51696443bd..7080bd6241 100644\n--- a/hw/misc/aspeed_scu.c\n+++ b/hw/misc/aspeed_scu.c\n@@ -20,6 +20,7 @@\n #include \"qemu/guest-random.h\"\n #include \"qemu/module.h\"\n #include \"trace.h\"\n+#include \"qemu/units.h\"\n \n #define TO_REG(offset) ((offset) >> 2)\n \n@@ -961,9 +962,42 @@ static void aspeed_ast2700_scu_reset(DeviceState *dev)\n \n static void aspeed_2700_scu_realize(DeviceState *dev, Error **errp)\n {\n+ Aspeed2700SCUState *a = ASPEED_2700_SCU(dev);\n+\n aspeed_scu_realize(dev, errp);\n+\n+ if (a->ssp_cpuid > 0) {\n+ if (!a->dram) {\n+ error_setg(errp, TYPE_ASPEED_2700_SCU \": 'dram' link not set\");\n+ return;\n+ }\n+ }\n+\n+ if (a->ssp_cpuid > 0) {\n+ /*\n+ * The SSP coprocessor uses two memory aliases (remap1 and remap2)\n+ * to access shared memory regions in the PSP DRAM:\n+ *\n+ * - remap1 maps PSP DRAM at 0x400000000 (size: 0x1A77E000) to\n+ * SSP SDRAM offset 0x5880000\n+ * - remap2 maps PSP DRAM at 0x42C000000 (size: 0x05880000) to\n+ * SSP SDRAM offset 0x0\n+ */\n+ memory_region_init_alias(&a->dram_remap_alias[0], OBJECT(a),\n+ \"ssp.dram.remap1\", a->dram,\n+ 0, 0x1a77e000);\n+ memory_region_init_alias(&a->dram_remap_alias[1], OBJECT(a),\n+ \"ssp.dram.remap2\", a->dram,\n+ 0x2c000000, 0x05880000);\n+ }\n }\n \n+static const Property aspeed_2700_scu_properties[] = {\n+ DEFINE_PROP_INT32(\"ssp-cpuid\", Aspeed2700SCUState, ssp_cpuid, -1),\n+ DEFINE_PROP_LINK(\"dram\", Aspeed2700SCUState, dram, TYPE_MEMORY_REGION,\n+ MemoryRegion *),\n+};\n+\n static void aspeed_2700_scu_class_init(ObjectClass *klass, const void *data)\n {\n DeviceClass *dc = DEVICE_CLASS(klass);\n@@ -972,6 +1006,8 @@ static void aspeed_2700_scu_class_init(ObjectClass *klass, const void *data)\n dc->desc = \"ASPEED 2700 System Control Unit\";\n device_class_set_legacy_reset(dc, aspeed_ast2700_scu_reset);\n dc->realize = aspeed_2700_scu_realize;\n+ device_class_set_props(dc, aspeed_2700_scu_properties);\n+\n asc->resets = ast2700_a0_resets;\n asc->calc_hpll = aspeed_2600_scu_calc_hpll;\n asc->get_apb = aspeed_2700_scu_get_apb_freq;\n", "prefixes": [ "v4", "05/21" ] }