Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.2/patches/2224182/?format=api
{ "id": 2224182, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2224182/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417032837.2664122-3-jamin_lin@aspeedtech.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260417032837.2664122-3-jamin_lin@aspeedtech.com>", "list_archive_url": null, "date": "2026-04-17T03:28:41", "name": "[v4,02/21] hw/misc/aspeed_scu: Add separate reset handler for AST2700 SCUIO", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5f3bf0d33ff9bf9c98cd712f6130928682077a68", "submitter": { "id": 81768, "url": "http://patchwork.ozlabs.org/api/1.2/people/81768/?format=api", "name": "Jamin Lin", "email": "jamin_lin@aspeedtech.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417032837.2664122-3-jamin_lin@aspeedtech.com/mbox/", "series": [ { "id": 500228, "url": "http://patchwork.ozlabs.org/api/1.2/series/500228/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500228", "date": "2026-04-17T03:28:41", "name": "Add SSP/TSP power control and DRAM remap support for AST2700", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/500228/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2224182/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2224182/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=ipDdSYun;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"iso-8859-1\"", "Content-Transfer-Encoding": "quoted-printable", "MIME-Version": "1.0", "X-Exchange-RoutingPolicyChecked": "\n LSA+C+t8GPTXWQ2QKSjMopYRL/mX9DrR4PCr6y2h1yRmKPiixy+s1KW0v+g4r5a1STAsCcsDQsuUQVW3xc+2WqjWaYnTAXhsU5sG6poVJ73+WlrD3+2pJeSWj4LaVbPx+VdDvR1Myg9WGTGxW9N3Rzr6O/6aHeeRKBXdaM+++y5sDu+ZrDuP2i3bHs2mG83VYMuuItqp4fX+JyUfzKRVLBOtvzuAf/381HSScDfT+TJG9o0bhq1F2fS041TXEo+uZnGKYINkb9tiqv8ufc3zVL7gxKEsOWYCZdk+hGVdkZnuoix0gLsdSuv2kvxGHuRnlpf5mmjaceGkNLMPO84Hjg==", "X-OriginatorOrg": "aspeedtech.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-AuthSource": "TYPPR06MB8206.apcprd06.prod.outlook.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 0bdf7dc6-ee22-48e4-cb97-08de9c316c02", "X-MS-Exchange-CrossTenant-originalarrivaltime": "17 Apr 2026 03:28:41.2100 (UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "43d4aa98-e35b-4575-8939-080e90d5a249", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-CrossTenant-userprincipalname": "\n cWIdJfM2F3H6rHZ//T1ckWXX1r8ylP8escHxYWPwL/cGY/fmUWjWczYS/1hByOeU0vXycFM2/O+8g6EfsVlnVKLRH+xI11g5EkayP4S9FgA=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "KL1PR06MB6299", "Received-SPF": "pass client-ip=2a01:111:f403:c405::5;\n envelope-from=jamin_lin@aspeedtech.com;\n helo=TYPPR03CU001.outbound.protection.outlook.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Introduce a dedicated reset handler for SCUIO.\n\nPreviously, SCU and SCUIO shared the same reset handler. This no longer\nfits the AST2700 design, where SCU uses the Aspeed2700SCUState subclass\nand will handle coprocessor-related control in future changes.\n\nSince these controls are defined in SCU (not SCUIO), SCU and SCUIO\nshould not share the same reset logic.\n\nThis change gives SCUIO its own reset handler and prepares for upcoming\nSCU-specific functionality.\n\nNo functional change.\n\nSigned-off-by: Jamin Lin <jamin_lin@aspeedtech.com>\n---\n hw/misc/aspeed_scu.c | 12 +++++++++++-\n 1 file changed, 11 insertions(+), 1 deletion(-)", "diff": "diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c\nindex 0a2dad4537..51696443bd 100644\n--- a/hw/misc/aspeed_scu.c\n+++ b/hw/misc/aspeed_scu.c\n@@ -1084,13 +1084,23 @@ static const uint32_t ast2700_a0_resets_io[ASPEED_AST2700_SCU_NR_REGS] = {\n [AST2700_SCUIO_FREQ_CNT_CTL] = 0x00000080,\n };\n \n+static void aspeed_ast2700_scuio_reset(DeviceState *dev)\n+{\n+ AspeedSCUState *s = ASPEED_SCU(dev);\n+ AspeedSCUClass *asc = ASPEED_SCU_GET_CLASS(dev);\n+\n+ memcpy(s->regs, asc->resets, asc->nr_regs * 4);\n+ s->regs[AST2700_SILICON_REV] = s->silicon_rev;\n+ s->regs[AST2700_HW_STRAP1] = s->hw_strap1;\n+}\n+\n static void aspeed_2700_scuio_class_init(ObjectClass *klass, const void *data)\n {\n DeviceClass *dc = DEVICE_CLASS(klass);\n AspeedSCUClass *asc = ASPEED_SCU_CLASS(klass);\n \n dc->desc = \"ASPEED 2700 System Control Unit I/O\";\n- device_class_set_legacy_reset(dc, aspeed_ast2700_scu_reset);\n+ device_class_set_legacy_reset(dc, aspeed_ast2700_scuio_reset);\n asc->resets = ast2700_a0_resets_io;\n asc->calc_hpll = aspeed_2600_scu_calc_hpll;\n asc->get_apb = aspeed_2700_scuio_get_apb_freq;\n", "prefixes": [ "v4", "02/21" ] }