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GET /api/1.2/patches/2223452/?format=api
{ "id": 2223452, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2223452/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415105552.622421-22-skolothumtho@nvidia.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.2/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260415105552.622421-22-skolothumtho@nvidia.com>", "list_archive_url": null, "date": "2026-04-15T10:55:42", "name": "[v4,21/31] memory: Allow RAM device regions to skip IOMMU mapping", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "aa1c32c2ca485dd8b2fff494462f304f933fe85b", "submitter": { "id": 91580, "url": "http://patchwork.ozlabs.org/api/1.2/people/91580/?format=api", "name": "Shameer Kolothum Thodi", "email": "skolothumtho@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415105552.622421-22-skolothumtho@nvidia.com/mbox/", "series": [ { "id": 499965, "url": "http://patchwork.ozlabs.org/api/1.2/series/499965/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499965", "date": "2026-04-15T10:55:21", "name": "hw/arm/virt: Introduce Tegra241 CMDQV support for accelerated SMMUv3", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/499965/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223452/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223452/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=IkASJrhL;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail.nvidia.com; pr=C", "permerror client-ip=2a01:111:f403:c100::f;\n envelope-from=skolothumtho@nvidia.com;\n helo=BL2PR02CU003.outbound.protection.outlook.com" ], "From": "Shameer Kolothum <skolothumtho@nvidia.com>", "To": "<qemu-arm@nongnu.org>, <qemu-devel@nongnu.org>", "CC": "<eric.auger@redhat.com>, <peter.maydell@linaro.org>, <clg@redhat.com>,\n <alex@shazbot.org>, <nicolinc@nvidia.com>, <nathanc@nvidia.com>,\n <mochs@nvidia.com>, <jan@nvidia.com>, <jgg@nvidia.com>,\n <jonathan.cameron@huawei.com>, <zhenzhong.duan@intel.com>,\n <kjaju@nvidia.com>, <phrdina@redhat.com>, <skolothumtho@nvidia.com>", "Subject": "[PATCH v4 21/31] memory: Allow RAM device regions to skip IOMMU\n mapping", "Date": "Wed, 15 Apr 2026 11:55:42 +0100", "Message-ID": "<20260415105552.622421-22-skolothumtho@nvidia.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260415105552.622421-1-skolothumtho@nvidia.com>", "References": "<20260415105552.622421-1-skolothumtho@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.37]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000EE3E:EE_|CY8PR12MB8194:EE_", "X-MS-Office365-Filtering-Correlation-Id": "b71456dd-bb34-49b1-f251-08de9adde0a5", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230040|1800799024|376014|36860700016|82310400026|56012099003|18002099003|22082099003;", "X-Microsoft-Antispam-Message-Info": "\n TJCW36R5Ngw3/pwQvsMUqHmb/XMIdUeTQo5XJ7q3sjr1FY1GdAdjRASfVpAAgXJNlJldjDvbjJ7lWz+v2wB0Ydd1AOMJyjeZ3PNNZe/t+n1IZ46rAl5i7Gnj0AbPQ9baCxMwXtd2G3PpSAHAD0Gsw9GnUBEHBF0inU9CTZO260Mvioi9lDJLWblgFy3DXRTfI78CFcQ7aXBgbqXop2lA4yLVsoeOP8mZe5Oxr6je0GU50ZxImsoAPF0yMHK8WmMCxi+Ve0571pZavchjQrSb57NDOFjhtjOaI5iyJNqamrRGgtJshczwa+auuV3DHYqPmut0y+zho+QvoiAfHlxUHZBoqiNPhj7LH9efi7TB4MkYFeuJd52irUhtNqyX5Gkf+TaOqUHROG5JF1DmxthJ+lnyBN1y5m0hnLzN5Gp63BHQVvQ3I/MM/uX4XcS/W8aWN1bG/gYF0x8jqXkVHof+WTa6LyV8B3coADjmflPVQwtbXaubppy0yrdJKk7939xKL9a2FiIwRDBeCCYHC9t8IJUliV+jiBTm+5WYlBe1BKr8QXS3IKaZ3rboUzolND6FaOYAyhzUM9Os6rdsL0K44EYJnLNeB49f1mznaAjjFDg+v83DrFxQRg9DXfGuKM/IOIAL4QABSe+Tzawh4CdaxkxKexTUdfIrk8lBesnvTlULQIArexga3QcN7YtFpErSOyAXWYWvx3XhakM3GRPefy3Sff4L4gw7U6PFYJeltphpsmyqV/KSwoxql0kyJud8vFYmBnbafB5/yVYLnysaSw==", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230040)(1800799024)(376014)(36860700016)(82310400026)(56012099003)(18002099003)(22082099003);\n DIR:OUT; SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n kkt6evQLyQpfWApkRFAbGpfj0aml2Wu87rpFX0FHQJHbdIBwmMVKGLED5AZbF916mDQwFu63P94q0DTReUR6o0gi7TMRi2X9RmK5NM8AASF3uSq7T0lveyJtVPJIkHhrIeT50/BdQZK1vYiPsXNeLMDjCH8j54oVYpcHIxBCx/Bkgz8EKOgI5CwLO4Su3skx2Q7t4U5V3pIGs+rAS+tRG/0hoSby6Ccdd+L6oFTDxVJzt/OTTHuF34kaXvkVUFVj+YKIxRAyUkmgKx/ce7ZQsy5L/Dz9VVbqXQ0D9ZByfaUTzntQE2NypbcxVa60b/NjNyKEUIRjpaY7/I9iEUtXhL1tK9r3tCLK/tO0bM0k9hrmWUiV626hwdsWI4viWIiwOGPj+xpzIfnqE4CaumarlodBztsvR+P3ZyzNAWSR+bIMADL/BJT74MrJnM31L06Z", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "15 Apr 2026 10:58:07.9757 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n b71456dd-bb34-49b1-f251-08de9adde0a5", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000EE3E.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY8PR12MB8194", "X-Spam_score_int": "-15", "X-Spam_score": "-1.6", "X-Spam_bar": "-", "X-Spam_report": "(-1.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FORGED_SPF_HELO=1, SPF_HELO_PASS=-0.001,\n SPF_NONE=0.001 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Some RAM device regions created with memory_region_init_ram_device_ptr()\nare not intended to be P2P DMA targets.\n\nThe VFIO listener currently treats all RAM device regions as DMA\ncapable and attempts to map them into the IOMMU. For regions without\ndma-buf backing this fails and prints warnings such as:\n\n IOMMU_IOAS_MAP failed: Bad address, PCI BAR?\n\nIntroduce a MemoryRegion flag (ram_device_skip_iommu_map) to mark RAM\ndevice regions that should not be IOMMU mapped. When set, the VFIO\nlistener skips DMA mapping for that region.\n\nSigned-off-by: Shameer Kolothum <skolothumtho@nvidia.com>\n---\n include/system/memory.h | 2 ++\n hw/vfio/listener.c | 5 +++++\n 2 files changed, 7 insertions(+)", "diff": "diff --git a/include/system/memory.h b/include/system/memory.h\nindex 7aed255e81..9df15e833a 100644\n--- a/include/system/memory.h\n+++ b/include/system/memory.h\n@@ -864,6 +864,8 @@ struct MemoryRegion {\n \n /* For devices designed to perform re-entrant IO into their own IO MRs */\n bool disable_reentrancy_guard;\n+ /* RAM device region that does not require IOMMU mapping for P2P */\n+ bool ram_device_skip_iommu_map;\n };\n \n struct IOMMUMemoryRegion {\ndiff --git a/hw/vfio/listener.c b/hw/vfio/listener.c\nindex 960da9e0a9..32d33a740a 100644\n--- a/hw/vfio/listener.c\n+++ b/hw/vfio/listener.c\n@@ -614,6 +614,11 @@ void vfio_container_region_add(VFIOContainer *bcontainer,\n }\n }\n \n+ if (memory_region_is_ram_device(section->mr) &&\n+ section->mr->ram_device_skip_iommu_map) {\n+ return;\n+ }\n+\n ret = vfio_container_dma_map(bcontainer, iova, int128_get64(llsize),\n vaddr, section->readonly, section->mr);\n if (ret) {\n", "prefixes": [ "v4", "21/31" ] }