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GET /api/1.2/patches/2221846/?format=api
{ "id": 2221846, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2221846/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-ext4/patch/20260410120318.045532623@kernel.org/", "project": { "id": 8, "url": "http://patchwork.ozlabs.org/api/1.2/projects/8/?format=api", "name": "Linux ext4 filesystem development", "link_name": "linux-ext4", "list_id": "linux-ext4.vger.kernel.org", "list_email": "linux-ext4@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260410120318.045532623@kernel.org>", "list_archive_url": null, "date": "2026-04-10T12:19:03", "name": "[07/38] treewide: Consolidate cycles_t", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "7c23149fb118b1a7aad6ec7979f629cc009a3e7e", "submitter": { "id": 92397, "url": "http://patchwork.ozlabs.org/api/1.2/people/92397/?format=api", "name": "Thomas Gleixner", "email": "tglx@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-ext4/patch/20260410120318.045532623@kernel.org/mbox/", "series": [ { "id": 499451, "url": "http://patchwork.ozlabs.org/api/1.2/series/499451/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-ext4/list/?series=499451", "date": "2026-04-10T12:18:27", "name": "treewide: Cleanup LATCH, CLOCK_TICK_RATE and get_cycles() [ab]use", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499451/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221846/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221846/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <SRS0=vbL+=CJ=vger.kernel.org=linux-ext4+bounces-15742-patchwork-incoming=ozlabs.org@ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-ext4@vger.kernel.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "patchwork-incoming@ozlabs.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=RN1rF/li;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=ozlabs.org\n (client-ip=2404:9400:2221:ea00::3; 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arc=none smtp.client-ip=10.30.226.201" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1775823546;\n\tbh=e1hr7RxQAtfkXxmpOByj9AnE8rprLs7FfW1VJuycE3U=;\n\th=Date:From:To:Subject:References:cc:From;\n\tb=RN1rF/lik/IDDm6vfArIXRWDzYeJ5FOTg7VZhjC87W8dEFx4XOLkGFYYWGhN5FSAp\n\t UgUW5oHG+RoyFDJ2Lb8wy9bLXZ629e0sIZHO26a4htp9GCeP67dTQge4t3eD4oDh93\n\t 1M2FHKCxNFZC0Fzd0yadwA9xaercjxCXri8tQar5sfr/ENoprWWJO3/MtUJLqRehkg\n\t l/QzejVV1juchHtR/6u+RSlRsRj9VAJZETUAE3E4ZTRyX1FMMGjRx2pW1U9TsOYtOg\n\t Iiw1IsbQmNZnTrKZs9AZodQQ0gykTA14aWPgbU/9QJFDHI9V1VA1cDQRoqdiQlL5WN\n\t Y1nwRLUUSmSZw==", "Date": "Fri, 10 Apr 2026 14:19:03 +0200", "Message-ID": "<20260410120318.045532623@kernel.org>", "User-Agent": "quilt/0.68", "From": "Thomas Gleixner <tglx@kernel.org>", "To": "LKML <linux-kernel@vger.kernel.org>", "Subject": "[patch 07/38] treewide: Consolidate cycles_t", "References": "<20260410120044.031381086@kernel.org>", "Precedence": "bulk", "X-Mailing-List": "linux-ext4@vger.kernel.org", "List-Id": "<linux-ext4.vger.kernel.org>", "List-Subscribe": "<mailto:linux-ext4+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-ext4+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "cc": "Arnd Bergmann <arnd@arndb.de>,\n x86@kernel.org,\n Lu Baolu <baolu.lu@linux.intel.com>,\n iommu@lists.linux.dev,\n Michael Grzeschik <m.grzeschik@pengutronix.de>,\n netdev@vger.kernel.org,\n linux-wireless@vger.kernel.org,\n Herbert Xu <herbert@gondor.apana.org.au>,\n linux-crypto@vger.kernel.org,\n Vlastimil Babka <vbabka@kernel.org>,\n linux-mm@kvack.org,\n David Woodhouse <dwmw2@infradead.org>,\n Bernie Thompson <bernie@plugable.com>,\n linux-fbdev@vger.kernel.org,\n \"Theodore Tso\" <tytso@mit.edu>,\n linux-ext4@vger.kernel.org,\n Andrew Morton <akpm@linux-foundation.org>,\n Uladzislau Rezki <urezki@gmail.com>,\n Marco Elver <elver@google.com>,\n Dmitry Vyukov <dvyukov@google.com>,\n kasan-dev@googlegroups.com,\n Andrey Ryabinin <ryabinin.a.a@gmail.com>,\n Thomas Sailer <t.sailer@alumni.ethz.ch>,\n linux-hams@vger.kernel.org,\n \"Jason A. Donenfeld\" <Jason@zx2c4.com>,\n Richard Henderson <richard.henderson@linaro.org>,\n linux-alpha@vger.kernel.org,\n Russell King <linux@armlinux.org.uk>,\n linux-arm-kernel@lists.infradead.org,\n Catalin Marinas <catalin.marinas@arm.com>,\n Huacai Chen <chenhuacai@kernel.org>,\n loongarch@lists.linux.dev,\n Geert Uytterhoeven <geert@linux-m68k.org>,\n linux-m68k@lists.linux-m68k.org,\n Dinh Nguyen <dinguyen@kernel.org>,\n Jonas Bonn <jonas@southpole.se>,\n linux-openrisc@vger.kernel.org,\n Helge Deller <deller@gmx.de>,\n linux-parisc@vger.kernel.org,\n Michael Ellerman <mpe@ellerman.id.au>,\n linuxppc-dev@lists.ozlabs.org,\n Paul Walmsley <pjw@kernel.org>,\n linux-riscv@lists.infradead.org,\n Heiko Carstens <hca@linux.ibm.com>,\n linux-s390@vger.kernel.org,\n \"David S. Miller\" <davem@davemloft.net>,\n sparclinux@vger.kernel.org", "X-Spam-Status": "No, score=-1.2 required=5.0 tests=ARC_SIGNED,ARC_VALID,\n\tDKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DMARC_PASS,\n\tMAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on gandalf.ozlabs.org" }, "content": "Most architectures define cycles_t as unsigned long execpt:\n\n - x86 requires it to be 64-bit independent of the 32-bit/64-bit build.\n\n - parisc and mips define it as unsigned int\n\n parisc has no real reason to do so as there are only a few usage sites\n which either expand it to a 64-bit value or utilize only the lower\n 32bits.\n\n mips has no real requirement either.\n\nMove the typedef to types.h and provide a config switch to enforce the\n64-bit type for x86.\n\nSigned-off-by: Thomas Gleixner <tglx@kernel.org>\n---\n arch/Kconfig | 4 ++++\n arch/alpha/include/asm/timex.h | 3 ---\n arch/arm/include/asm/timex.h | 1 -\n arch/loongarch/include/asm/timex.h | 2 --\n arch/m68k/include/asm/timex.h | 2 --\n arch/mips/include/asm/timex.h | 2 --\n arch/nios2/include/asm/timex.h | 2 --\n arch/parisc/include/asm/timex.h | 2 --\n arch/powerpc/include/asm/timex.h | 4 +---\n arch/riscv/include/asm/timex.h | 2 --\n arch/s390/include/asm/timex.h | 2 --\n arch/sparc/include/asm/timex_64.h | 1 -\n arch/x86/Kconfig | 1 +\n arch/x86/include/asm/tsc.h | 2 --\n include/asm-generic/timex.h | 1 -\n include/linux/types.h | 6 ++++++\n 16 files changed, 12 insertions(+), 25 deletions(-)", "diff": "--- a/arch/Kconfig\n+++ b/arch/Kconfig\n@@ -360,6 +360,10 @@ config ARCH_HAS_DMA_SET_UNCACHED\n config ARCH_HAS_DMA_CLEAR_UNCACHED\n \tbool\n \n+# cycles_t is always 64bit wide\n+config ARCH_HAS_CYCLES_T_64\n+\tbool\n+\n config ARCH_HAS_CPU_FINALIZE_INIT\n \tbool\n \n--- a/arch/alpha/include/asm/timex.h\n+++ b/arch/alpha/include/asm/timex.h\n@@ -15,9 +15,6 @@\n * But this only means we'll force a reschedule every 8 seconds or so,\n * which isn't an evil thing.\n */\n-\n-typedef unsigned int cycles_t;\n-\n static inline cycles_t get_cycles (void)\n {\n \tcycles_t ret;\n--- a/arch/arm/include/asm/timex.h\n+++ b/arch/arm/include/asm/timex.h\n@@ -9,7 +9,6 @@\n #ifndef _ASMARM_TIMEX_H\n #define _ASMARM_TIMEX_H\n \n-typedef unsigned long cycles_t;\n // Temporary workaround\n bool delay_read_timer(unsigned long *t);\n \n--- a/arch/loongarch/include/asm/timex.h\n+++ b/arch/loongarch/include/asm/timex.h\n@@ -12,8 +12,6 @@\n #include <asm/cpu.h>\n #include <asm/cpu-features.h>\n \n-typedef unsigned long cycles_t;\n-\n #define get_cycles get_cycles\n \n static inline cycles_t get_cycles(void)\n--- a/arch/m68k/include/asm/timex.h\n+++ b/arch/m68k/include/asm/timex.h\n@@ -7,8 +7,6 @@\n #ifndef _ASMm68K_TIMEX_H\n #define _ASMm68K_TIMEX_H\n \n-typedef unsigned long cycles_t;\n-\n static inline cycles_t get_cycles(void)\n {\n \treturn 0;\n--- a/arch/mips/include/asm/timex.h\n+++ b/arch/mips/include/asm/timex.h\n@@ -29,8 +29,6 @@\n * We know that all SMP capable CPUs have cycle counters.\n */\n \n-typedef unsigned int cycles_t;\n-\n /*\n * On R4000/R4400 an erratum exists such that if the cycle counter is\n * read in the exact moment that it is matching the compare register,\n--- a/arch/nios2/include/asm/timex.h\n+++ b/arch/nios2/include/asm/timex.h\n@@ -5,8 +5,6 @@\n #ifndef _ASM_NIOS2_TIMEX_H\n #define _ASM_NIOS2_TIMEX_H\n \n-typedef unsigned long cycles_t;\n-\n extern cycles_t get_cycles(void);\n #define get_cycles get_cycles\n \n--- a/arch/parisc/include/asm/timex.h\n+++ b/arch/parisc/include/asm/timex.h\n@@ -9,8 +9,6 @@\n \n #include <asm/special_insns.h>\n \n-typedef unsigned long cycles_t;\n-\n static inline cycles_t get_cycles(void)\n {\n \treturn mfctl(16);\n--- a/arch/powerpc/include/asm/timex.h\n+++ b/arch/powerpc/include/asm/timex.h\n@@ -11,9 +11,7 @@\n #include <asm/cputable.h>\n #include <asm/vdso/timebase.h>\n \n-typedef unsigned long cycles_t;\n-\n-static inline cycles_t get_cycles(void)\n+ostatic inline cycles_t get_cycles(void)\n {\n \treturn mftb();\n }\n--- a/arch/riscv/include/asm/timex.h\n+++ b/arch/riscv/include/asm/timex.h\n@@ -8,8 +8,6 @@\n \n #include <asm/csr.h>\n \n-typedef unsigned long cycles_t;\n-\n #ifdef CONFIG_RISCV_M_MODE\n \n #include <asm/clint.h>\n--- a/arch/s390/include/asm/timex.h\n+++ b/arch/s390/include/asm/timex.h\n@@ -177,8 +177,6 @@ static inline void local_tick_enable(uns\n \tset_clock_comparator(get_lowcore()->clock_comparator);\n }\n \n-typedef unsigned long cycles_t;\n-\n static __always_inline unsigned long get_tod_clock(void)\n {\n \tunion tod_clock clk;\n--- a/arch/sparc/include/asm/timex_64.h\n+++ b/arch/sparc/include/asm/timex_64.h\n@@ -10,7 +10,6 @@\n #include <asm/timer.h>\n \n /* Getting on the cycle counter on sparc64. */\n-typedef unsigned long cycles_t;\n #define get_cycles()\ttick_ops->get_tick()\n \n #endif\n--- a/arch/x86/Kconfig\n+++ b/arch/x86/Kconfig\n@@ -79,6 +79,7 @@ config X86\n \tselect ARCH_HAS_CPU_FINALIZE_INIT\n \tselect ARCH_HAS_CPU_PASID\t\tif IOMMU_SVA\n \tselect ARCH_HAS_CURRENT_STACK_POINTER\n+\tselect ARCH_HAS_CYCLES_T_64\n \tselect ARCH_HAS_DEBUG_VIRTUAL\n \tselect ARCH_HAS_DEBUG_VM_PGTABLE\tif !X86_PAE\n \tselect ARCH_HAS_DELAY_TIMER\n--- a/arch/x86/include/asm/tsc.h\n+++ b/arch/x86/include/asm/tsc.h\n@@ -67,8 +67,6 @@ static __always_inline u64 rdtsc_ordered\n /*\n * Standard way to access the cycle counter.\n */\n-typedef unsigned long long cycles_t;\n-\n extern unsigned int cpu_khz;\n extern unsigned int tsc_khz;\n \n--- a/include/asm-generic/timex.h\n+++ b/include/asm-generic/timex.h\n@@ -5,7 +5,6 @@\n /*\n * If you have a cycle counter, return the value here.\n */\n-typedef unsigned long cycles_t;\n #ifndef get_cycles\n static inline cycles_t get_cycles(void)\n {\n--- a/include/linux/types.h\n+++ b/include/linux/types.h\n@@ -270,5 +270,11 @@ struct rcuwait {\n \tstruct task_struct __rcu *task;\n };\n \n+#ifdef CONFIG_ARCH_HAS_CYCLES_T_64\n+typedef unsigned long long\tcycles_t;\n+#else\n+typedef unsigned long\t\tcycles_t;\n+#endif\n+\n #endif /* __ASSEMBLY__ */\n #endif /* _LINUX_TYPES_H */\n", "prefixes": [ "07/38" ] }