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GET /api/1.2/patches/2221726/?format=api
{ "id": 2221726, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2221726/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260410073330.837238-1-mmaddireddy@nvidia.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.2/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260410073330.837238-1-mmaddireddy@nvidia.com>", "list_archive_url": null, "date": "2026-04-10T07:33:30", "name": "PCI: tegra194: Use aspm-l1-entry-delay-ns DT property for L1 entrance latency", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e752c699e7cefc1bae26b604478624ed2a893c6d", "submitter": { "id": 72399, "url": "http://patchwork.ozlabs.org/api/1.2/people/72399/?format=api", "name": "Manikanta Maddireddy", "email": "mmaddireddy@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260410073330.837238-1-mmaddireddy@nvidia.com/mbox/", "series": [ { "id": 499416, "url": "http://patchwork.ozlabs.org/api/1.2/series/499416/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=499416", "date": "2026-04-10T07:33:30", "name": "PCI: tegra194: Use aspm-l1-entry-delay-ns DT property for L1 entrance latency", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499416/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221726/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221726/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-52285-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=fHe7hJji;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; 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Convert the value from nanoseconds\nto the hardware encoding (log2(us) + 1, 3-bit field). If the property is\nabsent, default to 7 (maximum latency).\n\nSigned-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>\nSigned-off-by: Manivannan Sadhasivam <mani@kernel.org>\nLink: https://patch.msgid.link/20260324191000.1095768-10-mmaddireddy@nvidia.com\n---\n drivers/pci/controller/dwc/pcie-tegra194.c | 14 ++++++++++++++\n 1 file changed, 14 insertions(+)", "diff": "diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c\nindex 50c5ef12552b..f171f7e32b75 100644\n--- a/drivers/pci/controller/dwc/pcie-tegra194.c\n+++ b/drivers/pci/controller/dwc/pcie-tegra194.c\n@@ -18,6 +18,7 @@\n #include <linux/interrupt.h>\n #include <linux/iopoll.h>\n #include <linux/kernel.h>\n+#include <linux/log2.h>\n #include <linux/module.h>\n #include <linux/of.h>\n #include <linux/of_pci.h>\n@@ -272,6 +273,7 @@ struct tegra_pcie_dw {\n \tu32 aspm_cmrt;\n \tu32 aspm_pwr_on_t;\n \tu32 aspm_l0s_enter_lat;\n+\tu32 aspm_l1_enter_lat;\n \n \tstruct regulator *pex_ctl_supply;\n \tstruct regulator *slot_ctl_3v3;\n@@ -710,6 +712,8 @@ static void init_host_aspm(struct tegra_pcie_dw *pcie)\n \tval = dw_pcie_readl_dbi(pci, PCIE_PORT_AFR);\n \tval &= ~PORT_AFR_L0S_ENTRANCE_LAT_MASK;\n \tval |= (pcie->aspm_l0s_enter_lat << PORT_AFR_L0S_ENTRANCE_LAT_SHIFT);\n+\tval &= ~PORT_AFR_L1_ENTRANCE_LAT_MASK;\n+\tval |= (pcie->aspm_l1_enter_lat << PORT_AFR_L1_ENTRANCE_LAT_SHIFT);\n \tval |= PORT_AFR_ENTER_ASPM;\n \tdw_pcie_writel_dbi(pci, PCIE_PORT_AFR, val);\n }\n@@ -1110,6 +1114,7 @@ static int tegra_pcie_dw_parse_dt(struct tegra_pcie_dw *pcie)\n {\n \tstruct platform_device *pdev = to_platform_device(pcie->dev);\n \tstruct device_node *np = pcie->dev->of_node;\n+\tu32 val;\n \tint ret;\n \n \tpcie->dbi_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, \"dbi\");\n@@ -1136,6 +1141,15 @@ static int tegra_pcie_dw_parse_dt(struct tegra_pcie_dw *pcie)\n \t\tdev_info(pcie->dev,\n \t\t\t \"Failed to read ASPM L0s Entrance latency: %d\\n\", ret);\n \n+\t/* Default to max latency of 7. */\n+\tpcie->aspm_l1_enter_lat = 7;\n+\tret = of_property_read_u32(np, \"aspm-l1-entry-delay-ns\", &val);\n+\tif (!ret) {\n+\t\tu32 us = max(val / 1000, 1U);\n+\n+\t\tpcie->aspm_l1_enter_lat = min(ilog2(us) + 1, 7);\n+\t}\n+\n \tret = of_property_read_u32(np, \"num-lanes\", &pcie->num_lanes);\n \tif (ret < 0) {\n \t\tdev_err(pcie->dev, \"Failed to read num-lanes: %d\\n\", ret);\n", "prefixes": [] }