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GET /api/1.2/patches/2221635/?format=api
{ "id": 2221635, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2221635/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-3-sherry.sun@nxp.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.2/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260410023055.2439146-3-sherry.sun@nxp.com>", "list_archive_url": null, "date": "2026-04-10T02:30:45", "name": "[V12,02/12] PCI: host-generic: Add common helpers for parsing Root Port properties", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "867fbe54100a10d6cf95357b69759eaf3ac86e0c", "submitter": { "id": 77063, "url": "http://patchwork.ozlabs.org/api/1.2/people/77063/?format=api", "name": "Sherry Sun", "email": "sherry.sun@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260410023055.2439146-3-sherry.sun@nxp.com/mbox/", "series": [ { "id": 499380, "url": "http://patchwork.ozlabs.org/api/1.2/series/499380/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=499380", "date": "2026-04-10T02:30:43", "name": "pci-imx6: Add support for parsing the reset property in new Root Port binding", "version": 12, "mbox": "http://patchwork.ozlabs.org/series/499380/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221635/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221635/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-52244-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", 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"X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 39535062-d396-4f59-685b-08de96a90885", "X-MS-Exchange-CrossTenant-AuthSource": "VI0PR04MB12114.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "10 Apr 2026 02:29:47.1047\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n J64nH5rMAyQWMHy+BmKrzk1vV0k1dSIaA2OKuGrtIkveMCoZ9oABLJKWITcAe4lPS1qeiXawK+Q82GjPC6b1Zg==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AS5PR04MB9826" }, "content": "Introduce generic helper functions to parse Root Port device tree nodes\nand extract common properties like reset GPIOs. This allows multiple\nPCI host controller drivers to share the same parsing logic.\n\nDefine struct pci_host_port to hold common Root Port properties\n(currently only reset GPIO descriptor) and add\npci_host_common_parse_ports() to parse Root Port nodes from device tree.\n\nAlso add the 'ports' list to struct pci_host_bridge for better maintain\nparsed Root Port information.\n\nSigned-off-by: Sherry Sun <sherry.sun@nxp.com>\n---\n drivers/pci/controller/pci-host-common.c | 104 +++++++++++++++++++++++\n drivers/pci/controller/pci-host-common.h | 16 ++++\n drivers/pci/probe.c | 1 +\n include/linux/pci.h | 1 +\n 4 files changed, 122 insertions(+)", "diff": "diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/controller/pci-host-common.c\nindex d6258c1cffe5..064640af80c1 100644\n--- a/drivers/pci/controller/pci-host-common.c\n+++ b/drivers/pci/controller/pci-host-common.c\n@@ -9,6 +9,7 @@\n \n #include <linux/kernel.h>\n #include <linux/module.h>\n+#include <linux/gpio/consumer.h>\n #include <linux/of.h>\n #include <linux/of_address.h>\n #include <linux/of_pci.h>\n@@ -17,6 +18,109 @@\n \n #include \"pci-host-common.h\"\n \n+/**\n+ * pci_host_common_delete_ports - Cleanup function for port list\n+ * @data: Pointer to the port list head\n+ */\n+void pci_host_common_delete_ports(void *data)\n+{\n+\tstruct list_head *ports = data;\n+\tstruct pci_host_port *port, *tmp;\n+\n+\tlist_for_each_entry_safe(port, tmp, ports, list)\n+\t\tlist_del(&port->list);\n+}\n+EXPORT_SYMBOL_GPL(pci_host_common_delete_ports);\n+\n+/**\n+ * pci_host_common_parse_port - Parse a single Root Port node\n+ * @dev: Device pointer\n+ * @bridge: PCI host bridge\n+ * @node: Device tree node of the Root Port\n+ *\n+ * This function parses Root Port properties from the device tree.\n+ * Currently it only handles the PERST# GPIO which is optional.\n+ *\n+ * NOTE: This helper fetches resources (like PERST# GPIO) optionally.\n+ * If a controller driver has a hard dependency on certain resources(PHY,\n+ * clocks, regulators, etc.), those resources MUST be modeled correctly\n+ * in the DT binding and validated in DTS. This helper cannot enforce such\n+ * dependencies and the driver may fail to operate if required resources\n+ * are missing.\n+ *\n+ * Returns: 0 on success, -ENOENT if PERST# found in RC node (legacy binding\n+ * should be used), Other negative error codes on failure.\n+ */\n+static int pci_host_common_parse_port(struct device *dev,\n+\t\t\t\t struct pci_host_bridge *bridge,\n+\t\t\t\t struct device_node *node)\n+{\n+\tstruct pci_host_port *port;\n+\tstruct gpio_desc *reset;\n+\n+\t/* Check if PERST# is present in Root Port node */\n+\treset = devm_fwnode_gpiod_get(dev, of_fwnode_handle(node),\n+\t\t\t\t \"reset\", GPIOD_ASIS, \"PERST#\");\n+\tif (IS_ERR(reset)) {\n+\t\t/* If error is not -ENOENT, it's a real error */\n+\t\tif (PTR_ERR(reset) != -ENOENT)\n+\t\t\treturn PTR_ERR(reset);\n+\n+\t\t/* PERST# not found in Root Port node, check RC node */\n+\t\tif (of_property_read_bool(dev->of_node, \"reset-gpios\") ||\n+\t\t of_property_read_bool(dev->of_node, \"reset-gpio\"))\n+\t\t\treturn -ENOENT;\n+\n+\t\t/* No PERST# in either node, assume not present in design */\n+\t\treset = NULL;\n+\t}\n+\n+\tport = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);\n+\tif (!port)\n+\t\treturn -ENOMEM;\n+\n+\tport->reset = reset;\n+\tINIT_LIST_HEAD(&port->list);\n+\tlist_add_tail(&port->list, &bridge->ports);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * pci_host_common_parse_ports - Parse Root Port nodes from device tree\n+ * @dev: Device pointer\n+ * @bridge: PCI host bridge\n+ *\n+ * This function iterates through child nodes of the host bridge and parses\n+ * Root Port properties (currently only reset GPIO).\n+ *\n+ * Returns: 0 on success, -ENOENT if no ports found or PERST# found in RC node\n+ * (legacy binding should be used), Other negative error codes on failure.\n+ */\n+int pci_host_common_parse_ports(struct device *dev, struct pci_host_bridge *bridge)\n+{\n+\tint ret = -ENOENT;\n+\n+\tfor_each_available_child_of_node_scoped(dev->of_node, of_port) {\n+\t\tif (!of_node_is_type(of_port, \"pci\"))\n+\t\t\tcontinue;\n+\t\tret = pci_host_common_parse_port(dev, bridge, of_port);\n+\t\tif (ret)\n+\t\t\tgoto err_cleanup;\n+\t}\n+\n+\tif (ret)\n+\t\treturn ret;\n+\n+\treturn devm_add_action_or_reset(dev, pci_host_common_delete_ports,\n+\t\t\t\t\t&bridge->ports);\n+\n+err_cleanup:\n+\tpci_host_common_delete_ports(&bridge->ports);\n+\treturn ret;\n+}\n+EXPORT_SYMBOL_GPL(pci_host_common_parse_ports);\n+\n static void gen_pci_unmap_cfg(void *ptr)\n {\n \tpci_ecam_free((struct pci_config_window *)ptr);\ndiff --git a/drivers/pci/controller/pci-host-common.h b/drivers/pci/controller/pci-host-common.h\nindex b5075d4bd7eb..37714bedb625 100644\n--- a/drivers/pci/controller/pci-host-common.h\n+++ b/drivers/pci/controller/pci-host-common.h\n@@ -12,6 +12,22 @@\n \n struct pci_ecam_ops;\n \n+/**\n+ * struct pci_host_port - Generic Root Port properties\n+ * @list: List node for linking multiple ports\n+ * @reset: GPIO descriptor for PERST# signal\n+ *\n+ * This structure contains common properties that can be parsed from\n+ * Root Port device tree nodes.\n+ */\n+struct pci_host_port {\n+\tstruct list_head\tlist;\n+\tstruct gpio_desc\t*reset;\n+};\n+\n+void pci_host_common_delete_ports(void *data);\n+int pci_host_common_parse_ports(struct device *dev, struct pci_host_bridge *bridge);\n+\n int pci_host_common_probe(struct platform_device *pdev);\n int pci_host_common_init(struct platform_device *pdev,\n \t\t\t struct pci_host_bridge *bridge,\ndiff --git a/drivers/pci/probe.c b/drivers/pci/probe.c\nindex eaa4a3d662e8..629ae08b7d35 100644\n--- a/drivers/pci/probe.c\n+++ b/drivers/pci/probe.c\n@@ -677,6 +677,7 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)\n {\n \tINIT_LIST_HEAD(&bridge->windows);\n \tINIT_LIST_HEAD(&bridge->dma_ranges);\n+\tINIT_LIST_HEAD(&bridge->ports);\n \n \t/*\n \t * We assume we can manage these PCIe features. Some systems may\ndiff --git a/include/linux/pci.h b/include/linux/pci.h\nindex 8f63de38f2d2..a73ea81ce88f 100644\n--- a/include/linux/pci.h\n+++ b/include/linux/pci.h\n@@ -636,6 +636,7 @@ struct pci_host_bridge {\n \tint\t\tdomain_nr;\n \tstruct list_head windows;\t/* resource_entry */\n \tstruct list_head dma_ranges;\t/* dma ranges resource list */\n+\tstruct list_head ports;\t\t/* Root Port list (pci_host_port) */\n #ifdef CONFIG_PCI_IDE\n \tu16 nr_ide_streams; /* Max streams possibly active in @ide_stream_ida */\n \tstruct ida ide_stream_ida;\n", "prefixes": [ "V12", "02/12" ] }