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GET /api/1.2/patches/2221517/?format=api
{ "id": 2221517, "url": "http://patchwork.ozlabs.org/api/1.2/patches/2221517/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260409-ad4692-multichannel-sar-adc-driver-v7-5-be375d4df2c5@analog.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.2/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260409-ad4692-multichannel-sar-adc-driver-v7-5-be375d4df2c5@analog.com>", "list_archive_url": null, "date": "2026-04-09T15:28:26", "name": "[v7,5/6] iio: adc: ad4691: add oversampling support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9a708b1c92362db5efa7368fe6712ad9a1238db8", "submitter": { "id": 92791, "url": "http://patchwork.ozlabs.org/api/1.2/people/92791/?format=api", "name": "Radu Sabau via B4 Relay", "email": "devnull+radu.sabau.analog.com@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260409-ad4692-multichannel-sar-adc-driver-v7-5-be375d4df2c5@analog.com/mbox/", "series": [ { "id": 499317, "url": "http://patchwork.ozlabs.org/api/1.2/series/499317/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=499317", "date": "2026-04-09T15:28:22", "name": "iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family", "version": 7, "mbox": "http://patchwork.ozlabs.org/series/499317/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221517/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221517/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-34963-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=HuaXksia;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-gpio+bounces-34963-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"HuaXksia\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fs3vD2LnNz1xy1\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Apr 2026 01:36:40 +1000 (AEST)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 47011305043B\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 9 Apr 2026 15:29:19 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id E9F703E0229;\n\tThu, 9 Apr 2026 15:28:29 +0000 (UTC)", "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A0F73E0C7D;\n\tThu, 9 Apr 2026 15:28:29 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPS id 510B6C2BCC9;\n\tThu, 9 Apr 2026 15:28:29 +0000 (UTC)", "from aws-us-west-2-korg-lkml-1.web.codeaurora.org\n (localhost.localdomain [127.0.0.1])\n\tby smtp.lore.kernel.org (Postfix) with ESMTP id 4779AF31E28;\n\tThu, 9 Apr 2026 15:28:29 +0000 (UTC)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775748509; cv=none;\n b=OSf/IBujbVCF4qcZZWIMFXqTCm+Z1jxmpaPeG6r42Pay4sv0uTBHkPB0+Zl+kIaeNO+ZmsAAtR7TZWaUMLZaIIVZx9mLNYfbnWW5/cvZ4mmBrwnV21biUq4vZMvBsTVvuTp+ojap7iY3BPuf8Cn7NEjDiKbyao+zXnpHSsMaxag=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775748509; c=relaxed/simple;\n\tbh=KsblKUkQGH4qzMaiWWjhoWft+PHq8/XzwCcpm7GCJu0=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=PMNkAWTVMRGwzZoCUxZKKpIyo76KpkCIOzOP3GRsFdgXM1sBi54KV9Tzc1/DdjWMqdzJUhy1vTG4LtsfM/tzrdODdKazl1DucHtogpP6Et0r/HD8SRs/fL/RDj6NMet5TnFYCE2QkzG4aMpC9p0Cnut5BDsyFtzp8YAZBbmLegs=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=HuaXksia; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1775748509;\n\tbh=KsblKUkQGH4qzMaiWWjhoWft+PHq8/XzwCcpm7GCJu0=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From;\n\tb=HuaXksiaEkeUTtpQlqyKpcpokZ6jE3zuvXFUZWReOTEA6SE/lq6/0lrBfHsfPmgkl\n\t 5qh09hJmpHANYGJmaIx8i/4mwX09BHYbziX37xi/ouC/Pibl5RgpeTVfx7cz9dHDYN\n\t QTH69qGk9hsPhv2UUciNBalHFx45WOzhmTPNOmjtQ76wmHzm1/KJXfbeZiPgfsBw3F\n\t dkZf3zJ7QFPQq6ePiQvPOqGztlLVOTkAbow+lTq2W9RdEX9zt+WR5ywtmzqF4PxqBS\n\t 325TrTMv1kv5Rxc6tZxYTcmDUj/ne4zB6Dk9JbD564JCfp8Xd0qs5cK8z2xbxcn401\n\t PGwZKbyN6fR7A==", "From": "Radu Sabau via B4 Relay <devnull+radu.sabau.analog.com@kernel.org>", "Date": "Thu, 09 Apr 2026 18:28:26 +0300", "Subject": "[PATCH v7 5/6] iio: adc: ad4691: add oversampling support", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "8bit", "Message-Id": "\n <20260409-ad4692-multichannel-sar-adc-driver-v7-5-be375d4df2c5@analog.com>", "References": "\n <20260409-ad4692-multichannel-sar-adc-driver-v7-0-be375d4df2c5@analog.com>", "In-Reply-To": "\n <20260409-ad4692-multichannel-sar-adc-driver-v7-0-be375d4df2c5@analog.com>", "To": "Lars-Peter Clausen <lars@metafoo.de>,\n Michael Hennerich <Michael.Hennerich@analog.com>,\n Jonathan Cameron <jic23@kernel.org>, David Lechner <dlechner@baylibre.com>,\n\t=?utf-8?q?Nuno_S=C3=A1?= <nuno.sa@analog.com>,\n Andy Shevchenko <andy@kernel.org>, Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= <ukleinek@kernel.org>,\n Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>,\n Linus Walleij <linusw@kernel.org>, Bartosz Golaszewski <brgl@kernel.org>,\n Philipp Zabel <p.zabel@pengutronix.de>, Jonathan Corbet <corbet@lwn.net>,\n Shuah Khan <skhan@linuxfoundation.org>", "Cc": "linux-iio@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,\n linux-gpio@vger.kernel.org, linux-doc@vger.kernel.org,\n Radu Sabau <radu.sabau@analog.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1775748505; l=9894;\n i=radu.sabau@analog.com; s=20260220; h=from:subject:message-id;\n bh=eB6uvSJZMwxlszpLMEXiVdwqo2+1DAbz0m1ETwwp1E8=;\n b=Q9j9fNUH+gyIVtPhmTXEJpOmAQAIZwPDs3DvcRhKK3vjvmaqorlbeSfKFkBOsWJcG4pAwxb5U\n ENfshks7CfnBUWaVta7dRxuHpc0ypqzrtQRNwA4SpgDL2BydQYuRE81", "X-Developer-Key": "i=radu.sabau@analog.com; a=ed25519;\n pk=lDPQHgn9jTdt0vo58Na9lLxLaE2mb330if71Cn+EvFU=", "X-Endpoint-Received": "by B4 Relay for radu.sabau@analog.com/20260220 with\n auth_id=642", "X-Original-From": "Radu Sabau <radu.sabau@analog.com>", "Reply-To": "radu.sabau@analog.com" }, "content": "From: Radu Sabau <radu.sabau@analog.com>\n\nAdd per-channel oversampling ratio (OSR) support for CNV burst mode.\nThe accumulator depth register (ACC_DEPTH_IN) is programmed with the\nselected OSR at buffer enable time and before each single-shot read.\n\nSupported OSR values: 1, 2, 4, 8, 16, 32.\n\nIntroduce AD4691_MANUAL_CHANNEL() for manual mode channels, which do\nnot expose the oversampling ratio attribute since OSR is not applicable\nin that mode. A separate manual_channels array is added to\nstruct ad4691_channel_info and selected at probe time; offload paths\nreuse the same arrays with num_channels capping access before the soft\ntimestamp entry.\n\nThe reported sampling frequency accounts for the active OSR:\neffective_freq = oscillator_freq / osr\n\nOSR defaults to 1 (no accumulation) for all channels.\n\nSigned-off-by: Radu Sabau <radu.sabau@analog.com>\n---\n drivers/iio/adc/ad4691.c | 137 +++++++++++++++++++++++++++++++++++++++++++----\n 1 file changed, 128 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/iio/adc/ad4691.c b/drivers/iio/adc/ad4691.c\nindex 839ea7f44c78..ef96d736996e 100644\n--- a/drivers/iio/adc/ad4691.c\n+++ b/drivers/iio/adc/ad4691.c\n@@ -116,6 +116,7 @@ enum ad4691_ref_ctrl {\n \n struct ad4691_channel_info {\n \tconst struct iio_chan_spec *channels;\n+\tconst struct iio_chan_spec *manual_channels;\n \tunsigned int num_channels;\n };\n \n@@ -126,7 +127,34 @@ struct ad4691_chip_info {\n \tconst struct ad4691_channel_info *offload_info;\n };\n \n+/* CNV burst mode channel — exposes oversampling ratio. */\n #define AD4691_CHANNEL(ch)\t\t\t\t\t\t\\\n+\t{\t\t\t\t\t\t\t\t\\\n+\t\t.type = IIO_VOLTAGE,\t\t\t\t\t\\\n+\t\t.indexed = 1,\t\t\t\t\t\t\\\n+\t\t.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |\t\t\\\n+\t\t\t\t BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) | \\\n+\t\t\t\t BIT(IIO_CHAN_INFO_SAMP_FREQ),\t\\\n+\t\t.info_mask_separate_available =\t\t\t\t\\\n+\t\t\t\t BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) | \\\n+\t\t\t\t BIT(IIO_CHAN_INFO_SAMP_FREQ),\t\\\n+\t\t.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SCALE),\t\\\n+\t\t.channel = ch,\t\t\t\t\t\t\\\n+\t\t.scan_index = ch,\t\t\t\t\t\\\n+\t\t.scan_type = {\t\t\t\t\t\t\\\n+\t\t\t.sign = 'u',\t\t\t\t\t\\\n+\t\t\t.realbits = 16,\t\t\t\t\t\\\n+\t\t\t.storagebits = 16,\t\t\t\t\\\n+\t\t\t.endianness = IIO_BE,\t\t\t\t\\\n+\t\t},\t\t\t\t\t\t\t\\\n+\t}\n+\n+/*\n+ * Manual mode channel — no oversampling ratio attribute. OSR is not\n+ * supported in manual mode; ACC_DEPTH_IN is not configured during manual\n+ * buffer enable.\n+ */\n+#define AD4691_MANUAL_CHANNEL(ch)\t\t\t\t\t\\\n \t{\t\t\t\t\t\t\t\t\\\n \t\t.type = IIO_VOLTAGE,\t\t\t\t\t\\\n \t\t.indexed = 1,\t\t\t\t\t\t\\\n@@ -177,25 +205,65 @@ static const struct iio_chan_spec ad4693_channels[] = {\n \tIIO_CHAN_SOFT_TIMESTAMP(8),\n };\n \n+static const struct iio_chan_spec ad4691_manual_channels[] = {\n+\tAD4691_MANUAL_CHANNEL(0),\n+\tAD4691_MANUAL_CHANNEL(1),\n+\tAD4691_MANUAL_CHANNEL(2),\n+\tAD4691_MANUAL_CHANNEL(3),\n+\tAD4691_MANUAL_CHANNEL(4),\n+\tAD4691_MANUAL_CHANNEL(5),\n+\tAD4691_MANUAL_CHANNEL(6),\n+\tAD4691_MANUAL_CHANNEL(7),\n+\tAD4691_MANUAL_CHANNEL(8),\n+\tAD4691_MANUAL_CHANNEL(9),\n+\tAD4691_MANUAL_CHANNEL(10),\n+\tAD4691_MANUAL_CHANNEL(11),\n+\tAD4691_MANUAL_CHANNEL(12),\n+\tAD4691_MANUAL_CHANNEL(13),\n+\tAD4691_MANUAL_CHANNEL(14),\n+\tAD4691_MANUAL_CHANNEL(15),\n+\tIIO_CHAN_SOFT_TIMESTAMP(16),\n+};\n+\n+static const struct iio_chan_spec ad4693_manual_channels[] = {\n+\tAD4691_MANUAL_CHANNEL(0),\n+\tAD4691_MANUAL_CHANNEL(1),\n+\tAD4691_MANUAL_CHANNEL(2),\n+\tAD4691_MANUAL_CHANNEL(3),\n+\tAD4691_MANUAL_CHANNEL(4),\n+\tAD4691_MANUAL_CHANNEL(5),\n+\tAD4691_MANUAL_CHANNEL(6),\n+\tAD4691_MANUAL_CHANNEL(7),\n+\tIIO_CHAN_SOFT_TIMESTAMP(8),\n+};\n+\n+static const int ad4691_oversampling_ratios[] = { 1, 2, 4, 8, 16, 32 };\n+\n static const struct ad4691_channel_info ad4691_sw_info = {\n \t.channels = ad4691_channels,\n+\t.manual_channels = ad4691_manual_channels,\n \t.num_channels = ARRAY_SIZE(ad4691_channels),\n };\n \n static const struct ad4691_channel_info ad4693_sw_info = {\n \t.channels = ad4693_channels,\n+\t.manual_channels = ad4693_manual_channels,\n \t.num_channels = ARRAY_SIZE(ad4693_channels),\n };\n \n static const struct ad4691_channel_info ad4691_offload_info = {\n \t.channels = ad4691_channels,\n-\t/* No soft timestamp; num_channels caps access to 16. */\n+\t/*\n+\t * Offload paths share the SW channel arrays. num_channels caps access\n+\t * before the soft timestamp entry, so no separate array is needed.\n+\t */\n+\t.manual_channels = ad4691_manual_channels,\n \t.num_channels = 16,\n };\n \n static const struct ad4691_channel_info ad4693_offload_info = {\n \t.channels = ad4693_channels,\n-\t/* No soft timestamp; num_channels caps access to 8. */\n+\t.manual_channels = ad4693_manual_channels,\n \t.num_channels = 8,\n };\n \n@@ -270,6 +338,8 @@ struct ad4691_state {\n \tint irq;\n \tint vref_uV;\n \tu32 cnv_period_ns;\n+\t/* Per-channel oversampling ratio; always 1 in manual mode. */\n+\tu8 osr[16];\n \n \tbool manual_mode;\n \tbool refbuf_en;\n@@ -490,7 +560,8 @@ static const struct regmap_config ad4691_regmap_config = {\n \t.cache_type = REGCACHE_MAPLE,\n };\n \n-static int ad4691_get_sampling_freq(struct ad4691_state *st, int *val)\n+static int ad4691_get_sampling_freq(struct ad4691_state *st, int *val,\n+\t\t\t\t unsigned int osr)\n {\n \tunsigned int reg_val;\n \tint ret;\n@@ -499,7 +570,7 @@ static int ad4691_get_sampling_freq(struct ad4691_state *st, int *val)\n \tif (ret)\n \t\treturn ret;\n \n-\t*val = ad4691_osc_freqs_Hz[FIELD_GET(AD4691_OSC_FREQ_MASK, reg_val)];\n+\t*val = ad4691_osc_freqs_Hz[FIELD_GET(AD4691_OSC_FREQ_MASK, reg_val)] / osr;\n \treturn IIO_VAL_INT;\n }\n \n@@ -536,6 +607,11 @@ static int ad4691_read_avail(struct iio_dev *indio_dev,\n \t\t*type = IIO_VAL_INT;\n \t\t*length = ARRAY_SIZE(ad4691_osc_freqs_Hz) - start;\n \t\treturn IIO_AVAIL_LIST;\n+\tcase IIO_CHAN_INFO_OVERSAMPLING_RATIO:\n+\t\t*vals = ad4691_oversampling_ratios;\n+\t\t*type = IIO_VAL_INT;\n+\t\t*length = ARRAY_SIZE(ad4691_oversampling_ratios);\n+\t\treturn IIO_AVAIL_LIST;\n \tdefault:\n \t\treturn -EINVAL;\n \t}\n@@ -566,6 +642,11 @@ static int ad4691_single_shot_read(struct iio_dev *indio_dev,\n \tif (ret)\n \t\treturn ret;\n \n+\tret = regmap_write(st->regmap, AD4691_ACC_DEPTH_IN(chan->channel),\n+\t\t\t st->osr[chan->channel]);\n+\tif (ret)\n+\t\treturn ret;\n+\n \tret = regmap_read(st->regmap, AD4691_OSC_FREQ_REG, ®_val);\n \tif (ret)\n \t\treturn ret;\n@@ -575,8 +656,9 @@ static int ad4691_single_shot_read(struct iio_dev *indio_dev,\n \t\treturn ret;\n \n \tosc_idx = FIELD_GET(AD4691_OSC_FREQ_MASK, reg_val);\n-\t/* Wait 2 oscillator periods for the conversion to complete. */\n-\tperiod_us = DIV_ROUND_UP(2UL * USEC_PER_SEC, ad4691_osc_freqs_Hz[osc_idx]);\n+\t/* Wait osr oscillator periods for all accumulator samples to complete. */\n+\tperiod_us = DIV_ROUND_UP((unsigned long)st->osr[chan->channel] * USEC_PER_SEC,\n+\t\t\t\t ad4691_osc_freqs_Hz[osc_idx]);\n \tfsleep(period_us);\n \n \tret = regmap_write(st->regmap, AD4691_OSC_EN_REG, 0);\n@@ -611,7 +693,10 @@ static int ad4691_read_raw(struct iio_dev *indio_dev,\n \t\treturn ad4691_single_shot_read(indio_dev, chan, val);\n \t}\n \tcase IIO_CHAN_INFO_SAMP_FREQ:\n-\t\treturn ad4691_get_sampling_freq(st, val);\n+\t\treturn ad4691_get_sampling_freq(st, val, st->osr[chan->channel]);\n+\tcase IIO_CHAN_INFO_OVERSAMPLING_RATIO:\n+\t\t*val = st->osr[chan->channel];\n+\t\treturn IIO_VAL_INT;\n \tcase IIO_CHAN_INFO_SCALE:\n \t\t*val = st->vref_uV / (MICRO / MILLI);\n \t\t*val2 = chan->scan_type.realbits;\n@@ -625,9 +710,24 @@ static int ad4691_write_raw(struct iio_dev *indio_dev,\n \t\t\t struct iio_chan_spec const *chan,\n \t\t\t int val, int val2, long mask)\n {\n+\tstruct ad4691_state *st = iio_priv(indio_dev);\n+\n \tswitch (mask) {\n \tcase IIO_CHAN_INFO_SAMP_FREQ:\n \t\treturn ad4691_set_sampling_freq(indio_dev, val);\n+\tcase IIO_CHAN_INFO_OVERSAMPLING_RATIO: {\n+\t\tIIO_DEV_ACQUIRE_DIRECT_MODE(indio_dev, claim);\n+\t\tif (IIO_DEV_ACQUIRE_FAILED(claim))\n+\t\t\treturn -EBUSY;\n+\n+\t\tfor (unsigned int i = 0; i < ARRAY_SIZE(ad4691_oversampling_ratios); i++) {\n+\t\t\tif (ad4691_oversampling_ratios[i] != val)\n+\t\t\t\tcontinue;\n+\t\t\tst->osr[chan->channel] = val;\n+\t\t\treturn 0;\n+\t\t}\n+\t\treturn -EINVAL;\n+\t}\n \tdefault:\n \t\treturn -EINVAL;\n \t}\n@@ -842,6 +942,12 @@ static int ad4691_cnv_burst_buffer_preenable(struct iio_dev *indio_dev)\n \tif (ret)\n \t\tgoto err_unoptimize;\n \n+\tiio_for_each_active_channel(indio_dev, i) {\n+\t\tret = regmap_write(st->regmap, AD4691_ACC_DEPTH_IN(i), st->osr[i]);\n+\t\tif (ret)\n+\t\t\tgoto err_unoptimize;\n+\t}\n+\n \tret = ad4691_enter_conversion_mode(st);\n \tif (ret)\n \t\tgoto err_unoptimize;\n@@ -998,6 +1104,12 @@ static int ad4691_cnv_burst_offload_buffer_postenable(struct iio_dev *indio_dev)\n \tif (ret)\n \t\treturn ret;\n \n+\tiio_for_each_active_channel(indio_dev, bit) {\n+\t\tret = regmap_write(st->regmap, AD4691_ACC_DEPTH_IN(bit), st->osr[bit]);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n \tret = ad4691_enter_conversion_mode(st);\n \tif (ret)\n \t\treturn ret;\n@@ -1519,6 +1631,7 @@ static int ad4691_probe(struct spi_device *spi)\n \tst = iio_priv(indio_dev);\n \tst->spi = spi;\n \tst->info = spi_get_device_match_data(spi);\n+\tmemset(st->osr, 1, sizeof(st->osr));\n \n \tret = devm_mutex_init(dev, &st->lock);\n \tif (ret)\n@@ -1553,11 +1666,17 @@ static int ad4691_probe(struct spi_device *spi)\n \tindio_dev->modes = INDIO_DIRECT_MODE;\n \n \tif (spi_offload) {\n-\t\tindio_dev->channels = st->info->offload_info->channels;\n+\t\tif (st->manual_mode)\n+\t\t\tindio_dev->channels = st->info->offload_info->manual_channels;\n+\t\telse\n+\t\t\tindio_dev->channels = st->info->offload_info->channels;\n \t\tindio_dev->num_channels = st->info->offload_info->num_channels;\n \t\tret = ad4691_setup_offload(indio_dev, st, spi_offload);\n \t} else {\n-\t\tindio_dev->channels = st->info->sw_info->channels;\n+\t\tif (st->manual_mode)\n+\t\t\tindio_dev->channels = st->info->sw_info->manual_channels;\n+\t\telse\n+\t\t\tindio_dev->channels = st->info->sw_info->channels;\n \t\tindio_dev->num_channels = st->info->sw_info->num_channels;\n \t\tret = ad4691_setup_triggered_buffer(indio_dev, st);\n \t}\n", "prefixes": [ "v7", "5/6" ] }